This board has not been converted to generic board by the deadline. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org>master
Simon Glass
9 years ago
committed by
Tom Rini
parent
0c81f37d9a
commit
b928e658f4
@ -1,15 +0,0 @@ |
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if ARCH_VERSATILE |
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config SYS_BOARD |
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default "versatile" |
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config SYS_VENDOR |
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default "armltd" |
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config SYS_SOC |
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default "versatile" |
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config SYS_CONFIG_NAME |
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default "versatile" |
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endif |
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@ -1,8 +0,0 @@ |
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VERSATILE BOARD |
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#M: - |
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S: Maintained |
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F: board/armltd/versatile/ |
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F: include/configs/versatile.h |
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F: configs/versatileab_defconfig |
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F: configs/versatilepb_defconfig |
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F: configs/versatileqemu_defconfig |
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@ -1,9 +0,0 @@ |
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y := versatile.o
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obj-y += lowlevel_init.o
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@ -1,17 +0,0 @@ |
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/* |
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* Board specific setup info |
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* |
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* (C) Copyright 2003, ARM Ltd. |
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* Philippe Robin, <philippe.robin@arm.com>
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <config.h> |
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/* Set up the platform, once the cpu has been initialized */ |
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.globl lowlevel_init
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lowlevel_init: |
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/* All done by Versatile's boot monitor! */ |
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mov pc, lr |
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@ -1,99 +0,0 @@ |
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/*
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* (C) Copyright 2002 |
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
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* Marius Groeger <mgroeger@sysgo.de> |
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* |
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* (C) Copyright 2002 |
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* David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> |
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* |
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* (C) Copyright 2003 |
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* Texas Instruments, <www.ti.com> |
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* Kshitij Gupta <Kshitij@ti.com> |
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* |
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* (C) Copyright 2004 |
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* ARM Ltd. |
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* Philippe Robin, <philippe.robin@arm.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <netdev.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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#if defined(CONFIG_SHOW_BOOT_PROGRESS) |
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void show_boot_progress(int progress) |
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{ |
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printf("Boot reached stage %d\n", progress); |
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} |
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#endif |
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#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF) |
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/*
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* Miscellaneous platform dependent initialisations |
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*/ |
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int board_early_init_f (void) |
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{ |
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/*
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* set clock frequency: |
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* VERSATILE_REFCLK is 32KHz |
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* VERSATILE_TIMCLK is 1MHz |
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*/ |
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*(volatile unsigned int *)(VERSATILE_SCTL_BASE) |= |
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((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) | |
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(VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel)); |
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return 0; |
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} |
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int board_init (void) |
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{ |
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/* arch number of Versatile Board */ |
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#ifdef CONFIG_ARCH_VERSATILE_AB |
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gd->bd->bi_arch_number = MACH_TYPE_VERSATILE_AB; |
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#else |
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gd->bd->bi_arch_number = MACH_TYPE_VERSATILE_PB; |
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#endif |
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/* adress of boot parameters */ |
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gd->bd->bi_boot_params = 0x00000100; |
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gd->flags = 0; |
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icache_enable (); |
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return 0; |
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} |
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int misc_init_r (void) |
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{ |
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setenv("verify", "n"); |
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return (0); |
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} |
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/******************************
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Routine: |
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Description: |
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******************************/ |
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int dram_init (void) |
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{ |
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/* dram_init must store complete ramsize in gd->ram_size */ |
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gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, |
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PHYS_SDRAM_1_SIZE); |
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return 0; |
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} |
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#ifdef CONFIG_CMD_NET |
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int board_eth_init(bd_t *bis) |
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{ |
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int rc = 0; |
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#ifdef CONFIG_SMC91111 |
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); |
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#endif |
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return rc; |
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} |
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#endif |
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@ -1,18 +0,0 @@ |
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CONFIG_ARM=y |
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CONFIG_SYS_EXTRA_OPTIONS="ARCH_VERSATILE_AB" |
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# CONFIG_CMD_CONSOLE is not set |
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# CONFIG_CMD_BOOTD is not set |
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# CONFIG_CMD_RUN is not set |
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# CONFIG_CMD_IMLS is not set |
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# CONFIG_CMD_XIMG is not set |
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# CONFIG_CMD_EDITENV is not set |
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# CONFIG_CMD_ENV_EXISTS is not set |
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# CONFIG_CMD_LOADB is not set |
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# CONFIG_CMD_LOADS is not set |
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# CONFIG_CMD_FPGA is not set |
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# CONFIG_CMD_ECHO is not set |
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# CONFIG_CMD_ITEST is not set |
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# CONFIG_CMD_SOURCE is not set |
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# CONFIG_CMD_SETEXPR is not set |
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# CONFIG_CMD_NFS is not set |
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# CONFIG_CMD_MISC is not set |
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@ -1,18 +0,0 @@ |
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CONFIG_ARM=y |
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CONFIG_SYS_EXTRA_OPTIONS="ARCH_VERSATILE_PB" |
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# CONFIG_CMD_CONSOLE is not set |
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# CONFIG_CMD_BOOTD is not set |
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# CONFIG_CMD_RUN is not set |
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# CONFIG_CMD_IMLS is not set |
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# CONFIG_CMD_XIMG is not set |
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# CONFIG_CMD_EDITENV is not set |
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# CONFIG_CMD_ENV_EXISTS is not set |
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# CONFIG_CMD_LOADB is not set |
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# CONFIG_CMD_LOADS is not set |
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# CONFIG_CMD_FPGA is not set |
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# CONFIG_CMD_ECHO is not set |
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# CONFIG_CMD_ITEST is not set |
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# CONFIG_CMD_SOURCE is not set |
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# CONFIG_CMD_SETEXPR is not set |
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# CONFIG_CMD_NFS is not set |
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# CONFIG_CMD_MISC is not set |
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@ -1,18 +0,0 @@ |
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CONFIG_ARM=y |
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CONFIG_SYS_EXTRA_OPTIONS="ARCH_VERSATILE_QEMU,ARCH_VERSATILE_PB" |
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# CONFIG_CMD_CONSOLE is not set |
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# CONFIG_CMD_BOOTD is not set |
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# CONFIG_CMD_RUN is not set |
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# CONFIG_CMD_IMLS is not set |
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# CONFIG_CMD_XIMG is not set |
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# CONFIG_CMD_EDITENV is not set |
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# CONFIG_CMD_ENV_EXISTS is not set |
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# CONFIG_CMD_LOADB is not set |
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# CONFIG_CMD_LOADS is not set |
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# CONFIG_CMD_FPGA is not set |
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# CONFIG_CMD_ECHO is not set |
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# CONFIG_CMD_ITEST is not set |
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# CONFIG_CMD_SOURCE is not set |
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# CONFIG_CMD_SETEXPR is not set |
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# CONFIG_CMD_NFS is not set |
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# CONFIG_CMD_MISC is not set |
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@ -1,214 +0,0 @@ |
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/*
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* (C) Copyright 2003 |
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* Texas Instruments. |
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* Kshitij Gupta <kshitij@ti.com> |
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* Configuation settings for the TI OMAP Innovator board. |
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* |
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* (C) Copyright 2004 |
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* ARM Ltd. |
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* Philippe Robin, <philippe.robin@arm.com> |
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* Configuration for Versatile PB. |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#ifndef __CONFIG_H |
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#define __CONFIG_H |
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/*
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* High Level Configuration Options |
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* (easy to change) |
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*/ |
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#define CONFIG_VERSATILE 1 /* This is Versatile Platform Board */ |
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#define CONFIG_ARCH_VERSATILE 1 /* Specifically, a Versatile */ |
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#define CONFIG_SYS_MEMTEST_START 0x100000 |
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#define CONFIG_SYS_MEMTEST_END 0x10000000 |
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#define CONFIG_SYS_TIMERBASE 0x101E2000 /* Timer 0 and 1 base */ |
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#define CONFIG_SYS_TIMER_RATE (1000000 / 256) |
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#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) |
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#define CONFIG_SYS_TIMER_COUNTS_DOWN |
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/*
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* control registers |
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*/ |
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#define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */ |
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/*
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* System controller bit assignment |
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*/ |
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#define VERSATILE_REFCLK 0 |
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#define VERSATILE_TIMCLK 1 |
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#define VERSATILE_TIMER1_EnSel 15 |
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#define VERSATILE_TIMER2_EnSel 17 |
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#define VERSATILE_TIMER3_EnSel 19 |
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#define VERSATILE_TIMER4_EnSel 21 |
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
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#define CONFIG_SETUP_MEMORY_TAGS 1 |
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#define CONFIG_MISC_INIT_R 1 |
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/*
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* Size of malloc() pool |
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*/ |
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#define CONFIG_ENV_SIZE 8192 |
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) |
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/*
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* Hardware drivers |
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*/ |
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#define CONFIG_SMC91111 |
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#define CONFIG_SMC_USE_32_BIT |
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#define CONFIG_SMC91111_BASE 0x10010000 |
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#undef CONFIG_SMC91111_EXT_PHY |
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/*
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* NS16550 Configuration |
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*/ |
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#define CONFIG_PL011_SERIAL |
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#define CONFIG_PL011_CLOCK 24000000 |
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#define CONFIG_PL01x_PORTS \ |
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{(void *)CONFIG_SYS_SERIAL0, \
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(void *)CONFIG_SYS_SERIAL1 } |
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#define CONFIG_CONS_INDEX 0 |
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#define CONFIG_BAUDRATE 38400 |
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#define CONFIG_SYS_SERIAL0 0x101F1000 |
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#define CONFIG_SYS_SERIAL1 0x101F2000 |
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/*
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* Command line configuration. |
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*/ |
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#define CONFIG_CMD_DHCP |
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#define CONFIG_CMD_PING |
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/*
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* BOOTP options |
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*/ |
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#define CONFIG_BOOTP_BOOTPATH |
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#define CONFIG_BOOTP_GATEWAY |
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#define CONFIG_BOOTP_HOSTNAME |
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#define CONFIG_BOOTP_SUBNETMASK |
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#define CONFIG_BOOTDELAY 2 |
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#define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp "\ |
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"netdev=25,0,0xf1010000,0xf1010010,eth0 "\
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"console=ttyAMA0,38400n1" |
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/*
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* Static configuration when assigning fixed address |
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*/ |
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#define CONFIG_BOOTFILE "/tftpboot/uImage" /* file to load */ |
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/*
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* Miscellaneous configurable options |
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*/ |
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#define CONFIG_SYS_LONGHELP /* undef to save memory */ |
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
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/* Monitor Command Prompt */ |
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#undef CONFIG_SYS_PROMPT |
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#ifdef CONFIG_ARCH_VERSATILE_AB |
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# define CONFIG_SYS_PROMPT "VersatileAB # " |
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#else |
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# define CONFIG_SYS_PROMPT "VersatilePB # " |
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#endif |
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/* Print Buffer Size */ |
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#define CONFIG_SYS_PBSIZE \ |
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
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#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */ |
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/*-----------------------------------------------------------------------
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* Physical Memory Map |
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*/ |
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ |
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#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ |
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#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ |
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#define PHYS_FLASH_SIZE 0x04000000 /* 64MB */ |
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
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#define CONFIG_SYS_INIT_RAM_ADDR 0x00800000 |
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#define CONFIG_SYS_INIT_RAM_SIZE 0x000FFFFF |
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#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ |
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GENERATED_GBL_DATA_SIZE) |
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
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CONFIG_SYS_GBL_DATA_OFFSET) |
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#define CONFIG_BOARD_EARLY_INIT_F |
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/*-----------------------------------------------------------------------
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* FLASH and environment organization |
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*/ |
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#ifdef CONFIG_ARCH_VERSATILE_QEMU |
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#define CONFIG_SYS_TEXT_BASE 0x10000 |
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#define CONFIG_SYS_NO_FLASH |
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#define CONFIG_ENV_IS_NOWHERE |
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#define CONFIG_SYS_MONITOR_LEN 0x80000 |
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#else |
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#define CONFIG_SYS_TEXT_BASE 0x01000000 |
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/*
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* Use the CFI flash driver for ease of use |
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*/ |
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#define CONFIG_SYS_FLASH_CFI |
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#define CONFIG_FLASH_CFI_DRIVER |
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#define CONFIG_ENV_IS_IN_FLASH 1 |
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/*
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* System control register |
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*/ |
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#define VERSATILE_SYS_BASE 0x10000000 |
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#define VERSATILE_SYS_FLASH_OFFSET 0x4C |
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#define VERSATILE_FLASHCTRL \ |
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(VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET) |
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/* Enable writing to flash */ |
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#define VERSATILE_FLASHPROG_FLVPPEN (1 << 0) |
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/* timeout values are in ticks */ |
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#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */ |
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#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */ |
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/*
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* Note that CONFIG_SYS_MAX_FLASH_SECT allows for a parameter block |
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* i.e. |
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* the bottom "sector" (bottom boot), or top "sector" |
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* (top boot), is a seperate erase region divided into |
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* 4 (equal) smaller sectors. This, notionally, allows |
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* quicker erase/rewrire of the most frequently changed |
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* area...... |
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* CONFIG_SYS_MAX_FLASH_SECT is padded up to a multiple of 4 |
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*/ |
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#ifdef CONFIG_ARCH_VERSATILE_AB |
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#define FLASH_SECTOR_SIZE 0x00020000 /* 128 KB sectors */ |
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#define CONFIG_ENV_SECT_SIZE (2 * FLASH_SECTOR_SIZE) |
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#define CONFIG_SYS_MAX_FLASH_SECT (520) |
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#endif |
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#ifdef CONFIG_ARCH_VERSATILE_PB /* Versatile PB is default */ |
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#define FLASH_SECTOR_SIZE 0x00040000 /* 256 KB sectors */ |
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#define CONFIG_ENV_SECT_SIZE FLASH_SECTOR_SIZE |
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#define CONFIG_SYS_MAX_FLASH_SECT (260) |
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#endif |
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#define CONFIG_SYS_FLASH_BASE 0x34000000 |
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 |
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#define CONFIG_SYS_MONITOR_LEN (4 * CONFIG_ENV_SECT_SIZE) |
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/* The ARM Boot Monitor is shipped in the lowest sector of flash */ |
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#define FLASH_TOP (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE) |
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#define CONFIG_ENV_ADDR (FLASH_TOP - CONFIG_ENV_SECT_SIZE) |
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#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) |
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#define CONFIG_SYS_MONITOR_BASE (CONFIG_ENV_ADDR - CONFIG_SYS_MONITOR_LEN) |
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#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ |
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#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ |
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */ |
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#endif |
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#endif /* __CONFIG_H */ |
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