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@ -233,35 +233,6 @@ DBSC2_DBRFCNT0_D: .long 0x00010000 |
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WAIT_200US: .long 33333 |
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/*------- GPIO -------*/ |
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#define GPIO_BASE 0xffe70000 |
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PACR_A: .long GPIO_BASE + 0x00 |
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PBCR_A: .long GPIO_BASE + 0x02 |
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PCCR_A: .long GPIO_BASE + 0x04 |
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PDCR_A: .long GPIO_BASE + 0x06 |
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PECR_A: .long GPIO_BASE + 0x08 |
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PFCR_A: .long GPIO_BASE + 0x0a |
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PGCR_A: .long GPIO_BASE + 0x0c |
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PHCR_A: .long GPIO_BASE + 0x0e |
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PJCR_A: .long GPIO_BASE + 0x10 |
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PKCR_A: .long GPIO_BASE + 0x12 |
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PLCR_A: .long GPIO_BASE + 0x14 |
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PMCR_A: .long GPIO_BASE + 0x16 |
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PNCR_A: .long GPIO_BASE + 0x18 |
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PPCR_A: .long GPIO_BASE + 0x1a |
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PQCR_A: .long GPIO_BASE + 0x1c |
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PRCR_A: .long GPIO_BASE + 0x1e |
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PEPUPR_A: .long GPIO_BASE + 0x48 |
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PHPUPR_A: .long GPIO_BASE + 0x4e |
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PJPUPR_A: .long GPIO_BASE + 0x50 |
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PKPUPR_A: .long GPIO_BASE + 0x52 |
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PLPUPR_A: .long GPIO_BASE + 0x54 |
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PMPUPR_A: .long GPIO_BASE + 0x56 |
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PNPUPR_A: .long GPIO_BASE + 0x58 |
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PPUPR1_A: .long GPIO_BASE + 0x60 |
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PPUPR2_A: .long GPIO_BASE + 0x62 |
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P1MSELR_A: .long GPIO_BASE + 0x80 |
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P2MSELR_A: .long GPIO_BASE + 0x82 |
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PACR_D: .long 0x0000 |
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PBCR_D: .long 0x0000 |
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PCCR_D: .long 0x0000 |
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@ -291,6 +262,35 @@ PPUPR2_D: .long 0xff00 |
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P1MSELR_D: .long 0x3780 |
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P2MSELR_D: .long 0x0000 |
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#define GPIO_BASE 0xffe70000 |
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PACR_A: .long GPIO_BASE + 0x00 |
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PBCR_A: .long GPIO_BASE + 0x02 |
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PCCR_A: .long GPIO_BASE + 0x04 |
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PDCR_A: .long GPIO_BASE + 0x06 |
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PECR_A: .long GPIO_BASE + 0x08 |
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PFCR_A: .long GPIO_BASE + 0x0a |
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PGCR_A: .long GPIO_BASE + 0x0c |
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PHCR_A: .long GPIO_BASE + 0x0e |
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PJCR_A: .long GPIO_BASE + 0x10 |
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PKCR_A: .long GPIO_BASE + 0x12 |
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PLCR_A: .long GPIO_BASE + 0x14 |
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PMCR_A: .long GPIO_BASE + 0x16 |
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PNCR_A: .long GPIO_BASE + 0x18 |
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PPCR_A: .long GPIO_BASE + 0x1a |
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PQCR_A: .long GPIO_BASE + 0x1c |
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PRCR_A: .long GPIO_BASE + 0x1e |
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PEPUPR_A: .long GPIO_BASE + 0x48 |
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PHPUPR_A: .long GPIO_BASE + 0x4e |
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PJPUPR_A: .long GPIO_BASE + 0x50 |
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PKPUPR_A: .long GPIO_BASE + 0x52 |
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PLPUPR_A: .long GPIO_BASE + 0x54 |
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PMPUPR_A: .long GPIO_BASE + 0x56 |
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PNPUPR_A: .long GPIO_BASE + 0x58 |
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PPUPR1_A: .long GPIO_BASE + 0x60 |
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PPUPR2_A: .long GPIO_BASE + 0x62 |
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P1MSELR_A: .long GPIO_BASE + 0x80 |
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P2MSELR_A: .long GPIO_BASE + 0x82 |
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/*------- LBSC -------*/ |
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PASCR_A: .long 0xff000070 |
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PASCR_32BIT_MODE: .long 0x80000000 /* check booting mode */ |
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