PXA: ZipitZ2 support

This patch adds support for Aeronix Zipit Z2 handheld. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
15 years ago · bc3a4a53a7
parent 2e49984bd1
commit bc3a4a53a7
8 changed files with 625 additions and 0 deletions
--- a/1
+++ b/1
@ -720,6 +720,7 @@ LIST_pxa="		\
 	xaeniax		\
 	xm250		\
 	xsengine	\
+	zipitz2		\
 	zylonite	\
 "

--- a/board/zipitz2/Makefile
+++ b/board/zipitz2/Makefile
@ -0,0 +1,54 @@
+
+#
+# Copyright (C) 2009
+# Marek Vasut <marek.vasut@gmail.com>
+#
+# Heavily based on pxa255_idp platform
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	:= zipitz2.o
+SOBJS	:= lowlevel_init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
--- a/board/zipitz2/config.mk
+++ b/board/zipitz2/config.mk
@ -0,0 +1 @@
+TEXT_BASE = 0xa1000000
--- a/board/zipitz2/lowlevel_init.S
+++ b/board/zipitz2/lowlevel_init.S
@ -0,0 +1,40 @@
+/*
+ * Aeronix Zipit Z2 Lowlevel Hardware Initialization
+ *
+ * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
+ *
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/macro.h>
+
+.globl lowlevel_init
+lowlevel_init:
+	pxa_gpio_setup
+	pxa_wait_ticks	0x8000
+	pxa_mem_setup
+	pxa_wakeup
+	pxa_intr_setup
+	pxa_clock_setup
+
+	mov	pc, lr
--- a/board/zipitz2/u-boot.lds
+++ b/board/zipitz2/u-boot.lds
@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2000-2005
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text      :
+	{
+	  cpu/pxa/start.o	(.text)
+	  *(.text)
+	}
+
+	. = ALIGN(4);
+	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
+
+	. = ALIGN(4);
+	.data : { *(.data) }
+
+	. = ALIGN(4);
+	.got : { *(.got) }
+
+	. = .;
+	__u_boot_cmd_start = .;
+	.u_boot_cmd : { *(.u_boot_cmd) }
+	__u_boot_cmd_end = .;
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
+	_end = .;
+}
--- a/board/zipitz2/zipitz2.c
+++ b/board/zipitz2/zipitz2.c
@ -0,0 +1,213 @@
+/*
+ * Copyright (C) 2009
+ * Marek Vasut <marek.vasut@gmail.com>
+ *
+ * Heavily based on pxa255_idp platform
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <serial.h>
+#include <asm/arch/hardware.h>
+#include <spi.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef	CONFIG_CMD_SPI
+void lcd_start(void);
+#else
+inline void lcd_start(void) {};
+#endif
+
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+int board_init (void)
+{
+	/* memory and cpu-speed are setup before relocation */
+	/* so we do _nothing_ here */
+
+	/* arch number of Lubbock-Board */
+	gd->bd->bi_arch_number = MACH_TYPE_ZIPIT2;
+
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = 0xa0000100;
+
+	/* Enable LCD */
+	lcd_start();
+
+	return 0;
+}
+
+int board_late_init(void)
+{
+	setenv("stdout", "serial");
+	setenv("stderr", "serial");
+	return 0;
+}
+
+struct serial_device *default_serial_console (void)
+{
+	return &serial_stuart_device;
+}
+
+int dram_init (void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+	return 0;
+}
+
+#ifdef	CONFIG_CMD_SPI
+
+struct {
+	unsigned char	reg;
+	unsigned short	data;
+	unsigned char	mdelay;
+} lcd_data[] = {
+	{ 0x07,	0x0000,	0 },
+	{ 0x13,	0x0000,	10 },
+	{ 0x11,	0x3004,	0 },
+	{ 0x14,	0x200F,	0 },
+	{ 0x10,	0x1a20,	0 },
+	{ 0x13,	0x0040,	50 },
+	{ 0x13,	0x0060,	0 },
+	{ 0x13,	0x0070,	200 },
+	{ 0x01,	0x0127,	0 },
+	{ 0x02,	0x0700,	0 },
+	{ 0x03,	0x1030,	0 },
+	{ 0x08,	0x0208,	0 },
+	{ 0x0B,	0x0620,	0 },
+	{ 0x0C,	0x0110,	0 },
+	{ 0x30,	0x0120,	0 },
+	{ 0x31,	0x0127,	0 },
+	{ 0x32,	0x0000,	0 },
+	{ 0x33,	0x0503,	0 },
+	{ 0x34,	0x0727,	0 },
+	{ 0x35,	0x0124,	0 },
+	{ 0x36,	0x0706,	0 },
+	{ 0x37,	0x0701,	0 },
+	{ 0x38,	0x0F00,	0 },
+	{ 0x39,	0x0F00,	0 },
+	{ 0x40,	0x0000,	0 },
+	{ 0x41,	0x0000,	0 },
+	{ 0x42,	0x013f,	0 },
+	{ 0x43,	0x0000,	0 },
+	{ 0x44,	0x013f,	0 },
+	{ 0x45,	0x0000,	0 },
+	{ 0x46,	0xef00,	0 },
+	{ 0x47,	0x013f,	0 },
+	{ 0x48,	0x0000,	0 },
+	{ 0x07,	0x0015,	30 },
+	{ 0x07,	0x0017,	0 },
+	{ 0x20,	0x0000,	0 },
+	{ 0x21,	0x0000,	0 },
+	{ 0x22,	0x0000,	0 },
+};
+
+void zipitz2_spi_sda(int set)
+{
+	/* GPIO 13 */
+	if (set)
+		GPSR0 = (1 << 13);
+	else
+		GPCR0 = (1 << 13);
+}
+
+void zipitz2_spi_scl(int set)
+{
+	/* GPIO 22 */
+	if (set)
+		GPCR0 = (1 << 22);
+	else
+		GPSR0 = (1 << 22);
+}
+
+unsigned char zipitz2_spi_read(void)
+{
+	/* GPIO 40 */
+	return !!(GPLR1 & (1 << 8));
+}
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+	/* Always valid */
+	return 1;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+	/* GPIO 88 low */
+	GPCR2 = (1 << 24);
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+	/* GPIO 88 high */
+	GPSR2 = (1 << 24);
+
+}
+
+void lcd_start(void)
+{
+	int i;
+	unsigned char reg[3] = { 0x74, 0x00, 0 };
+	unsigned char data[3] = { 0x76, 0, 0 };
+	unsigned char dummy[3] = { 0, 0, 0 };
+
+	/* PWM2 AF */
+	GAFR0_L |= 0x00800000;
+	/* Enable clock to all PWM */
+	CKEN |= 0x3;
+	/* Configure PWM2 */
+	PWM_CTRL2 = 0x4f;
+	PWM_PWDUTY2 = 0x2ff;
+	PWM_PERVAL2 = 792;
+
+	/* Toggle the reset pin to reset the LCD */
+	GPSR0 = (1 << 19);
+	udelay(100000);
+	GPCR0 = (1 << 19);
+	udelay(20000);
+	GPSR0 = (1 << 19);
+	udelay(20000);
+
+	/* Program the LCD init sequence */
+	for (i = 0; i < sizeof(lcd_data) / sizeof(lcd_data[0]); i++) {
+		reg[0] = 0x74;
+		reg[1] = 0x0;
+		reg[2] = lcd_data[i].reg;
+		spi_xfer(NULL, 24, reg, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
+
+		data[0] = 0x76;
+		data[1] = lcd_data[i].data >> 8;
+		data[2] = lcd_data[i].data & 0xff;
+		spi_xfer(NULL, 24, data, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
+
+		if (lcd_data[i].mdelay)
+			udelay(lcd_data[i].mdelay * 1000);
+	}
+
+	GPSR0 = (1 << 11);
+}
+#endif
--- a/boards.cfg
+++ b/boards.cfg
@ -62,6 +62,7 @@ lubbock		arm	pxa
 pleb2		arm	pxa
 xaeniax		arm	pxa
 xm250		arm	pxa
+zipitz2		arm	pxa
 B2		arm	s3c44b0		-		dave
 assabet		arm	sa1100
 dnp1110		arm	sa1100
--- a/include/configs/zipitz2.h
+++ b/include/configs/zipitz2.h
@ -0,0 +1,259 @@
+/*
+ * Aeronix Zipit Z2 configuration file
+ *
+ * Copyright (C) 2009-2010 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Board Configuration Options
+ */
+#define	CONFIG_PXA27X		1	/* Marvell PXA270 CPU */
+#define	CONFIG_ZIPITZ2		1	/* Zipit Z2 board */
+
+#undef	BOARD_LATE_INIT
+#undef	CONFIG_SKIP_RELOCATE_UBOOT
+#undef	CONFIG_USE_IRQ
+#undef	CONFIG_SKIP_LOWLEVEL_INIT
+
+/*
+ * Environment settings
+ */
+#define	CONFIG_ENV_OVERWRITE
+#define CONFIG_ENV_IS_IN_FLASH		1
+#define CONFIG_ENV_ADDR			0x40000
+#define CONFIG_ENV_SIZE			0x20000
+
+#define	CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + CONFIG_STACKSIZE)
+#define	CONFIG_SYS_GBL_DATA_SIZE	512
+
+#define	CONFIG_BOOTCOMMAND						\
+	"if mmc init && fatload mmc 0 0xa0000000 uboot.script ; then "	\
+		"source 0xa0000000; "					\
+	"else "								\
+		"bootm 0x60000; "					\
+	"fi; "
+#define	CONFIG_BOOTARGS							\
+	"console=tty0 console=ttyS2,115200 fbcon=rotate:3"
+#define	CONFIG_TIMESTAMP
+#define	CONFIG_BOOTDELAY		2	/* Autoboot delay */
+#define	CONFIG_CMDLINE_TAG
+#define	CONFIG_SETUP_MEMORY_TAGS
+
+#define	CONFIG_LZMA			/* LZMA compression support */
+
+/*
+ * Serial Console Configuration
+ * STUART - the lower serial port on Colibri board
+ */
+#define	CONFIG_PXA_SERIAL
+#define	CONFIG_STUART			1
+#define	CONFIG_BAUDRATE			115200
+#define	CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * Bootloader Components Configuration
+ */
+#include <config_cmd_default.h>
+
+#undef	CONFIG_CMD_NET
+#define	CONFIG_CMD_ENV
+#undef	CONFIG_CMD_IMLS
+#define	CONFIG_CMD_MMC
+#define	CONFIG_CMD_SPI
+
+/*
+ * MMC Card Configuration
+ */
+#ifdef	CONFIG_CMD_MMC
+#define	CONFIG_MMC
+#define	CONFIG_PXA_MMC
+#define	CONFIG_SYS_MMC_BASE		0xF0000000
+#define	CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
+#define	CONFIG_DOS_PARTITION
+#endif
+
+/*
+ * SPI and LCD
+ */
+#ifdef	CONFIG_CMD_SPI
+#define	CONFIG_SOFT_SPI
+#define	CONFIG_LCD
+#define	CONFIG_LMS283GF05
+#define	CONFIG_VIDEO_LOGO
+#define	CONFIG_CMD_BMP
+#define	CONFIG_SPLASH_SCREEN
+#define	CONFIG_SPLASH_SCREEN_ALIGN
+#define	CONFIG_VIDEO_BMP_GZIP
+#define	CONFIG_VIDEO_BMP_RLE8
+#define	CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	(2 << 20)
+#undef	SPI_INIT
+
+#define	SPI_DELAY	udelay(10)
+#define	SPI_SDA(val)	zipitz2_spi_sda(val)
+#define	SPI_SCL(val)	zipitz2_spi_scl(val)
+#define	SPI_READ	zipitz2_spi_read()
+#ifndef	__ASSEMBLY__
+void zipitz2_spi_sda(int);
+void zipitz2_spi_scl(int);
+unsigned char zipitz2_spi_read(void);
+#endif
+#endif
+
+/*
+ * KGDB
+ */
+#ifdef	CONFIG_CMD_KGDB
+#define	CONFIG_KGDB_BAUDRATE		230400		/* speed to run kgdb serial port */
+#define	CONFIG_KGDB_SER_INDEX		2		/* which serial port to use */
+#endif
+
+/*
+ * HUSH Shell Configuration
+ */
+#define	CONFIG_SYS_HUSH_PARSER		1
+#define	CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+
+#define	CONFIG_SYS_LONGHELP				/* undef to save memory	*/
+#ifdef	CONFIG_SYS_HUSH_PARSER
+#define	CONFIG_SYS_PROMPT		"$ "		/* Monitor Command Prompt */
+#else
+#define	CONFIG_SYS_PROMPT		"=> "		/* Monitor Command Prompt */
+#endif
+#define	CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size */
+#define	CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
+#define	CONFIG_SYS_MAXARGS		16		/* max number of command args */
+#define	CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size */
+#define	CONFIG_SYS_DEVICE_NULLDEV	1
+
+/*
+ * Clock Configuration
+ */
+#undef	CONFIG_SYS_CLKS_IN_HZ
+#define	CONFIG_SYS_HZ			3250000		/* Timer @ 3250000 Hz */
+#define CONFIG_SYS_CPUSPEED		0x190		/* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */
+
+/*
+ * Stack sizes
+ */
+#define	CONFIG_STACKSIZE		(128*1024)	/* regular stack */
+#ifdef	CONFIG_USE_IRQ
+#define	CONFIG_STACKSIZE_IRQ		(4*1024)	/* IRQ stack */
+#define	CONFIG_STACKSIZE_FIQ		(4*1024)	/* FIQ stack */
+#endif
+
+/*
+ * DRAM Map
+ */
+#define	CONFIG_NR_DRAM_BANKS		1		/* We have 1 bank of DRAM */
+#define	PHYS_SDRAM_1			0xa0000000	/* SDRAM Bank #1 */
+#define	PHYS_SDRAM_1_SIZE		0x02000000	/* 32 MB */
+
+#define	CONFIG_SYS_DRAM_BASE		0xa0000000	/* CS0 */
+#define	CONFIG_SYS_DRAM_SIZE		0x02000000	/* 32 MB DRAM */
+
+#define CONFIG_SYS_MEMTEST_START	0xa0400000	/* memtest works on */
+#define CONFIG_SYS_MEMTEST_END		0xa0800000	/* 4 ... 8 MB in DRAM */
+
+#define	CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_DRAM_BASE
+
+/*
+ * NOR FLASH
+ */
+#define PHYS_FLASH_1			0x00000000	/* Flash Bank #1 */
+#define PHYS_FLASH_SIZE			0x00800000	/* 8 MB */
+#define PHYS_FLASH_SECT_SIZE		0x00010000	/* 64 KB sectors */
+#define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
+
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER		1
+#define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_16BIT
+
+#define CONFIG_SYS_MONITOR_BASE		PHYS_FLASH_1
+#define CONFIG_SYS_MONITOR_LEN		PHYS_FLASH_SECT_SIZE
+
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+#define CONFIG_SYS_MAX_FLASH_SECT	256
+
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1
+
+#define CONFIG_SYS_FLASH_ERASE_TOUT	(2*CONFIG_SYS_HZ)
+#define CONFIG_SYS_FLASH_WRITE_TOUT	(2*CONFIG_SYS_HZ)
+#define CONFIG_SYS_FLASH_LOCK_TOUT	(2*CONFIG_SYS_HZ)
+#define CONFIG_SYS_FLASH_UNLOCK_TOUT	(2*CONFIG_SYS_HZ)
+#define CONFIG_SYS_FLASH_PROTECTION
+
+/*
+ * GPIO settings
+ */
+#define CONFIG_SYS_GAFR0_L_VAL	0x02000140
+#define CONFIG_SYS_GAFR0_U_VAL	0x59188000
+#define CONFIG_SYS_GAFR1_L_VAL	0x63900002
+#define CONFIG_SYS_GAFR1_U_VAL	0xaaa03950
+#define CONFIG_SYS_GAFR2_L_VAL	0x0aaaaaaa
+#define CONFIG_SYS_GAFR2_U_VAL	0x29000308
+#define CONFIG_SYS_GAFR3_L_VAL	0x54000000
+#define CONFIG_SYS_GAFR3_U_VAL	0x000000d5
+#define CONFIG_SYS_GPCR0_VAL	0x00000000
+#define CONFIG_SYS_GPCR1_VAL	0x00000020
+#define CONFIG_SYS_GPCR2_VAL	0x00000000
+#define CONFIG_SYS_GPCR3_VAL	0x00000000
+#define CONFIG_SYS_GPDR0_VAL	0xdafcee00
+#define CONFIG_SYS_GPDR1_VAL	0xffa3aaab
+#define CONFIG_SYS_GPDR2_VAL	0x8fe1ffff
+#define CONFIG_SYS_GPDR3_VAL	0x001b1f8a
+#define CONFIG_SYS_GPSR0_VAL	0x06080400
+#define CONFIG_SYS_GPSR1_VAL	0x007f0000
+#define CONFIG_SYS_GPSR2_VAL	0x032a0000
+#define CONFIG_SYS_GPSR3_VAL	0x00000180
+
+#define CONFIG_SYS_PSSR_VAL	0x30
+
+/*
+ * Clock settings
+ */
+#define CONFIG_SYS_CKEN		0x00511220
+#define CONFIG_SYS_CCCR		0x00000190
+
+/*
+ * Memory settings
+ */
+#define CONFIG_SYS_MSC0_VAL	0x2ffc38f8
+#define CONFIG_SYS_MSC1_VAL	0x0000ccd1
+#define CONFIG_SYS_MSC2_VAL	0x0000b884
+#define CONFIG_SYS_MDCNFG_VAL	0x08000ba9
+#define CONFIG_SYS_MDREFR_VAL	0x2011a01e
+#define CONFIG_SYS_MDMRS_VAL	0x00000000
+#define CONFIG_SYS_FLYCNFG_VAL	0x00010001
+#define CONFIG_SYS_SXCNFG_VAL	0x40044004
+
+/*
+ * PCMCIA and CF Interfaces
+ */
+#define CONFIG_SYS_MECR_VAL	0x00000001
+#define CONFIG_SYS_MCMEM0_VAL	0x00014307
+#define CONFIG_SYS_MCMEM1_VAL	0x00014307
+#define CONFIG_SYS_MCATT0_VAL	0x0001c787
+#define CONFIG_SYS_MCATT1_VAL	0x0001c787
+#define CONFIG_SYS_MCIO0_VAL	0x0001430f
+#define CONFIG_SYS_MCIO1_VAL	0x0001430f
+
+#endif	/* __CONFIG_H */