arm: Show cache warnings in U-Boot proper only

Avoid bloating the SPL image size.

Signed-off-by: Simon Glass <sjg@chromium.org>
master
Simon Glass 9 years ago committed by Tom Rini
parent 982868264e
commit bcc53bf095
  1. 4
      arch/arm/lib/cache.c

@ -61,8 +61,8 @@ int check_cache_range(unsigned long start, unsigned long stop)
ok = 0;
if (!ok) {
debug("CACHE: Misaligned operation at range [%08lx, %08lx]\n",
start, stop);
warn_non_spl("CACHE: Misaligned operation at range [%08lx, %08lx]\n",
start, stop);
}
return ok;

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