Tom Rini
13 years ago
commit
bdc3ff6e4f
@ -0,0 +1,92 @@ |
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/*
|
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* Generic bounce buffer implementation |
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* |
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* Copyright (C) 2012 Marek Vasut <marex@denx.de> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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|
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#include <common.h> |
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#include <malloc.h> |
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#include <errno.h> |
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#include <bouncebuf.h> |
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static int addr_aligned(void *data, size_t len) |
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{ |
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const ulong align_mask = ARCH_DMA_MINALIGN - 1; |
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/* Check if start is aligned */ |
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if ((ulong)data & align_mask) { |
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debug("Unaligned start address %p\n", data); |
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return 0; |
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} |
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data += len; |
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/* Check if end is aligned */ |
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if ((ulong)data & align_mask) { |
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debug("Unaligned end address %p\n", data); |
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return 0; |
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} |
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/* Aligned */ |
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return 1; |
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} |
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int bounce_buffer_start(void **data, size_t len, void **backup, uint8_t flags) |
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{ |
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void *tmp; |
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size_t alen; |
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if (addr_aligned(*data, len)) { |
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*backup = NULL; |
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return 0; |
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} |
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alen = roundup(len, ARCH_DMA_MINALIGN); |
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tmp = memalign(ARCH_DMA_MINALIGN, alen); |
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if (!tmp) |
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return -ENOMEM; |
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if (flags & GEN_BB_READ) |
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memcpy(tmp, *data, len); |
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*backup = *data; |
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*data = tmp; |
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return 0; |
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} |
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int bounce_buffer_stop(void **data, size_t len, void **backup, uint8_t flags) |
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{ |
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void *tmp = *data; |
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/* The buffer was already aligned, since "backup" is NULL. */ |
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if (!*backup) |
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return 0; |
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if (flags & GEN_BB_WRITE) |
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memcpy(*backup, *data, len); |
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*data = *backup; |
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free(tmp); |
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return 0; |
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} |
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@ -0,0 +1,385 @@ |
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/*
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* (C) Copyright 2012 SAMSUNG Electronics |
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* Jaehoon Chung <jh80.chung@samsung.com> |
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* Rajeshawari Shinde <rajeshwari.s@samsung.com> |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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* |
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*/ |
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#include <common.h> |
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#include <malloc.h> |
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#include <mmc.h> |
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#include <dwmmc.h> |
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#include <asm/arch/clk.h> |
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#include <asm-generic/errno.h> |
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#define PAGE_SIZE 4096 |
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static int dwmci_wait_reset(struct dwmci_host *host, u32 value) |
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{ |
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unsigned long timeout = 1000; |
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u32 ctrl; |
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dwmci_writel(host, DWMCI_CTRL, value); |
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while (timeout--) { |
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ctrl = dwmci_readl(host, DWMCI_CTRL); |
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if (!(ctrl & DWMCI_RESET_ALL)) |
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return 1; |
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} |
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return 0; |
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} |
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static void dwmci_set_idma_desc(struct dwmci_idmac *idmac, |
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u32 desc0, u32 desc1, u32 desc2) |
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{ |
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struct dwmci_idmac *desc = idmac; |
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desc->flags = desc0; |
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desc->cnt = desc1; |
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desc->addr = desc2; |
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desc->next_addr = (unsigned int)desc + sizeof(struct dwmci_idmac); |
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} |
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static void dwmci_prepare_data(struct dwmci_host *host, |
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struct mmc_data *data) |
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{ |
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unsigned long ctrl; |
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unsigned int i = 0, flags, cnt, blk_cnt; |
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ulong data_start, data_end, start_addr; |
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ALLOC_CACHE_ALIGN_BUFFER(struct dwmci_idmac, cur_idmac, data->blocks); |
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blk_cnt = data->blocks; |
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dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET); |
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data_start = (ulong)cur_idmac; |
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dwmci_writel(host, DWMCI_DBADDR, (unsigned int)cur_idmac); |
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if (data->flags == MMC_DATA_READ) |
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start_addr = (unsigned int)data->dest; |
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else |
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start_addr = (unsigned int)data->src; |
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do { |
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flags = DWMCI_IDMAC_OWN | DWMCI_IDMAC_CH ; |
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flags |= (i == 0) ? DWMCI_IDMAC_FS : 0; |
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if (blk_cnt <= 8) { |
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flags |= DWMCI_IDMAC_LD; |
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cnt = data->blocksize * blk_cnt; |
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} else |
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cnt = data->blocksize * 8; |
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dwmci_set_idma_desc(cur_idmac, flags, cnt, |
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start_addr + (i * PAGE_SIZE)); |
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if(blk_cnt < 8) |
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break; |
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blk_cnt -= 8; |
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cur_idmac++; |
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i++; |
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} while(1); |
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data_end = (ulong)cur_idmac; |
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flush_dcache_range(data_start, data_end + ARCH_DMA_MINALIGN); |
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ctrl = dwmci_readl(host, DWMCI_CTRL); |
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ctrl |= DWMCI_IDMAC_EN | DWMCI_DMA_EN; |
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dwmci_writel(host, DWMCI_CTRL, ctrl); |
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ctrl = dwmci_readl(host, DWMCI_BMOD); |
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ctrl |= DWMCI_BMOD_IDMAC_FB | DWMCI_BMOD_IDMAC_EN; |
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dwmci_writel(host, DWMCI_BMOD, ctrl); |
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dwmci_writel(host, DWMCI_BLKSIZ, data->blocksize); |
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dwmci_writel(host, DWMCI_BYTCNT, data->blocksize * data->blocks); |
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} |
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static int dwmci_set_transfer_mode(struct dwmci_host *host, |
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struct mmc_data *data) |
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{ |
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unsigned long mode; |
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mode = DWMCI_CMD_DATA_EXP; |
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if (data->flags & MMC_DATA_WRITE) |
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mode |= DWMCI_CMD_RW; |
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return mode; |
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} |
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static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, |
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struct mmc_data *data) |
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{ |
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struct dwmci_host *host = (struct dwmci_host *)mmc->priv; |
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int flags = 0, i; |
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unsigned int timeout = 100000; |
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u32 retry = 10000; |
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u32 mask, ctrl; |
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while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) { |
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if (timeout == 0) { |
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printf("Timeout on data busy\n"); |
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return TIMEOUT; |
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} |
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timeout--; |
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} |
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dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL); |
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if (data) |
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dwmci_prepare_data(host, data); |
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dwmci_writel(host, DWMCI_CMDARG, cmd->cmdarg); |
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if (data) |
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flags = dwmci_set_transfer_mode(host, data); |
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if ((cmd->resp_type & MMC_RSP_136) && (cmd->resp_type & MMC_RSP_BUSY)) |
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return -1; |
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if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) |
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flags |= DWMCI_CMD_ABORT_STOP; |
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else |
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flags |= DWMCI_CMD_PRV_DAT_WAIT; |
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if (cmd->resp_type & MMC_RSP_PRESENT) { |
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flags |= DWMCI_CMD_RESP_EXP; |
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if (cmd->resp_type & MMC_RSP_136) |
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flags |= DWMCI_CMD_RESP_LENGTH; |
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} |
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if (cmd->resp_type & MMC_RSP_CRC) |
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flags |= DWMCI_CMD_CHECK_CRC; |
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flags |= (cmd->cmdidx | DWMCI_CMD_START | DWMCI_CMD_USE_HOLD_REG); |
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debug("Sending CMD%d\n",cmd->cmdidx); |
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dwmci_writel(host, DWMCI_CMD, flags); |
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for (i = 0; i < retry; i++) { |
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mask = dwmci_readl(host, DWMCI_RINTSTS); |
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if (mask & DWMCI_INTMSK_CDONE) { |
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if (!data) |
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dwmci_writel(host, DWMCI_RINTSTS, mask); |
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break; |
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} |
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} |
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if (i == retry) |
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return TIMEOUT; |
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if (mask & DWMCI_INTMSK_RTO) { |
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debug("Response Timeout..\n"); |
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return TIMEOUT; |
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} else if (mask & DWMCI_INTMSK_RE) { |
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debug("Response Error..\n"); |
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return -1; |
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} |
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if (cmd->resp_type & MMC_RSP_PRESENT) { |
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if (cmd->resp_type & MMC_RSP_136) { |
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cmd->response[0] = dwmci_readl(host, DWMCI_RESP3); |
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cmd->response[1] = dwmci_readl(host, DWMCI_RESP2); |
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cmd->response[2] = dwmci_readl(host, DWMCI_RESP1); |
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cmd->response[3] = dwmci_readl(host, DWMCI_RESP0); |
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} else { |
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cmd->response[0] = dwmci_readl(host, DWMCI_RESP0); |
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} |
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} |
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if (data) { |
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do { |
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mask = dwmci_readl(host, DWMCI_RINTSTS); |
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if (mask & (DWMCI_DATA_ERR | DWMCI_DATA_TOUT)) { |
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debug("DATA ERROR!\n"); |
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return -1; |
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} |
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} while (!(mask & DWMCI_INTMSK_DTO)); |
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dwmci_writel(host, DWMCI_RINTSTS, mask); |
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ctrl = dwmci_readl(host, DWMCI_CTRL); |
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ctrl &= ~(DWMCI_DMA_EN); |
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dwmci_writel(host, DWMCI_CTRL, ctrl); |
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} |
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udelay(100); |
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return 0; |
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} |
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static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) |
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{ |
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u32 div, status; |
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int timeout = 10000; |
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unsigned long sclk; |
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if (freq == host->clock) |
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return 0; |
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/*
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* If host->mmc_clk didn't define, |
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* then assume that host->bus_hz is source clock value. |
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* host->bus_hz should be set from user. |
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*/ |
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if (host->mmc_clk) |
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sclk = host->mmc_clk(host->dev_index); |
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else if (host->bus_hz) |
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sclk = host->bus_hz; |
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else { |
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printf("Didn't get source clock value..\n"); |
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return -EINVAL; |
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} |
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div = DIV_ROUND_UP(sclk, 2 * freq); |
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dwmci_writel(host, DWMCI_CLKENA, 0); |
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dwmci_writel(host, DWMCI_CLKSRC, 0); |
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dwmci_writel(host, DWMCI_CLKDIV, div); |
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dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT | |
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DWMCI_CMD_UPD_CLK | DWMCI_CMD_START); |
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do { |
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status = dwmci_readl(host, DWMCI_CMD); |
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if (timeout-- < 0) { |
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printf("TIMEOUT error!!\n"); |
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return -ETIMEDOUT; |
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} |
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} while (status & DWMCI_CMD_START); |
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dwmci_writel(host, DWMCI_CLKENA, DWMCI_CLKEN_ENABLE | |
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DWMCI_CLKEN_LOW_PWR); |
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dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT | |
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DWMCI_CMD_UPD_CLK | DWMCI_CMD_START); |
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timeout = 10000; |
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do { |
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status = dwmci_readl(host, DWMCI_CMD); |
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if (timeout-- < 0) { |
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printf("TIMEOUT error!!\n"); |
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return -ETIMEDOUT; |
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} |
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} while (status & DWMCI_CMD_START); |
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|
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host->clock = freq; |
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|
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return 0; |
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} |
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|
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static void dwmci_set_ios(struct mmc *mmc) |
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{ |
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struct dwmci_host *host = (struct dwmci_host *)mmc->priv; |
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u32 ctype; |
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debug("Buswidth = %d, clock: %d\n",mmc->bus_width, mmc->clock); |
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dwmci_setup_bus(host, mmc->clock); |
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switch (mmc->bus_width) { |
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case 8: |
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ctype = DWMCI_CTYPE_8BIT; |
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break; |
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case 4: |
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ctype = DWMCI_CTYPE_4BIT; |
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break; |
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default: |
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ctype = DWMCI_CTYPE_1BIT; |
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break; |
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} |
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|
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dwmci_writel(host, DWMCI_CTYPE, ctype); |
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|
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if (host->clksel) |
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host->clksel(host); |
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} |
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|
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static int dwmci_init(struct mmc *mmc) |
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{ |
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struct dwmci_host *host = (struct dwmci_host *)mmc->priv; |
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u32 fifo_size, fifoth_val; |
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|
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dwmci_writel(host, DWMCI_PWREN, 1); |
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|
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if (!dwmci_wait_reset(host, DWMCI_RESET_ALL)) { |
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debug("%s[%d] Fail-reset!!\n",__func__,__LINE__); |
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return -1; |
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} |
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|
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dwmci_writel(host, DWMCI_RINTSTS, 0xFFFFFFFF); |
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dwmci_writel(host, DWMCI_INTMASK, 0); |
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|
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dwmci_writel(host, DWMCI_TMOUT, 0xFFFFFFFF); |
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|
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dwmci_writel(host, DWMCI_IDINTEN, 0); |
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dwmci_writel(host, DWMCI_BMOD, 1); |
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|
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fifo_size = dwmci_readl(host, DWMCI_FIFOTH); |
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if (host->fifoth_val) |
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fifoth_val = host->fifoth_val; |
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else |
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fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 -1) | |
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TX_WMARK(fifo_size/2); |
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dwmci_writel(host, DWMCI_FIFOTH, fifoth_val); |
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|
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dwmci_writel(host, DWMCI_CLKENA, 0); |
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dwmci_writel(host, DWMCI_CLKSRC, 0); |
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|
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return 0; |
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} |
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|
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int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk) |
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{ |
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struct mmc *mmc; |
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int err = 0; |
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|
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mmc = malloc(sizeof(struct mmc)); |
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if (!mmc) { |
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printf("mmc malloc fail!\n"); |
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return -1; |
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} |
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|
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mmc->priv = host; |
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host->mmc = mmc; |
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|
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sprintf(mmc->name, "%s", host->name); |
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mmc->send_cmd = dwmci_send_cmd; |
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mmc->set_ios = dwmci_set_ios; |
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mmc->init = dwmci_init; |
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mmc->f_min = min_clk; |
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mmc->f_max = max_clk; |
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|
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mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; |
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|
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mmc->host_caps = host->caps; |
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|
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if (host->buswidth == 8) { |
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mmc->host_caps |= MMC_MODE_8BIT; |
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mmc->host_caps &= ~MMC_MODE_4BIT; |
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} else { |
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mmc->host_caps |= MMC_MODE_4BIT; |
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mmc->host_caps &= ~MMC_MODE_8BIT; |
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} |
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mmc->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_HC; |
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|
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err = mmc_register(mmc); |
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|
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return err; |
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} |
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@ -1,643 +0,0 @@ |
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/*
|
||||
* (C) Copyright 2003 |
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* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net |
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* |
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* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <config.h> |
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#include <common.h> |
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#include <mmc.h> |
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#include <asm/errno.h> |
||||
#include <asm/arch/hardware.h> |
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#include <part.h> |
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#include <asm/io.h> |
||||
|
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#include "pxa_mmc.h" |
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|
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extern int fat_register_device(block_dev_desc_t * dev_desc, int part_no); |
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|
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static block_dev_desc_t mmc_dev; |
||||
|
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block_dev_desc_t *mmc_get_dev(int dev) |
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{ |
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return ((block_dev_desc_t *) & mmc_dev); |
||||
} |
||||
|
||||
/*
|
||||
* FIXME needs to read cid and csd info to determine block size |
||||
* and other parameters |
||||
*/ |
||||
static uchar mmc_buf[MMC_BLOCK_SIZE]; |
||||
static uchar spec_ver; |
||||
static int mmc_ready = 0; |
||||
static int wide = 0; |
||||
|
||||
static uint32_t * |
||||
/****************************************************/ |
||||
mmc_cmd(ushort cmd, ushort argh, ushort argl, ushort cmdat) |
||||
/****************************************************/ |
||||
{ |
||||
static uint32_t resp[4], a, b, c; |
||||
uint32_t status; |
||||
int i; |
||||
|
||||
debug("mmc_cmd %u 0x%04x 0x%04x 0x%04x\n", cmd, argh, argl, |
||||
cmdat | wide); |
||||
writel(MMC_STRPCL_STOP_CLK, MMC_STRPCL); |
||||
writel(~MMC_I_MASK_CLK_IS_OFF, MMC_I_MASK); |
||||
while (!(readl(MMC_I_REG) & MMC_I_REG_CLK_IS_OFF)) |
||||
; |
||||
writel(cmd, MMC_CMD); |
||||
writel(argh, MMC_ARGH); |
||||
writel(argl, MMC_ARGL); |
||||
writel(cmdat | wide, MMC_CMDAT); |
||||
writel(~MMC_I_MASK_END_CMD_RES, MMC_I_MASK); |
||||
writel(MMC_STRPCL_START_CLK, MMC_STRPCL); |
||||
while (!(readl(MMC_I_REG) & MMC_I_REG_END_CMD_RES)) |
||||
; |
||||
|
||||
status = readl(MMC_STAT); |
||||
debug("MMC status 0x%08x\n", status); |
||||
if (status & MMC_STAT_TIME_OUT_RESPONSE) { |
||||
return 0; |
||||
} |
||||
|
||||
/* Linux says:
|
||||
* Did I mention this is Sick. We always need to |
||||
* discard the upper 8 bits of the first 16-bit word. |
||||
*/ |
||||
a = (readl(MMC_RES) & 0xffff); |
||||
for (i = 0; i < 4; i++) { |
||||
b = (readl(MMC_RES) & 0xffff); |
||||
c = (readl(MMC_RES) & 0xffff); |
||||
resp[i] = (a << 24) | (b << 8) | (c >> 8); |
||||
a = c; |
||||
debug("MMC resp[%d] = %#08x\n", i, resp[i]); |
||||
} |
||||
|
||||
return resp; |
||||
} |
||||
|
||||
int |
||||
/****************************************************/ |
||||
mmc_block_read(uchar * dst, uint32_t src, int len) |
||||
/****************************************************/ |
||||
{ |
||||
ushort argh, argl; |
||||
ulong status; |
||||
|
||||
if (len == 0) { |
||||
return 0; |
||||
} |
||||
|
||||
debug("mmc_block_rd dst %p src %08x len %d\n", dst, src, len); |
||||
|
||||
argh = len >> 16; |
||||
argl = len & 0xffff; |
||||
|
||||
/* set block len */ |
||||
mmc_cmd(MMC_CMD_SET_BLOCKLEN, argh, argl, MMC_CMDAT_R1); |
||||
|
||||
/* send read command */ |
||||
argh = src >> 16; |
||||
argl = src & 0xffff; |
||||
writel(MMC_STRPCL_STOP_CLK, MMC_STRPCL); |
||||
writel(0xffff, MMC_RDTO); |
||||
writel(1, MMC_NOB); |
||||
writel(len, MMC_BLKLEN); |
||||
mmc_cmd(MMC_CMD_READ_SINGLE_BLOCK, argh, argl, |
||||
MMC_CMDAT_R1 | MMC_CMDAT_READ | MMC_CMDAT_BLOCK | |
||||
MMC_CMDAT_DATA_EN); |
||||
|
||||
writel(~MMC_I_MASK_RXFIFO_RD_REQ, MMC_I_MASK); |
||||
while (len) { |
||||
if (readl(MMC_I_REG) & MMC_I_REG_RXFIFO_RD_REQ) { |
||||
#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS) |
||||
int i; |
||||
for (i = min(len, 32); i; i--) { |
||||
*dst++ = readb(MMC_RXFIFO); |
||||
len--; |
||||
} |
||||
#else |
||||
*dst++ = readb(MMC_RXFIFO); |
||||
len--; |
||||
#endif |
||||
} |
||||
status = readl(MMC_STAT); |
||||
if (status & MMC_STAT_ERRORS) { |
||||
printf("MMC_STAT error %lx\n", status); |
||||
return -1; |
||||
} |
||||
} |
||||
writel(~MMC_I_MASK_DATA_TRAN_DONE, MMC_I_MASK); |
||||
while (!(readl(MMC_I_REG) & MMC_I_REG_DATA_TRAN_DONE)) |
||||
; |
||||
status = readl(MMC_STAT); |
||||
if (status & MMC_STAT_ERRORS) { |
||||
printf("MMC_STAT error %lx\n", status); |
||||
return -1; |
||||
} |
||||
return 0; |
||||
} |
||||
|
||||
int |
||||
/****************************************************/ |
||||
mmc_block_write(ulong dst, uchar * src, int len) |
||||
/****************************************************/ |
||||
{ |
||||
ushort argh, argl; |
||||
ulong status; |
||||
|
||||
if (len == 0) { |
||||
return 0; |
||||
} |
||||
|
||||
debug("mmc_block_wr dst %lx src %lx len %d\n", dst, (ulong) src, len); |
||||
|
||||
argh = len >> 16; |
||||
argl = len & 0xffff; |
||||
|
||||
/* set block len */ |
||||
mmc_cmd(MMC_CMD_SET_BLOCKLEN, argh, argl, MMC_CMDAT_R1); |
||||
|
||||
/* send write command */ |
||||
argh = dst >> 16; |
||||
argl = dst & 0xffff; |
||||
writel(MMC_STRPCL_STOP_CLK, MMC_STRPCL); |
||||
writel(1, MMC_NOB); |
||||
writel(len, MMC_BLKLEN); |
||||
mmc_cmd(MMC_CMD_WRITE_SINGLE_BLOCK, argh, argl, |
||||
MMC_CMDAT_R1 | MMC_CMDAT_WRITE | MMC_CMDAT_BLOCK | |
||||
MMC_CMDAT_DATA_EN); |
||||
|
||||
writel(~MMC_I_MASK_TXFIFO_WR_REQ, MMC_I_MASK); |
||||
while (len) { |
||||
if (readl(MMC_I_REG) & MMC_I_REG_TXFIFO_WR_REQ) { |
||||
int i, bytes = min(32, len); |
||||
|
||||
for (i = 0; i < bytes; i++) { |
||||
writel(*src++, MMC_TXFIFO); |
||||
} |
||||
if (bytes < 32) { |
||||
writel(MMC_PRTBUF_BUF_PART_FULL, MMC_PRTBUF); |
||||
} |
||||
len -= bytes; |
||||
} |
||||
status = readl(MMC_STAT); |
||||
if (status & MMC_STAT_ERRORS) { |
||||
printf("MMC_STAT error %lx\n", status); |
||||
return -1; |
||||
} |
||||
} |
||||
writel(~MMC_I_MASK_DATA_TRAN_DONE, MMC_I_MASK); |
||||
while (!(readl(MMC_I_REG) & MMC_I_REG_DATA_TRAN_DONE)) |
||||
; |
||||
writel(~MMC_I_MASK_PRG_DONE, MMC_I_MASK); |
||||
while (!(readl(MMC_I_REG) & MMC_I_REG_PRG_DONE)) |
||||
; |
||||
status = readl(MMC_STAT); |
||||
if (status & MMC_STAT_ERRORS) { |
||||
printf("MMC_STAT error %lx\n", status); |
||||
return -1; |
||||
} |
||||
return 0; |
||||
} |
||||
|
||||
int |
||||
/****************************************************/ |
||||
pxa_mmc_read(long src, uchar * dst, int size) |
||||
/****************************************************/ |
||||
{ |
||||
ulong end, part_start, part_end, part_len, aligned_start, aligned_end; |
||||
ulong mmc_block_size, mmc_block_address; |
||||
|
||||
if (size == 0) { |
||||
return 0; |
||||
} |
||||
|
||||
if (!mmc_ready) { |
||||
printf("Please initial the MMC first\n"); |
||||
return -1; |
||||
} |
||||
|
||||
mmc_block_size = MMC_BLOCK_SIZE; |
||||
mmc_block_address = ~(mmc_block_size - 1); |
||||
|
||||
src -= CONFIG_SYS_MMC_BASE; |
||||
end = src + size; |
||||
part_start = ~mmc_block_address & src; |
||||
part_end = ~mmc_block_address & end; |
||||
aligned_start = mmc_block_address & src; |
||||
aligned_end = mmc_block_address & end; |
||||
|
||||
/* all block aligned accesses */ |
||||
debug |
||||
("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", |
||||
src, (ulong) dst, end, part_start, part_end, aligned_start, |
||||
aligned_end); |
||||
if (part_start) { |
||||
part_len = mmc_block_size - part_start; |
||||
debug |
||||
("ps src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", |
||||
src, (ulong) dst, end, part_start, part_end, aligned_start, |
||||
aligned_end); |
||||
if ((mmc_block_read(mmc_buf, aligned_start, mmc_block_size)) < |
||||
0) { |
||||
return -1; |
||||
} |
||||
memcpy(dst, mmc_buf + part_start, part_len); |
||||
dst += part_len; |
||||
src += part_len; |
||||
} |
||||
debug |
||||
("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", |
||||
src, (ulong) dst, end, part_start, part_end, aligned_start, |
||||
aligned_end); |
||||
for (; src < aligned_end; src += mmc_block_size, dst += mmc_block_size) { |
||||
debug |
||||
("al src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", |
||||
src, (ulong) dst, end, part_start, part_end, aligned_start, |
||||
aligned_end); |
||||
if ((mmc_block_read((uchar *) (dst), src, mmc_block_size)) < 0) { |
||||
return -1; |
||||
} |
||||
} |
||||
debug |
||||
("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", |
||||
src, (ulong) dst, end, part_start, part_end, aligned_start, |
||||
aligned_end); |
||||
if (part_end && src < end) { |
||||
debug |
||||
("pe src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", |
||||
src, (ulong) dst, end, part_start, part_end, aligned_start, |
||||
aligned_end); |
||||
if ((mmc_block_read(mmc_buf, aligned_end, mmc_block_size)) < 0) { |
||||
return -1; |
||||
} |
||||
memcpy(dst, mmc_buf, part_end); |
||||
} |
||||
return 0; |
||||
} |
||||
|
||||
int |
||||
/****************************************************/ |
||||
pxa_mmc_write(uchar * src, uint32_t dst, int size) |
||||
/****************************************************/ |
||||
{ |
||||
ulong end, part_start, part_end, part_len, aligned_start, aligned_end; |
||||
ulong mmc_block_size, mmc_block_address; |
||||
|
||||
if (size == 0) { |
||||
return 0; |
||||
} |
||||
|
||||
if (!mmc_ready) { |
||||
printf("Please initial the MMC first\n"); |
||||
return -1; |
||||
} |
||||
|
||||
mmc_block_size = MMC_BLOCK_SIZE; |
||||
mmc_block_address = ~(mmc_block_size - 1); |
||||
|
||||
dst -= CONFIG_SYS_MMC_BASE; |
||||
end = dst + size; |
||||
part_start = ~mmc_block_address & dst; |
||||
part_end = ~mmc_block_address & end; |
||||
aligned_start = mmc_block_address & dst; |
||||
aligned_end = mmc_block_address & end; |
||||
|
||||
/* all block aligned accesses */ |
||||
debug |
||||
("src %p dst %08x end %lx pstart %lx pend %lx astart %lx aend %lx\n", |
||||
src, dst, end, part_start, part_end, aligned_start, |
||||
aligned_end); |
||||
if (part_start) { |
||||
part_len = mmc_block_size - part_start; |
||||
debug |
||||
("ps src %p dst %08x end %lx pstart %lx pend %lx astart %lx aend %lx\n", |
||||
src, dst, end, part_start, part_end, aligned_start, |
||||
aligned_end); |
||||
if ((mmc_block_read(mmc_buf, aligned_start, mmc_block_size)) < |
||||
0) { |
||||
return -1; |
||||
} |
||||
memcpy(mmc_buf + part_start, src, part_len); |
||||
if ((mmc_block_write(aligned_start, mmc_buf, mmc_block_size)) < |
||||
0) { |
||||
return -1; |
||||
} |
||||
dst += part_len; |
||||
src += part_len; |
||||
} |
||||
debug |
||||
("src %p dst %08x end %lx pstart %lx pend %lx astart %lx aend %lx\n", |
||||
src, dst, end, part_start, part_end, aligned_start, |
||||
aligned_end); |
||||
for (; dst < aligned_end; src += mmc_block_size, dst += mmc_block_size) { |
||||
debug |
||||
("al src %p dst %08x end %lx pstart %lx pend %lx astart %lx aend %lx\n", |
||||
src, dst, end, part_start, part_end, aligned_start, |
||||
aligned_end); |
||||
if ((mmc_block_write(dst, (uchar *) src, mmc_block_size)) < 0) { |
||||
return -1; |
||||
} |
||||
} |
||||
debug |
||||
("src %p dst %08x end %lx pstart %lx pend %lx astart %lx aend %lx\n", |
||||
src, dst, end, part_start, part_end, aligned_start, |
||||
aligned_end); |
||||
if (part_end && dst < end) { |
||||
debug |
||||
("pe src %p dst %08x end %lx pstart %lx pend %lx astart %lx aend %lx\n", |
||||
src, dst, end, part_start, part_end, aligned_start, |
||||
aligned_end); |
||||
if ((mmc_block_read(mmc_buf, aligned_end, mmc_block_size)) < 0) { |
||||
return -1; |
||||
} |
||||
memcpy(mmc_buf, src, part_end); |
||||
if ((mmc_block_write(aligned_end, mmc_buf, mmc_block_size)) < 0) { |
||||
return -1; |
||||
} |
||||
} |
||||
return 0; |
||||
} |
||||
|
||||
static ulong |
||||
/****************************************************/ |
||||
mmc_bread(int dev_num, ulong blknr, lbaint_t blkcnt, void *dst) |
||||
/****************************************************/ |
||||
{ |
||||
int mmc_block_size = MMC_BLOCK_SIZE; |
||||
ulong src = blknr * mmc_block_size + CONFIG_SYS_MMC_BASE; |
||||
|
||||
pxa_mmc_read(src, (uchar *) dst, blkcnt * mmc_block_size); |
||||
return blkcnt; |
||||
} |
||||
|
||||
#ifdef __GNUC__ |
||||
#define likely(x) __builtin_expect(!!(x), 1) |
||||
#define unlikely(x) __builtin_expect(!!(x), 0) |
||||
#else |
||||
#define likely(x) (x) |
||||
#define unlikely(x) (x) |
||||
#endif |
||||
|
||||
#define UNSTUFF_BITS(resp,start,size) \ |
||||
({ \
|
||||
const int __size = size; \
|
||||
const uint32_t __mask = (__size < 32 ? 1 << __size : 0) - 1; \
|
||||
const int32_t __off = 3 - ((start) / 32); \
|
||||
const int32_t __shft = (start) & 31; \
|
||||
uint32_t __res; \
|
||||
\
|
||||
__res = resp[__off] >> __shft; \
|
||||
if (__size + __shft > 32) \
|
||||
__res |= resp[__off-1] << ((32 - __shft) % 32); \
|
||||
__res & __mask; \
|
||||
}) |
||||
|
||||
/*
|
||||
* Given the decoded CSD structure, decode the raw CID to our CID structure. |
||||
*/ |
||||
static void mmc_decode_cid(uint32_t * resp) |
||||
{ |
||||
if (IF_TYPE_SD == mmc_dev.if_type) { |
||||
/*
|
||||
* SD doesn't currently have a version field so we will |
||||
* have to assume we can parse this. |
||||
*/ |
||||
sprintf((char *)mmc_dev.vendor, |
||||
"Man %02x OEM %c%c \"%c%c%c%c%c\" Date %02u/%04u", |
||||
UNSTUFF_BITS(resp, 120, 8), UNSTUFF_BITS(resp, 112, 8), |
||||
UNSTUFF_BITS(resp, 104, 8), UNSTUFF_BITS(resp, 96, 8), |
||||
UNSTUFF_BITS(resp, 88, 8), UNSTUFF_BITS(resp, 80, 8), |
||||
UNSTUFF_BITS(resp, 72, 8), UNSTUFF_BITS(resp, 64, 8), |
||||
UNSTUFF_BITS(resp, 8, 4), UNSTUFF_BITS(resp, 12, |
||||
8) + 2000); |
||||
sprintf((char *)mmc_dev.revision, "%d.%d", |
||||
UNSTUFF_BITS(resp, 60, 4), UNSTUFF_BITS(resp, 56, 4)); |
||||
sprintf((char *)mmc_dev.product, "%u", |
||||
UNSTUFF_BITS(resp, 24, 32)); |
||||
} else { |
||||
/*
|
||||
* The selection of the format here is based upon published |
||||
* specs from sandisk and from what people have reported. |
||||
*/ |
||||
switch (spec_ver) { |
||||
case 0: /* MMC v1.0 - v1.2 */ |
||||
case 1: /* MMC v1.4 */ |
||||
sprintf((char *)mmc_dev.vendor, |
||||
"Man %02x%02x%02x \"%c%c%c%c%c%c%c\" Date %02u/%04u", |
||||
UNSTUFF_BITS(resp, 120, 8), UNSTUFF_BITS(resp, |
||||
112, |
||||
8), |
||||
UNSTUFF_BITS(resp, 104, 8), UNSTUFF_BITS(resp, |
||||
96, 8), |
||||
UNSTUFF_BITS(resp, 88, 8), UNSTUFF_BITS(resp, |
||||
80, 8), |
||||
UNSTUFF_BITS(resp, 72, 8), UNSTUFF_BITS(resp, |
||||
64, 8), |
||||
UNSTUFF_BITS(resp, 56, 8), UNSTUFF_BITS(resp, |
||||
48, 8), |
||||
UNSTUFF_BITS(resp, 12, 4), UNSTUFF_BITS(resp, 8, |
||||
4) + |
||||
1997); |
||||
sprintf((char *)mmc_dev.revision, "%d.%d", |
||||
UNSTUFF_BITS(resp, 44, 4), UNSTUFF_BITS(resp, |
||||
40, 4)); |
||||
sprintf((char *)mmc_dev.product, "%u", |
||||
UNSTUFF_BITS(resp, 16, 24)); |
||||
break; |
||||
|
||||
case 2: /* MMC v2.0 - v2.2 */ |
||||
case 3: /* MMC v3.1 - v3.3 */ |
||||
case 4: /* MMC v4 */ |
||||
sprintf((char *)mmc_dev.vendor, |
||||
"Man %02x OEM %04x \"%c%c%c%c%c%c\" Date %02u/%04u", |
||||
UNSTUFF_BITS(resp, 120, 8), UNSTUFF_BITS(resp, |
||||
104, |
||||
16), |
||||
UNSTUFF_BITS(resp, 96, 8), UNSTUFF_BITS(resp, |
||||
88, 8), |
||||
UNSTUFF_BITS(resp, 80, 8), UNSTUFF_BITS(resp, |
||||
72, 8), |
||||
UNSTUFF_BITS(resp, 64, 8), UNSTUFF_BITS(resp, |
||||
56, 8), |
||||
UNSTUFF_BITS(resp, 12, 4), UNSTUFF_BITS(resp, 8, |
||||
4) + |
||||
1997); |
||||
sprintf((char *)mmc_dev.product, "%u", |
||||
UNSTUFF_BITS(resp, 16, 32)); |
||||
sprintf((char *)mmc_dev.revision, "N/A"); |
||||
break; |
||||
|
||||
default: |
||||
printf("MMC card has unknown MMCA version %d\n", |
||||
spec_ver); |
||||
break; |
||||
} |
||||
} |
||||
printf("%s card.\nVendor: %s\nProduct: %s\nRevision: %s\n", |
||||
(IF_TYPE_SD == mmc_dev.if_type) ? "SD" : "MMC", mmc_dev.vendor, |
||||
mmc_dev.product, mmc_dev.revision); |
||||
} |
||||
|
||||
/*
|
||||
* Given a 128-bit response, decode to our card CSD structure. |
||||
*/ |
||||
static void mmc_decode_csd(uint32_t * resp) |
||||
{ |
||||
unsigned int mult, csd_struct; |
||||
|
||||
if (IF_TYPE_SD == mmc_dev.if_type) { |
||||
csd_struct = UNSTUFF_BITS(resp, 126, 2); |
||||
if (csd_struct != 0) { |
||||
printf("SD: unrecognised CSD structure version %d\n", |
||||
csd_struct); |
||||
return; |
||||
} |
||||
} else { |
||||
/*
|
||||
* We only understand CSD structure v1.1 and v1.2. |
||||
* v1.2 has extra information in bits 15, 11 and 10. |
||||
*/ |
||||
csd_struct = UNSTUFF_BITS(resp, 126, 2); |
||||
if (csd_struct != 1 && csd_struct != 2) { |
||||
printf("MMC: unrecognised CSD structure version %d\n", |
||||
csd_struct); |
||||
return; |
||||
} |
||||
|
||||
spec_ver = UNSTUFF_BITS(resp, 122, 4); |
||||
mmc_dev.if_type = IF_TYPE_MMC; |
||||
} |
||||
|
||||
mult = 1 << (UNSTUFF_BITS(resp, 47, 3) + 2); |
||||
mmc_dev.lba = (1 + UNSTUFF_BITS(resp, 62, 12)) * mult; |
||||
mmc_dev.blksz = 1 << UNSTUFF_BITS(resp, 80, 4); |
||||
|
||||
/* FIXME: The following just makes assumes that's the partition type -- should really read it */ |
||||
mmc_dev.part_type = PART_TYPE_DOS; |
||||
mmc_dev.dev = 0; |
||||
mmc_dev.lun = 0; |
||||
mmc_dev.type = DEV_TYPE_HARDDISK; |
||||
mmc_dev.removable = 0; |
||||
mmc_dev.block_read = mmc_bread; |
||||
|
||||
printf("Detected: %lu blocks of %lu bytes (%luMB) ", |
||||
mmc_dev.lba, |
||||
mmc_dev.blksz, |
||||
mmc_dev.lba * mmc_dev.blksz / (1024 * 1024)); |
||||
} |
||||
|
||||
int |
||||
/****************************************************/ |
||||
mmc_legacy_init(int verbose) |
||||
/****************************************************/ |
||||
{ |
||||
int retries, rc = -ENODEV; |
||||
uint32_t cid_resp[4]; |
||||
uint32_t *resp; |
||||
uint16_t rca = 0; |
||||
|
||||
/* Reset device interface type */ |
||||
mmc_dev.if_type = IF_TYPE_UNKNOWN; |
||||
|
||||
#ifdef CONFIG_CPU_MONAHANS /* pxa3xx */ |
||||
writel(readl(CKENA) | CKENA_12_MMC0 | CKENA_13_MMC1, CKENA); |
||||
#else /* pxa2xx */ |
||||
writel(readl(CKEN) | CKEN12_MMC, CKEN); /* enable MMC unit clock */ |
||||
#endif |
||||
writel(MMC_CLKRT_0_3125MHZ, MMC_CLKRT); |
||||
writel(MMC_RES_TO_MAX, MMC_RESTO); |
||||
writel(MMC_SPI_DISABLE, MMC_SPI); |
||||
|
||||
/* reset */ |
||||
mmc_cmd(MMC_CMD_GO_IDLE_STATE, 0, 0, MMC_CMDAT_INIT | MMC_CMDAT_R0); |
||||
udelay(200000); |
||||
retries = 3; |
||||
while (retries--) { |
||||
resp = mmc_cmd(MMC_CMD_APP_CMD, 0, 0, MMC_CMDAT_R1); |
||||
if (!(resp[0] & 0x00000020)) { /* Card does not support APP_CMD */ |
||||
debug("Card does not support APP_CMD\n"); |
||||
break; |
||||
} |
||||
|
||||
/* Select 3.2-3.3V and 3.3-3.4V */ |
||||
resp = mmc_cmd(SD_CMD_APP_SEND_OP_COND, 0x0030, 0x0000, |
||||
MMC_CMDAT_R3 | (retries < 2 ? 0 |
||||
: MMC_CMDAT_INIT)); |
||||
if (resp[0] & 0x80000000) { |
||||
mmc_dev.if_type = IF_TYPE_SD; |
||||
debug("Detected SD card\n"); |
||||
break; |
||||
} |
||||
udelay(200000); |
||||
} |
||||
|
||||
if (retries <= 0 || !(IF_TYPE_SD == mmc_dev.if_type)) { |
||||
debug("Failed to detect SD Card, trying MMC\n"); |
||||
resp = |
||||
mmc_cmd(MMC_CMD_SEND_OP_COND, 0x00ff, 0x8000, MMC_CMDAT_R3); |
||||
|
||||
retries = 10; |
||||
while (retries-- && resp && !(resp[0] & 0x80000000)) { |
||||
udelay(200000); |
||||
resp = |
||||
mmc_cmd(MMC_CMD_SEND_OP_COND, 0x00ff, 0x8000, |
||||
MMC_CMDAT_R3); |
||||
} |
||||
} |
||||
|
||||
/* try to get card id */ |
||||
resp = |
||||
mmc_cmd(MMC_CMD_ALL_SEND_CID, 0, 0, MMC_CMDAT_R2 | MMC_CMDAT_BUSY); |
||||
if (resp) { |
||||
memcpy(cid_resp, resp, sizeof(cid_resp)); |
||||
|
||||
/* MMC exists, get CSD too */ |
||||
resp = mmc_cmd(MMC_CMD_SET_RELATIVE_ADDR, 0, 0, MMC_CMDAT_R1); |
||||
if (IF_TYPE_SD == mmc_dev.if_type) |
||||
rca = ((resp[0] & 0xffff0000) >> 16); |
||||
resp = mmc_cmd(MMC_CMD_SEND_CSD, rca, 0, MMC_CMDAT_R2); |
||||
if (resp) { |
||||
mmc_decode_csd(resp); |
||||
rc = 0; |
||||
mmc_ready = 1; |
||||
} |
||||
|
||||
mmc_decode_cid(cid_resp); |
||||
} |
||||
|
||||
writel(0, MMC_CLKRT); /* 20 MHz */ |
||||
resp = mmc_cmd(MMC_CMD_SELECT_CARD, rca, 0, MMC_CMDAT_R1); |
||||
|
||||
#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS) |
||||
if (IF_TYPE_SD == mmc_dev.if_type) { |
||||
resp = mmc_cmd(MMC_CMD_APP_CMD, rca, 0, MMC_CMDAT_R1); |
||||
resp = mmc_cmd(SD_CMD_APP_SET_BUS_WIDTH, 0, 2, MMC_CMDAT_R1); |
||||
wide = MMC_CMDAT_SD_4DAT; |
||||
} |
||||
#endif |
||||
|
||||
fat_register_device(&mmc_dev, 1); /* partitions start counting with 1 */ |
||||
|
||||
return rc; |
||||
} |
||||
@ -0,0 +1,87 @@ |
||||
/*
|
||||
* Generic bounce buffer implementation |
||||
* |
||||
* Copyright (C) 2012 Marek Vasut <marex@denx.de> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#ifndef __INCLUDE_BOUNCEBUF_H__ |
||||
#define __INCLUDE_BOUNCEBUF_H__ |
||||
|
||||
/*
|
||||
* GEN_BB_READ -- Data are read from the buffer eg. by DMA hardware. |
||||
* The source buffer is copied into the bounce buffer (if unaligned, otherwise |
||||
* the source buffer is used directly) upon start() call, then the operation |
||||
* requiring the aligned transfer happens, then the bounce buffer is lost upon |
||||
* stop() call. |
||||
*/ |
||||
#define GEN_BB_READ (1 << 0) |
||||
/*
|
||||
* GEN_BB_WRITE -- Data are written into the buffer eg. by DMA hardware. |
||||
* The source buffer starts in an undefined state upon start() call, then the |
||||
* operation requiring the aligned transfer happens, then the bounce buffer is |
||||
* copied into the destination buffer (if unaligned, otherwise destination |
||||
* buffer is used directly) upon stop() call. |
||||
*/ |
||||
#define GEN_BB_WRITE (1 << 1) |
||||
/*
|
||||
* GEN_BB_RW -- Data are read and written into the buffer eg. by DMA hardware. |
||||
* The source buffer is copied into the bounce buffer (if unaligned, otherwise |
||||
* the source buffer is used directly) upon start() call, then the operation |
||||
* requiring the aligned transfer happens, then the bounce buffer is copied |
||||
* into the destination buffer (if unaligned, otherwise destination buffer is |
||||
* used directly) upon stop() call. |
||||
*/ |
||||
#define GEN_BB_RW (GEN_BB_READ | GEN_BB_WRITE) |
||||
|
||||
#ifdef CONFIG_BOUNCE_BUFFER |
||||
/**
|
||||
* bounce_buffer_start() -- Start the bounce buffer session |
||||
* data: pointer to buffer to be aligned |
||||
* len: length of the buffer |
||||
* backup: pointer to backup buffer (the original value is stored here if |
||||
* needed |
||||
* flags: flags describing the transaction, see above. |
||||
*/ |
||||
int bounce_buffer_start(void **data, size_t len, void **backup, uint8_t flags); |
||||
/**
|
||||
* bounce_buffer_stop() -- Finish the bounce buffer session |
||||
* data: pointer to buffer that was aligned |
||||
* len: length of the buffer |
||||
* backup: pointer to backup buffer (the original value is stored here if |
||||
* needed |
||||
* flags: flags describing the transaction, see above. |
||||
*/ |
||||
int bounce_buffer_stop(void **data, size_t len, void **backup, uint8_t flags); |
||||
#else |
||||
static inline int bounce_buffer_start(void **data, size_t len, void **backup, |
||||
uint8_t flags) |
||||
{ |
||||
return 0; |
||||
} |
||||
|
||||
static inline int bounce_buffer_stop(void **data, size_t len, void **backup, |
||||
uint8_t flags) |
||||
{ |
||||
return 0; |
||||
} |
||||
#endif |
||||
|
||||
#endif |
||||
@ -0,0 +1,191 @@ |
||||
/*
|
||||
* (C) Copyright 2012 SAMSUNG Electronics |
||||
* Jaehoon Chung <jh80.chung@samsung.com> |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
||||
* |
||||
*/ |
||||
|
||||
#ifndef __DWMMC_HW_H |
||||
#define __DWMMC_HW_H |
||||
|
||||
#include <asm/io.h> |
||||
#include <mmc.h> |
||||
|
||||
#define DWMCI_CTRL 0x000 |
||||
#define DWMCI_PWREN 0x004 |
||||
#define DWMCI_CLKDIV 0x008 |
||||
#define DWMCI_CLKSRC 0x00C |
||||
#define DWMCI_CLKENA 0x010 |
||||
#define DWMCI_TMOUT 0x014 |
||||
#define DWMCI_CTYPE 0x018 |
||||
#define DWMCI_BLKSIZ 0x01C |
||||
#define DWMCI_BYTCNT 0x020 |
||||
#define DWMCI_INTMASK 0x024 |
||||
#define DWMCI_CMDARG 0x028 |
||||
#define DWMCI_CMD 0x02C |
||||
#define DWMCI_RESP0 0x030 |
||||
#define DWMCI_RESP1 0x034 |
||||
#define DWMCI_RESP2 0x038 |
||||
#define DWMCI_RESP3 0x03C |
||||
#define DWMCI_MINTSTS 0x040 |
||||
#define DWMCI_RINTSTS 0x044 |
||||
#define DWMCI_STATUS 0x048 |
||||
#define DWMCI_FIFOTH 0x04C |
||||
#define DWMCI_CDETECT 0x050 |
||||
#define DWMCI_WRTPRT 0x054 |
||||
#define DWMCI_GPIO 0x058 |
||||
#define DWMCI_TCMCNT 0x05C |
||||
#define DWMCI_TBBCNT 0x060 |
||||
#define DWMCI_DEBNCE 0x064 |
||||
#define DWMCI_USRID 0x068 |
||||
#define DWMCI_VERID 0x06C |
||||
#define DWMCI_HCON 0x070 |
||||
#define DWMCI_UHS_REG 0x074 |
||||
#define DWMCI_BMOD 0x080 |
||||
#define DWMCI_PLDMND 0x084 |
||||
#define DWMCI_DBADDR 0x088 |
||||
#define DWMCI_IDSTS 0x08C |
||||
#define DWMCI_IDINTEN 0x090 |
||||
#define DWMCI_DSCADDR 0x094 |
||||
#define DWMCI_BUFADDR 0x098 |
||||
#define DWMCI_DATA 0x200 |
||||
|
||||
/* Interrupt Mask register */ |
||||
#define DWMCI_INTMSK_ALL 0xffffffff |
||||
#define DWMCI_INTMSK_RE (1 << 1) |
||||
#define DWMCI_INTMSK_CDONE (1 << 2) |
||||
#define DWMCI_INTMSK_DTO (1 << 3) |
||||
#define DWMCI_INTMSK_TXDR (1 << 4) |
||||
#define DWMCI_INTMSK_RXDR (1 << 5) |
||||
#define DWMCI_INTMSK_DCRC (1 << 7) |
||||
#define DWMCI_INTMSK_RTO (1 << 8) |
||||
#define DWMCI_INTMSK_DRTO (1 << 9) |
||||
#define DWMCI_INTMSK_HTO (1 << 10) |
||||
#define DWMCI_INTMSK_FRUN (1 << 11) |
||||
#define DWMCI_INTMSK_HLE (1 << 12) |
||||
#define DWMCI_INTMSK_SBE (1 << 13) |
||||
#define DWMCI_INTMSK_ACD (1 << 14) |
||||
#define DWMCI_INTMSK_EBE (1 << 15) |
||||
|
||||
/* Raw interrupt Regsiter */ |
||||
#define DWMCI_DATA_ERR (DWMCI_INTMSK_EBE | DWMCI_INTMSK_SBE | DWMCI_INTMSK_HLE |\ |
||||
DWMCI_INTMSK_FRUN | DWMCI_INTMSK_EBE | DWMCI_INTMSK_DCRC) |
||||
#define DWMCI_DATA_TOUT (DWMCI_INTMSK_HTO | DWMCI_INTMSK_DRTO) |
||||
/* CTRL register */ |
||||
#define DWMCI_CTRL_RESET (1 << 0) |
||||
#define DWMCI_CTRL_FIFO_RESET (1 << 1) |
||||
#define DWMCI_CTRL_DMA_RESET (1 << 2) |
||||
#define DWMCI_DMA_EN (1 << 5) |
||||
#define DWMCI_CTRL_SEND_AS_CCSD (1 << 10) |
||||
#define DWMCI_IDMAC_EN (1 << 25) |
||||
#define DWMCI_RESET_ALL (DWMCI_CTRL_RESET | DWMCI_CTRL_FIFO_RESET |\ |
||||
DWMCI_CTRL_DMA_RESET) |
||||
|
||||
/* CMD register */ |
||||
#define DWMCI_CMD_RESP_EXP (1 << 6) |
||||
#define DWMCI_CMD_RESP_LENGTH (1 << 7) |
||||
#define DWMCI_CMD_CHECK_CRC (1 << 8) |
||||
#define DWMCI_CMD_DATA_EXP (1 << 9) |
||||
#define DWMCI_CMD_RW (1 << 10) |
||||
#define DWMCI_CMD_SEND_STOP (1 << 12) |
||||
#define DWMCI_CMD_ABORT_STOP (1 << 14) |
||||
#define DWMCI_CMD_PRV_DAT_WAIT (1 << 13) |
||||
#define DWMCI_CMD_UPD_CLK (1 << 21) |
||||
#define DWMCI_CMD_USE_HOLD_REG (1 << 29) |
||||
#define DWMCI_CMD_START (1 << 31) |
||||
|
||||
/* CLKENA register */ |
||||
#define DWMCI_CLKEN_ENABLE (1 << 0) |
||||
#define DWMCI_CLKEN_LOW_PWR (1 << 16) |
||||
|
||||
/* Card-type registe */ |
||||
#define DWMCI_CTYPE_1BIT 0 |
||||
#define DWMCI_CTYPE_4BIT (1 << 0) |
||||
#define DWMCI_CTYPE_8BIT (1 << 16) |
||||
|
||||
/* Status Register */ |
||||
#define DWMCI_BUSY (1 << 9) |
||||
|
||||
/* FIFOTH Register */ |
||||
#define MSIZE(x) ((x) << 28) |
||||
#define RX_WMARK(x) ((x) << 16) |
||||
#define TX_WMARK(x) (x) |
||||
|
||||
#define DWMCI_IDMAC_OWN (1 << 31) |
||||
#define DWMCI_IDMAC_CH (1 << 4) |
||||
#define DWMCI_IDMAC_FS (1 << 3) |
||||
#define DWMCI_IDMAC_LD (1 << 2) |
||||
|
||||
/* Bus Mode Register */ |
||||
#define DWMCI_BMOD_IDMAC_RESET (1 << 0) |
||||
#define DWMCI_BMOD_IDMAC_FB (1 << 1) |
||||
#define DWMCI_BMOD_IDMAC_EN (1 << 7) |
||||
|
||||
struct dwmci_host { |
||||
char *name; |
||||
void *ioaddr; |
||||
unsigned int quirks; |
||||
unsigned int caps; |
||||
unsigned int version; |
||||
unsigned int clock; |
||||
unsigned int bus_hz; |
||||
int dev_index; |
||||
int buswidth; |
||||
u32 fifoth_val; |
||||
struct mmc *mmc; |
||||
|
||||
void (*clksel)(struct dwmci_host *host); |
||||
unsigned int (*mmc_clk)(int dev_index); |
||||
}; |
||||
|
||||
struct dwmci_idmac { |
||||
u32 flags; |
||||
u32 cnt; |
||||
u32 addr; |
||||
u32 next_addr; |
||||
}; |
||||
|
||||
static inline void dwmci_writel(struct dwmci_host *host, int reg, u32 val) |
||||
{ |
||||
writel(val, host->ioaddr + reg); |
||||
} |
||||
|
||||
static inline void dwmci_writew(struct dwmci_host *host, int reg, u16 val) |
||||
{ |
||||
writew(val, host->ioaddr + reg); |
||||
} |
||||
|
||||
static inline void dwmci_writeb(struct dwmci_host *host, int reg, u8 val) |
||||
{ |
||||
writeb(val, host->ioaddr + reg); |
||||
} |
||||
static inline u32 dwmci_readl(struct dwmci_host *host, int reg) |
||||
{ |
||||
return readl(host->ioaddr + reg); |
||||
} |
||||
|
||||
static inline u16 dwmci_readw(struct dwmci_host *host, int reg) |
||||
{ |
||||
return readw(host->ioaddr + reg); |
||||
} |
||||
|
||||
static inline u8 dwmci_readb(struct dwmci_host *host, int reg) |
||||
{ |
||||
return readb(host->ioaddr + reg); |
||||
} |
||||
|
||||
int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk); |
||||
#endif /* __DWMMC_HW_H */ |
||||
Loading…
Reference in new issue