ppc4xx/NAND: Reduce size of NAND SPL image

This is needed for the canyonlands_nand build target. Without it
the resulting image won't fit into 4k.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
master
Stefan Roese 15 years ago committed by Wolfgang Denk
parent ee8028b7f1
commit c5d02825ae
  1. 4
      drivers/mtd/nand/ndfc.c

@ -201,6 +201,8 @@ int board_nand_init(struct nand_chip *nand)
#ifndef CONFIG_NAND_SPL
nand->write_buf = ndfc_write_buf;
nand->verify_buf = ndfc_verify_buf;
chip++;
#else
/*
* Setup EBC (CS0 only right now)
@ -211,7 +213,5 @@ int board_nand_init(struct nand_chip *nand)
mtebc(PB0AP, CONFIG_SYS_EBC_PB0AP);
#endif
chip++;
return 0;
}

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