Added a default RCW(1_28_6_12) and PBI configure file for T4240, so it can use PBL tool to produce the ramboot image. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>master
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#PBI commands |
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#Initialize CPC1 |
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09010000 00200400 |
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09138000 00000000 |
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091380c0 00000100 |
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#512KB SRAM |
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09010100 00000000 |
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09010104 fff80009 |
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09010f00 08000000 |
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#enable CPC1 |
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09010000 80000000 |
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#Configure LAW for CPC1 |
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09000d00 00000000 |
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09000d04 fff80000 |
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09000d08 81000012 |
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#workaround for IFC bus speed |
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091241c0 f03f3f3f |
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091241c4 ff003f3f |
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09124010 00000101 |
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09124130 0000000c |
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#workaround for SERDES A-006031 |
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090ea000 064740e6 |
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090ea020 064740e6 |
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090eb000 064740e6 |
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090eb020 064740e6 |
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090ec000 064740e6 |
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090ec020 064740e6 |
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090ed000 064740e6 |
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090ed020 064740e6 |
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#Configure alternate space |
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09000010 00000000 |
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09000014 ff000000 |
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09000018 81000000 |
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#Flush PBL data |
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09138000 00000000 |
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091380c0 00000000 |
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#PBL preamble and RCW header |
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aa55aa55 010e0100 |
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#serdes protocol 1_28_6_12 |
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14180019 0c101916 00000000 00000000 |
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04383060 30548c00 6c020000 19000000 |
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00000000 ee0000ee 00000000 000187fc |
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00000000 00000000 00000000 00000018 |
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