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85xx: separate FLASH BASE virtual from physical address

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Added a CONFIG_SYS_FLASH_BASE_PHYS for use as the physical address and
maintain CONFIG_SYS_FLASH_BASE as the virtual address of the flash.

This allows us to deal with 36-bit phys on these boards in the future.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
master
Kumar Gala 16 years ago committed by Andrew Fleming-AFLEMING
parent 52b565f5ad
commit c953ddfd56
8 changed files with 16 additions and 14 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 2
      board/freescale/mpc8536ds/law.c
  2. 2
      board/freescale/mpc8536ds/mpc8536ds.c
  3. 2
      board/freescale/mpc8536ds/tlb.c
  4. 2
      board/freescale/mpc8572ds/law.c
  5. 2
      board/freescale/mpc8572ds/mpc8572ds.c
  6. 2
      board/freescale/mpc8572ds/tlb.c
  7. 9
      include/configs/MPC8536DS.h
  8. 9
      include/configs/MPC8572DS.h

2
board/freescale/mpc8536ds/law.c
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@ -30,7 +30,7 @@
struct law_entry law_table[] = {
SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI),
SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCI),
SET_LAW(CONFIG_SYS_FLASH_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAWAR_SIZE_128M, LAW_TRGT_IF_PCIE_1),
SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_1),
SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAWAR_SIZE_128M, LAW_TRGT_IF_PCIE_2),

2
board/freescale/mpc8536ds/mpc8536ds.c
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@ -433,7 +433,7 @@ int board_early_init_r(void)
/* invalidate existing TLB entry for flash + promjet */
disable_tlb(flash_esel);
set_tlb(1, flashbase, flashbase, /* tlb, epn, rpn */
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, /* tlb, epn, rpn */
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, /* perms, wimge */
0, flash_esel, BOOKE_PAGESZ_256M, 1); /* ts, esel, tsize, iprot */

2
board/freescale/mpc8536ds/tlb.c
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@ -53,7 +53,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
/* W**G* - Flash/promjet, localbus */
/* This will be changed to *I*G* after relocation to RAM. */
SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE,
SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SX|MAS3_SR, MAS2_W|MAS2_G,
0, 1, BOOKE_PAGESZ_256M, 1),

2
board/freescale/mpc8572ds/law.c
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@ -28,7 +28,7 @@
#include <asm/mmu.h>
struct law_entry law_table[] = {
SET_LAW(CONFIG_SYS_FLASH_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAWAR_SIZE_512M, LAW_TRGT_IF_PCIE_1),
SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_1),
SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAWAR_SIZE_512M, LAW_TRGT_IF_PCIE_2),

2
board/freescale/mpc8572ds/mpc8572ds.c
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@ -358,7 +358,7 @@ int board_early_init_r(void)
/* invalidate existing TLB entry for flash + promjet */
disable_tlb(flash_esel);
set_tlb(1, flashbase, flashbase, /* tlb, epn, rpn */
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, /* tlb, epn, rpn */
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, /* perms, wimge */
0, flash_esel, BOOKE_PAGESZ_256M, 1); /* ts, esel, tsize, iprot */

2
board/freescale/mpc8572ds/tlb.c
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@ -54,7 +54,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
/* W**G* - Flash/promjet, localbus */
/* This will be changed to *I*G* after relocation to RAM. */
SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE,
SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SX|MAS3_SR, MAS2_W|MAS2_G,
0, 2, BOOKE_PAGESZ_256M, 1),

9
include/configs/MPC8536DS.h
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@ -166,12 +166,13 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
* Local Bus Definitions
*/
#define CONFIG_SYS_FLASH_BASE 0xe0000000 /* start of FLASH 128M */
#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_BR0_PRELIM 0xe8001001
#define CONFIG_SYS_OR0_PRELIM 0xf8000ff7
#define CONFIG_SYS_BR0_PRELIM (BR_PHYS_ADDR((CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000)) | BR_PS_16 | BR_V)
#define CONFIG_SYS_OR0_PRELIM 0xf8000ff7
#define CONFIG_SYS_BR1_PRELIM 0xe0001001
#define CONFIG_SYS_OR1_PRELIM 0xf8000ff7
#define CONFIG_SYS_BR1_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V)
#define CONFIG_SYS_OR1_PRELIM 0xf8000ff7
#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE + 0x8000000, CONFIG_SYS_FLASH_BASE}
#define CONFIG_SYS_FLASH_QUIET_TEST

9
include/configs/MPC8572DS.h
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@ -169,12 +169,13 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
* Local Bus Definitions
*/
#define CONFIG_SYS_FLASH_BASE 0xe0000000 /* start of FLASH 128M */
#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_BR0_PRELIM 0xe8001001
#define CONFIG_SYS_OR0_PRELIM 0xf8000ff7
#define CONFIG_SYS_BR0_PRELIM (BR_PHYS_ADDR((CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000)) | BR_PS_16 | BR_V)
#define CONFIG_SYS_OR0_PRELIM 0xf8000ff7
#define CONFIG_SYS_BR1_PRELIM 0xe0001001
#define CONFIG_SYS_OR1_PRELIM 0xf8000ff7
#define CONFIG_SYS_BR1_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V)
#define CONFIG_SYS_OR1_PRELIM 0xf8000ff7
#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE + 0x8000000, CONFIG_SYS_FLASH_BASE}
#define CONFIG_SYS_FLASH_QUIET_TEST

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