The bcm283x family of SoCs have a GPIO controller that also acts as pinctrl controller. This patch introduces a new pinctrl driver that can actually properly mux devices into their device tree defined pin states and is now the primary owner of the gpio device. The previous GPIO driver gets moved into a subdevice of the pinctrl driver, bound to the same OF node. That way whenever a device asks for pinctrl support, it gets it automatically from the pinctrl driver and GPIO support is still available in the normal command line phase. Signed-off-by: Alexander Graf <agraf@suse.de>master
Alexander Graf
6 years ago
committed by
Tom Rini
parent
8996975ff8
commit
caf2233b28
@ -0,0 +1,7 @@ |
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config PINCTRL_BCM283X |
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depends on ARCH_BCM283X && PINCTRL_FULL && OF_CONTROL |
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default y |
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bool "Broadcom 283x family pin control driver" |
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help |
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Support pin multiplexing and pin configuration control on |
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Broadcom's 283x family of SoCs. |
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@ -0,0 +1,7 @@ |
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#
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# Copyright (C) 2018 Alexander Graf <agraf@suse.de>
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#
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# SPDX-License-Identifier: GPL-2.0
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# https://spdx.org/licenses
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obj-$(CONFIG_PINCTRL_BCM283X) += pinctrl-bcm283x.o
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@ -0,0 +1,152 @@ |
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/*
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* Copyright (C) 2018 Alexander Graf <agraf@suse.de> |
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* |
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* Based on drivers/pinctrl/mvebu/pinctrl-mvebu.c and |
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* drivers/gpio/bcm2835_gpio.c |
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* |
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* This driver gets instantiated by the GPIO driver, because both devices |
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* share the same device node. |
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* |
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* SPDX-License-Identifier: GPL-2.0 |
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* https://spdx.org/licenses
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*/ |
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#include <common.h> |
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#include <config.h> |
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#include <errno.h> |
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#include <dm.h> |
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#include <dm/pinctrl.h> |
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#include <dm/root.h> |
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#include <dm/device-internal.h> |
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#include <dm/lists.h> |
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#include <asm/system.h> |
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#include <asm/io.h> |
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#include <asm/gpio.h> |
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struct bcm283x_pinctrl_priv { |
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u32 *base_reg; |
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}; |
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#define MAX_PINS_PER_BANK 16 |
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static void bcm2835_gpio_set_func_id(struct udevice *dev, unsigned int gpio, |
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int func) |
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{ |
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struct bcm283x_pinctrl_priv *priv = dev_get_priv(dev); |
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int reg_offset; |
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int field_offset; |
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reg_offset = BCM2835_GPIO_FSEL_BANK(gpio); |
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field_offset = BCM2835_GPIO_FSEL_SHIFT(gpio); |
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clrsetbits_le32(&priv->base_reg[reg_offset], |
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BCM2835_GPIO_FSEL_MASK << field_offset, |
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(func & BCM2835_GPIO_FSEL_MASK) << field_offset); |
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} |
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static int bcm2835_gpio_get_func_id(struct udevice *dev, unsigned int gpio) |
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{ |
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struct bcm283x_pinctrl_priv *priv = dev_get_priv(dev); |
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u32 val; |
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val = readl(&priv->base_reg[BCM2835_GPIO_FSEL_BANK(gpio)]); |
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return (val >> BCM2835_GPIO_FSEL_SHIFT(gpio) & BCM2835_GPIO_FSEL_MASK); |
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} |
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/*
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* bcm283x_pinctrl_set_state: configure pin functions. |
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* @dev: the pinctrl device to be configured. |
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* @config: the state to be configured. |
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* @return: 0 in success |
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*/ |
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int bcm283x_pinctrl_set_state(struct udevice *dev, struct udevice *config) |
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{ |
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u32 pin_arr[MAX_PINS_PER_BANK]; |
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u32 function; |
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int i, len, pin_count = 0; |
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if (!dev_read_prop(config, "brcm,pins", &len) || !len || |
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len & 0x3 || dev_read_u32_array(config, "brcm,pins", pin_arr, |
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len / sizeof(u32))) { |
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debug("Failed reading pins array for pinconfig %s (%d)\n", |
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config->name, len); |
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return -EINVAL; |
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} |
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pin_count = len / sizeof(u32); |
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function = dev_read_u32_default(config, "brcm,function", -1); |
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if (function < 0) { |
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debug("Failed reading function for pinconfig %s (%d)\n", |
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config->name, function); |
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return -EINVAL; |
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} |
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for (i = 0; i < pin_count; i++) |
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bcm2835_gpio_set_func_id(dev, pin_arr[i], function); |
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return 0; |
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} |
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static int bcm283x_pinctrl_get_gpio_mux(struct udevice *dev, int banknum, |
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int index) |
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{ |
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if (banknum != 0) |
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return -EINVAL; |
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return bcm2835_gpio_get_func_id(dev, index); |
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} |
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static const struct udevice_id bcm2835_pinctrl_id[] = { |
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{.compatible = "brcm,bcm2835-gpio"}, |
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{} |
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}; |
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int bcm283x_pinctl_probe(struct udevice *dev) |
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{ |
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struct bcm283x_pinctrl_priv *priv; |
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int ret; |
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struct udevice *pdev; |
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priv = dev_get_priv(dev); |
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if (!priv) { |
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debug("%s: Failed to get private\n", __func__); |
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return -EINVAL; |
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} |
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priv->base_reg = dev_read_addr_ptr(dev); |
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if (priv->base_reg == (void *)FDT_ADDR_T_NONE) { |
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debug("%s: Failed to get base address\n", __func__); |
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return -EINVAL; |
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} |
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/* Create GPIO device as well */ |
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ret = device_bind(dev, lists_driver_lookup_name("gpio_bcm2835"), |
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"gpio_bcm2835", NULL, dev_of_offset(dev), &pdev); |
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if (ret) { |
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/*
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* While we really want the pinctrl driver to work to make |
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* devices go where they should go, the GPIO controller is |
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* not quite as crucial as it's only rarely used, so don't |
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* fail here. |
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*/ |
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printf("Failed to bind GPIO driver\n"); |
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} |
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return 0; |
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} |
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static struct pinctrl_ops bcm283x_pinctrl_ops = { |
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.set_state = bcm283x_pinctrl_set_state, |
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.get_gpio_mux = bcm283x_pinctrl_get_gpio_mux, |
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}; |
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U_BOOT_DRIVER(pinctrl_bcm283x) = { |
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.name = "bcm283x_pinctrl", |
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.id = UCLASS_PINCTRL, |
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.of_match = of_match_ptr(bcm2835_pinctrl_id), |
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.priv_auto_alloc_size = sizeof(struct bcm283x_pinctrl_priv), |
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.ops = &bcm283x_pinctrl_ops, |
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.probe = bcm283x_pinctl_probe |
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}; |
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