mmc: Kconfig: Add Arasan SDHCI entry

Add Arasan SDHCI entry to Kconfig and fix all references. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years ago · ce0335f2b4
parent 28f8099563
commit ce0335f2b4
18 changed files with 19 additions and 20 deletions
--- a/configs/xilinx_zynqmp_ep_defconfig
+++ b/configs/xilinx_zynqmp_ep_defconfig
@ -25,5 +25,6 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_ZYNQ_SDHCI=y
 CONFIG_ZYNQ_GEM=y
 # CONFIG_REGEX is not set
--- a/configs/zynq_microzed_defconfig
+++ b/configs/zynq_microzed_defconfig
@ -13,6 +13,7 @@ CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_ZYNQ_SDHCI=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
--- a/configs/zynq_picozed_defconfig
+++ b/configs/zynq_picozed_defconfig
@ -10,4 +10,5 @@ CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_ZYNQ_SDHCI=y
 CONFIG_ZYNQ_GEM=y
--- a/configs/zynq_zc702_defconfig
+++ b/configs/zynq_zc702_defconfig
@ -12,6 +12,7 @@ CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_ZYNQ_SDHCI=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
--- a/configs/zynq_zc706_defconfig
+++ b/configs/zynq_zc706_defconfig
@ -13,6 +13,7 @@ CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_ZYNQ_SDHCI=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
--- a/configs/zynq_zc770_xm010_defconfig
+++ b/configs/zynq_zc770_xm010_defconfig
@ -14,6 +14,7 @@ CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_ZYNQ_SDHCI=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
--- a/configs/zynq_zed_defconfig
+++ b/configs/zynq_zed_defconfig
@ -13,6 +13,7 @@ CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_ZYNQ_SDHCI=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
--- a/configs/zynq_zybo_defconfig
+++ b/configs/zynq_zybo_defconfig
@ -13,6 +13,7 @@ CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_ZYNQ_SDHCI=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_ZYNQ_GEM=y
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@ -37,4 +37,10 @@ config PIC32_SDHCI
 	help
 	  Support for Microchip PIC32 SDHCI controller.

+config ZYNQ_SDHCI
+	bool "Arasan SDHCI controller support"
+	depends on DM_MMC && OF_CONTROL
+	help
+	  Support for Arasan SDHCI host controller on Zynq/ZynqMP ARM SoCs platform
+
 endmenu
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@ -89,18 +89,14 @@
 # define CONFIG_CMD_SF
 #endif

-#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
+#if defined(CONFIG_ZYNQ_SDHCI)
 # define CONFIG_MMC
 # define CONFIG_GENERIC_MMC
 # define CONFIG_SDHCI
-# define CONFIG_ZYNQ_SDHCI
 # define CONFIG_CMD_MMC
 # ifndef CONFIG_ZYNQ_SDHCI_MAX_FREQ
 #  define CONFIG_ZYNQ_SDHCI_MAX_FREQ	200000000
 # endif
-#endif
-
-#if defined(CONFIG_ZYNQ_SDHCI)
 # define CONFIG_FAT_WRITE
 # define CONFIG_CMD_EXT4_WRITE
 #endif
--- a/include/configs/xilinx_zynqmp_ep.h
+++ b/include/configs/xilinx_zynqmp_ep.h
@ -13,7 +13,6 @@
 #ifndef __CONFIG_ZYNQMP_EP_H
 #define __CONFIG_ZYNQMP_EP_H

-#define CONFIG_ZYNQ_SDHCI0
 #define CONFIG_ZYNQ_SDHCI_MAX_FREQ	52000000
 #define CONFIG_ZYNQ_SDHCI_MIN_FREQ	(CONFIG_ZYNQ_SDHCI_MAX_FREQ << 9)
 #define CONFIG_ZYNQ_I2C0
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@ -86,11 +86,10 @@
 #endif

 /* MMC */
-#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
+#if defined(CONFIG_ZYNQ_SDHCI)
 # define CONFIG_MMC
 # define CONFIG_GENERIC_MMC
 # define CONFIG_SDHCI
-# define CONFIG_ZYNQ_SDHCI
 # define CONFIG_CMD_MMC
 # define CONFIG_ZYNQ_SDHCI_MAX_FREQ	52000000
 #endif
@ -131,7 +130,7 @@
 	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
 	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"

-# if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
+# if defined(CONFIG_ZYNQ_SDHCI)
 #  define CONFIG_DFU_MMC
 #  define DFU_ALT_INFO_MMC \
 	"dfu_mmc_info=" \
@ -311,7 +310,7 @@
 #define CONFIG_SPL_LDSCRIPT	"arch/arm/mach-zynq/u-boot-spl.lds"

 /* MMC support */
-#ifdef CONFIG_ZYNQ_SDHCI0
+#ifdef CONFIG_ZYNQ_SDHCI
 #define CONFIG_SPL_MMC_SUPPORT
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
--- a/include/configs/zynq_microzed.h
+++ b/include/configs/zynq_microzed.h
@ -14,8 +14,6 @@

 #define CONFIG_SYS_NO_FLASH

-#define CONFIG_ZYNQ_SDHCI0
-
 #include <configs/zynq-common.h>

 #endif /* __CONFIG_ZYNQ_MICROZED_H */
--- a/include/configs/zynq_picozed.h
+++ b/include/configs/zynq_picozed.h
@ -14,7 +14,6 @@

 #define CONFIG_SYS_NO_FLASH

-#define CONFIG_ZYNQ_SDHCI1
 #define CONFIG_ZYNQ_USB
 #define CONFIG_ZYNQ_BOOT_FREEBSD

--- a/include/configs/zynq_zc70x.h
+++ b/include/configs/zynq_zc70x.h
@ -14,7 +14,6 @@

 #define CONFIG_SYS_NO_FLASH

-#define CONFIG_ZYNQ_SDHCI0
 #define CONFIG_ZYNQ_USB
 #define CONFIG_ZYNQ_I2C0
 #define CONFIG_ZYNQ_EEPROM
--- a/include/configs/zynq_zc770.h
+++ b/include/configs/zynq_zc770.h
@ -14,10 +14,7 @@

 #define CONFIG_SYS_NO_FLASH

-#if defined(CONFIG_ZC770_XM010)
-# define CONFIG_ZYNQ_SDHCI0
-
-#elif defined(CONFIG_ZC770_XM012)
+#if defined(CONFIG_ZC770_XM012)
 # undef CONFIG_SYS_NO_FLASH

 #endif
--- a/include/configs/zynq_zed.h
+++ b/include/configs/zynq_zed.h
@ -15,7 +15,6 @@
 #define CONFIG_SYS_NO_FLASH

 #define CONFIG_ZYNQ_USB
-#define CONFIG_ZYNQ_SDHCI0
 #define CONFIG_ZYNQ_BOOT_FREEBSD

 #include <configs/zynq-common.h>
--- a/include/configs/zynq_zybo.h
+++ b/include/configs/zynq_zybo.h
@ -16,7 +16,6 @@
 #define CONFIG_SYS_NO_FLASH

 #define CONFIG_ZYNQ_USB
-#define CONFIG_ZYNQ_SDHCI0
 #define CONFIG_ZYNQ_BOOT_FREEBSD

 /* Define ZYBO PS Clock Frequency to 50MHz */