parent
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commit
d14af08466
@ -1,50 +0,0 @@ |
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#
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# (C) Copyright 2003-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).o
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COBJS := csb637.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS) |
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$(call cmd_link_o_target, $(OBJS) $(SOBJS))
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clean: |
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rm -f $(SOBJS) $(OBJS)
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distclean: clean |
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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@ -1 +0,0 @@ |
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CONFIG_SYS_TEXT_BASE = 0x23fc0000
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@ -1,94 +0,0 @@ |
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/*
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* (C) Copyright 2005 REA Elektronik GmbH <www.rea.de> |
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* Anders Larsen <alarsen@rea.de> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <asm/arch/AT91RM9200.h> |
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#include <netdev.h> |
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#include <asm/io.h> |
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#if defined(CONFIG_DRIVER_ETHER) |
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#include <at91rm9200_net.h> |
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#include <bcm5221.h> |
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#endif |
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DECLARE_GLOBAL_DATA_PTR; |
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/* ------------------------------------------------------------------------- */ |
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/*
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* Miscelaneous platform dependent initialisations |
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*/ |
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int board_init (void) |
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{ |
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/* Enable Ctrlc */ |
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console_init_f (); |
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/* memory and cpu-speed are setup before relocation */ |
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/* so we do _nothing_ here */ |
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/* arch number of CSB637-Board */ |
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gd->bd->bi_arch_number = MACH_TYPE_CSB637; |
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/* adress of boot parameters */ |
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; |
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return 0; |
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} |
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int dram_init (void) |
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{ |
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gd->bd->bi_dram[0].start = PHYS_SDRAM; |
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gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; |
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return 0; |
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} |
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#ifdef CONFIG_DRIVER_ETHER |
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#if defined(CONFIG_CMD_NET) |
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/*
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* Name: |
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* at91rm9200_GetPhyInterface |
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* Description: |
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* Initialise the interface functions to the PHY |
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* Arguments: |
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* None |
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* Return value: |
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* None |
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*/ |
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void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops) |
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{ |
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p_phyops->Init = bcm5221_InitPhy; |
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p_phyops->IsPhyConnected = bcm5221_IsPhyConnected; |
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p_phyops->GetLinkSpeed = bcm5221_GetLinkSpeed; |
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p_phyops->AutoNegotiate = bcm5221_AutoNegotiate; |
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} |
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#endif |
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#endif /* CONFIG_DRIVER_ETHER */ |
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#ifdef CONFIG_DRIVER_AT91EMAC |
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int board_eth_init(bd_t *bis) |
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{ |
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int rc = 0; |
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rc = at91emac_register(bis, 0); |
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return rc; |
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} |
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#endif |
@ -1,196 +0,0 @@ |
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/*
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* (C) Copyright 2005 REA Elektronik GmbH <www.rea.de> |
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* Anders Larsen <alarsen@rea.de> |
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* |
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* Configuation settings for the Cogent CSB637 board. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#ifndef __CONFIG_H |
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#define __CONFIG_H |
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#define CONFIG_AT91_LEGACY |
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/* ARM asynchronous clock */ |
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#define AT91C_MAIN_CLOCK 184320000 /* from 3.6864 MHz crystal (3686400 * 50) */ |
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#define AT91C_MASTER_CLOCK 46080000 /* (AT91C_MAIN_CLOCK/4) peripheral clock */ |
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#define AT91_SLOW_CLOCK 32768 /* slow clock */ |
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#define CONFIG_ARM920T 1 /* This is an ARM920T Core */ |
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#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */ |
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#define CONFIG_CSB637 1 /* on a CSB637 board */ |
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
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#define USE_920T_MMU 1 |
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
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#define CONFIG_SETUP_MEMORY_TAGS 1 |
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#define CONFIG_INITRD_TAG 1 |
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#ifndef CONFIG_SKIP_LOWLEVEL_INIT |
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#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 |
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/* flash */ |
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#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 |
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#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ |
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/* clocks */ |
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#define CONFIG_SYS_PLLAR_VAL 0x2031BE01 /* 184.320000 MHz for PCK */ |
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#define CONFIG_SYS_PLLBR_VAL 0x128A3E19 /* 47.996928 MHz (divider by 2 for USB) */ |
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#define CONFIG_SYS_MCKR_VAL 0x00000302 /* PCK/4 = MCK Master Clock = 46.080000 MHz from PLLA */ |
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/* sdram */ |
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#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ |
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#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 |
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#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 |
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#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ |
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#define CONFIG_SYS_SDRC_CR_VAL 0x21914159 /* set up the CONFIG_SYS_SDRAM */ |
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#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */ |
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#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */ |
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#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ |
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#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ |
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#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ |
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#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ |
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#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ |
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#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ |
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#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ |
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/*
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* Size of malloc() pool |
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*/ |
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) |
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#define CONFIG_BAUDRATE 115200 |
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#define CONFIG_SYS_AT91C_BRGR_DIVISOR 75 /* hardcode so no __divsi3 : AT91C_MASTER_CLOCK / baudrate / 16 */ |
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/*
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* Hardware drivers |
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*/ |
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/* define one of these to choose the DBGU, USART0 or USART1 as console */ |
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#define CONFIG_AT91RM9200_USART |
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#define CONFIG_DBGU |
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#undef CONFIG_USART0 |
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#undef CONFIG_USART1 |
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#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */ |
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#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */ |
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#define CONFIG_BOOTDELAY 3 |
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/* #define CONFIG_ENV_OVERWRITE 1 */ |
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/*
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* BOOTP options |
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*/ |
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#define CONFIG_BOOTP_BOOTFILESIZE |
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#define CONFIG_BOOTP_BOOTPATH |
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#define CONFIG_BOOTP_GATEWAY |
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#define CONFIG_BOOTP_HOSTNAME |
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/*
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* Command line configuration. |
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*/ |
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#include <config_cmd_default.h> |
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#define CONFIG_CMD_DHCP |
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#define CONFIG_CMD_JFFS2 |
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#define CONFIG_CMD_PING |
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#define CONFIG_NR_DRAM_BANKS 1 |
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#define PHYS_SDRAM 0x20000000 |
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#define PHYS_SDRAM_SIZE 0x4000000 /* 64 megs */ |
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#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM |
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#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 512*1024 - 4 |
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#define CONFIG_SYS_ALT_MEMTEST 1 |
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#define CONFIG_SYS_MEMTEST_SCRATCH CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 4 |
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#define CONFIG_NET_MULTI 1 |
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#ifdef CONFIG_NET_MULTI |
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#define CONFIG_DRIVER_AT91EMAC 1 |
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#define CONFIG_SYS_RX_ETH_BUFFER 8 |
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#else |
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#define CONFIG_DRIVER_ETHER 1 |
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#endif |
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#define CONFIG_NET_RETRY_COUNT 20 |
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#undef CONFIG_AT91C_USE_RMII |
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#undef CONFIG_HAS_DATAFLASH |
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#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) |
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#define CONFIG_SYS_MAX_DATAFLASH_BANKS 0 |
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#define CONFIG_SYS_MAX_DATAFLASH_PAGES 16384 |
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */ |
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */ |
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/*
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* FLASH Device configuration |
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*/ |
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#define PHYS_FLASH_1 0x10000000 |
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#define PHYS_FLASH_SIZE 0x800000 /* 8 megs main flash */ |
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
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#define CONFIG_SYS_FLASH_CFI 1 /* flash is CFI conformant */ |
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#define CONFIG_FLASH_CFI_DRIVER 1 /* use common cfi driver */ |
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#define CONFIG_SYS_FLASH_EMPTY_INFO |
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ |
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */ |
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#define CONFIG_SYS_FLASH_INCREMENT 0 /* there is only one bank */ |
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#define CONFIG_SYS_FLASH_PROTECTION 1 /* hardware flash protection */ |
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#define CONFIG_SYS_MAX_FLASH_SECT 64 |
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#define CONFIG_SYS_JFFS2_FIRST_BANK 0 |
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#define CONFIG_SYS_JFFS2_FIRST_SECTOR 3 |
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#define CONFIG_SYS_JFFS2_NUM_BANKS 1 |
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#undef CONFIG_ENV_IS_IN_DATAFLASH |
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#ifdef CONFIG_ENV_IS_IN_DATAFLASH |
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#define CONFIG_ENV_OFFSET 0x20000 |
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#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) |
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#define CONFIG_ENV_SIZE 0x2000 /* 0x8000 */ |
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#else |
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#define CONFIG_ENV_IS_IN_FLASH 1 |
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#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x20000) /* after u-boot.bin */ |
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#define CONFIG_ENV_SIZE 0x20000 /* sectors are 128K here */ |
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#endif /* CONFIG_ENV_IS_IN_DATAFLASH */ |
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#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */ |
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#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } |
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#define CONFIG_SYS_PROMPT "U-Boot> " /* Monitor Command Prompt */ |
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
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#define CONFIG_SYS_HZ 1000 |
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#define CONFIG_SYS_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */ |
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/* AT91C_TC_TIMER_DIV1_CLOCK */ |
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#define CONFIG_STACKSIZE (32*1024) /* regular stack */ |
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#ifdef CONFIG_USE_IRQ |
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#error CONFIG_USE_IRQ not supported |
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#endif |
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#endif |
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