Whitebox
/
u-boot
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Merge branch 'master' of git://git.denx.de/u-boot-uniphier

Browse Source
lime2-spi
Tom Rini 6 years ago
parent 89aa19d092 e39eed8f47
commit d1e15041ab
20 changed files with 68 additions and 90 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Show Stats Download Patch File Download Diff File
  1. 3
      arch/arm/dts/uniphier-ld11-global.dts
  2. 2
      arch/arm/dts/uniphier-ld11.dtsi
  3. 3
      arch/arm/dts/uniphier-ld20-global.dts
  4. 6
      arch/arm/dts/uniphier-ld20.dtsi
  5. 17
      arch/arm/dts/uniphier-ld4.dtsi
  6. 12
      arch/arm/dts/uniphier-pinctrl.dtsi
  7. 4
      arch/arm/dts/uniphier-pro4-ref.dts
  8. 26
      arch/arm/dts/uniphier-pro4.dtsi
  9. 15
      arch/arm/dts/uniphier-pro5.dtsi
  10. 18
      arch/arm/dts/uniphier-pxs2.dtsi
  11. 10
      arch/arm/dts/uniphier-pxs3.dtsi
  12. 17
      arch/arm/dts/uniphier-sld8.dtsi
  13. 6
      arch/arm/mach-uniphier/clk/clk-ld11.c
  14. 3
      arch/arm/mach-uniphier/clk/clk-ld4.c
  15. 3
      arch/arm/mach-uniphier/clk/clk-pro4.c
  16. 3
      arch/arm/mach-uniphier/sc-regs.h
  17. 1
      configs/uniphier_ld4_sld8_defconfig
  18. 1
      configs/uniphier_v7_defconfig
  19. 4
      drivers/mmc/uniphier-sd.c
  20. 4
      include/configs/uniphier.h

3
arch/arm/dts/uniphier-ld11-global.dts
Unescape View File

@ -54,12 +54,13 @@
sound {
compatible = "audio-graph-card";
label = "UniPhier LD11";
widgets = "Headphone", "Headphone Jack";
widgets = "Headphone", "Headphones";
dais = <&i2s_port2
&i2s_port3
&i2s_port4
&spdif_port0
&comp_spdif_port0>;
hp-det-gpio = <&gpio UNIPHIER_GPIO_IRQ(0) GPIO_ACTIVE_LOW>;
};
spdif-out {

2
arch/arm/dts/uniphier-ld11.dtsi
Unescape View File

@ -407,7 +407,7 @@
reg = <0x5a000000 0x400>;
interrupts = <0 78 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc_1v8>;
pinctrl-0 = <&pinctrl_emmc>;
clocks = <&sys_clk 4>;
resets = <&sys_rst 4>;
bus-width = <8>;

3
arch/arm/dts/uniphier-ld20-global.dts
Unescape View File

@ -54,12 +54,13 @@
sound {
compatible = "audio-graph-card";
label = "UniPhier LD20";
widgets = "Headphone", "Headphone Jack";
widgets = "Headphone", "Headphones";
dais = <&i2s_port2
&i2s_port3
&i2s_port4
&spdif_port0
&comp_spdif_port0>;
hp-det-gpio = <&gpio UNIPHIER_GPIO_IRQ(0) GPIO_ACTIVE_LOW>;
};
spdif-out {

6
arch/arm/dts/uniphier-ld20.dtsi
Unescape View File

@ -58,6 +58,7 @@
clocks = <&sys_clk 32>;
enable-method = "psci";
operating-points-v2 = <&cluster0_opp>;
#cooling-cells = <2>;
};
cpu2: cpu@100 {
@ -77,6 +78,7 @@
clocks = <&sys_clk 33>;
enable-method = "psci";
operating-points-v2 = <&cluster1_opp>;
#cooling-cells = <2>;
};
};
@ -512,7 +514,7 @@
reg = <0x5a000000 0x400>;
interrupts = <0 78 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc_1v8>;
pinctrl-0 = <&pinctrl_emmc>;
clocks = <&sys_clk 4>;
resets = <&sys_rst 4>;
bus-width = <8>;
@ -527,7 +529,7 @@
};
sd: sdhc@5a400000 {
compatible = "socionext,uniphier-sdhc";
compatible = "socionext,uniphier-sd-v3.1.1";
status = "disabled";
reg = <0x5a400000 0x800>;
interrupts = <0 76 4>;

17
arch/arm/dts/uniphier-ld4.dtsi
Unescape View File

@ -225,13 +225,13 @@
};
sd: sdhc@5a400000 {
compatible = "socionext,uniphier-sdhc";
compatible = "socionext,uniphier-sd-v2.91";
status = "disabled";
reg = <0x5a400000 0x200>;
interrupts = <0 76 4>;
pinctrl-names = "default", "1.8v";
pinctrl-names = "default", "uhs";
pinctrl-0 = <&pinctrl_sd>;
pinctrl-1 = <&pinctrl_sd_1v8>;
pinctrl-1 = <&pinctrl_sd_uhs>;
clocks = <&mio_clk 0>;
reset-names = "host", "bridge";
resets = <&mio_rst 0>, <&mio_rst 3>;
@ -243,20 +243,19 @@
};
emmc: sdhc@5a500000 {
compatible = "socionext,uniphier-sdhc";
compatible = "socionext,uniphier-sd-v2.91";
status = "disabled";
reg = <0x5a500000 0x200>;
interrupts = <0 78 4>;
pinctrl-names = "default", "1.8v";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc>;
pinctrl-1 = <&pinctrl_emmc_1v8>;
clocks = <&mio_clk 1>;
reset-names = "host", "bridge";
resets = <&mio_rst 1>, <&mio_rst 4>;
reset-names = "host", "bridge", "hw";
resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>;
bus-width = <8>;
non-removable;
cap-mmc-highspeed;
cap-mmc-hw-reset;
non-removable;
};
usb0: usb@5a800100 {

12
arch/arm/dts/uniphier-pinctrl.dtsi
Unescape View File

@ -56,11 +56,6 @@
function = "emmc";
};
pinctrl_emmc_1v8: emmc-1v8 {
groups = "emmc", "emmc_dat8";
function = "emmc";
};
pinctrl_ether_mii: ether-mii {
groups = "ether_mii";
function = "ether_mii";
@ -126,7 +121,7 @@
function = "sd";
};
pinctrl_sd_1v8: sd-1v8 {
pinctrl_sd_uhs: sd-uhs {
groups = "sd";
function = "sd";
};
@ -136,11 +131,6 @@
function = "sd1";
};
pinctrl_sd1_1v8: sd1-1v8 {
groups = "sd1";
function = "sd1";
};
pinctrl_system_bus: system-bus {
groups = "system_bus", "system_bus_cs1";
function = "system_bus";

4
arch/arm/dts/uniphier-pro4-ref.dts
Unescape View File

@ -70,10 +70,6 @@
status = "okay";
};
&sd1 {
status = "okay";
};
&usb2 {
status = "okay";
};

26
arch/arm/dts/uniphier-pro4.dtsi
Unescape View File

@ -259,13 +259,13 @@
};
sd: sdhc@5a400000 {
compatible = "socionext,uniphier-sdhc";
compatible = "socionext,uniphier-sd-v2.91";
status = "disabled";
reg = <0x5a400000 0x200>;
interrupts = <0 76 4>;
pinctrl-names = "default", "1.8v";
pinctrl-names = "default", "uhs";
pinctrl-0 = <&pinctrl_sd>;
pinctrl-1 = <&pinctrl_sd_1v8>;
pinctrl-1 = <&pinctrl_sd_uhs>;
clocks = <&mio_clk 0>;
reset-names = "host", "bridge";
resets = <&mio_rst 0>, <&mio_rst 3>;
@ -277,37 +277,33 @@
};
emmc: sdhc@5a500000 {
compatible = "socionext,uniphier-sdhc";
compatible = "socionext,uniphier-sd-v2.91";
status = "disabled";
reg = <0x5a500000 0x200>;
interrupts = <0 78 4>;
pinctrl-names = "default", "1.8v";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc>;
pinctrl-1 = <&pinctrl_emmc_1v8>;
clocks = <&mio_clk 1>;
reset-names = "host", "bridge";
resets = <&mio_rst 1>, <&mio_rst 4>;
reset-names = "host", "bridge", "hw";
resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>;
bus-width = <8>;
non-removable;
cap-mmc-highspeed;
cap-mmc-hw-reset;
non-removable;
};
sd1: sdhc@5a600000 {
compatible = "socionext,uniphier-sdhc";
compatible = "socionext,uniphier-sd-v2.91";
status = "disabled";
reg = <0x5a600000 0x200>;
interrupts = <0 85 4>;
pinctrl-names = "default", "1.8v";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sd1>;
pinctrl-1 = <&pinctrl_sd1_1v8>;
clocks = <&mio_clk 2>;
reset-names = "host", "bridge";
resets = <&mio_rst 2>, <&mio_rst 5>;
bus-width = <4>;
cap-sd-highspeed;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
};
usb2: usb@5a800100 {

15
arch/arm/dts/uniphier-pro5.dtsi
Unescape View File

@ -480,30 +480,29 @@
};
emmc: sdhc@68400000 {
compatible = "socionext,uniphier-sdhc";
compatible = "socionext,uniphier-sd-v3.1";
status = "disabled";
reg = <0x68400000 0x800>;
interrupts = <0 78 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc>;
clocks = <&sd_clk 1>;
reset-names = "host";
resets = <&sd_rst 1>;
reset-names = "host", "hw";
resets = <&sd_rst 1>, <&sd_rst 6>;
bus-width = <8>;
non-removable;
cap-mmc-highspeed;
cap-mmc-hw-reset;
no-3-3-v;
non-removable;
};
sd: sdhc@68800000 {
compatible = "socionext,uniphier-sdhc";
compatible = "socionext,uniphier-sd-v3.1";
status = "disabled";
reg = <0x68800000 0x800>;
interrupts = <0 76 4>;
pinctrl-names = "default", "1.8v";
pinctrl-names = "default", "uhs";
pinctrl-0 = <&pinctrl_sd>;
pinctrl-1 = <&pinctrl_sd_1v8>;
pinctrl-1 = <&pinctrl_sd_uhs>;
clocks = <&sd_clk 0>;
reset-names = "host";
resets = <&sd_rst 0>;

18
arch/arm/dts/uniphier-pxs2.dtsi
Unescape View File

@ -36,6 +36,7 @@
enable-method = "psci";
next-level-cache = <&l2>;
operating-points-v2 = <&cpu_opp>;
#cooling-cells = <2>;
};
cpu2: cpu@2 {
@ -46,6 +47,7 @@
enable-method = "psci";
next-level-cache = <&l2>;
operating-points-v2 = <&cpu_opp>;
#cooling-cells = <2>;
};
cpu3: cpu@3 {
@ -56,6 +58,7 @@
enable-method = "psci";
next-level-cache = <&l2>;
operating-points-v2 = <&cpu_opp>;
#cooling-cells = <2>;
};
};
@ -420,30 +423,29 @@
};
emmc: sdhc@5a000000 {
compatible = "socionext,uniphier-sdhc";
compatible = "socionext,uniphier-sd-v3.1.1";
status = "disabled";
reg = <0x5a000000 0x800>;
interrupts = <0 78 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc>;
clocks = <&sd_clk 1>;
reset-names = "host";
resets = <&sd_rst 1>;
reset-names = "host", "hw";
resets = <&sd_rst 1>, <&sd_rst 6>;
bus-width = <8>;
non-removable;
cap-mmc-highspeed;
cap-mmc-hw-reset;
no-3-3-v;
non-removable;
};
sd: sdhc@5a400000 {
compatible = "socionext,uniphier-sdhc";
compatible = "socionext,uniphier-sd-v3.1.1";
status = "disabled";
reg = <0x5a400000 0x800>;
interrupts = <0 76 4>;
pinctrl-names = "default", "1.8v";
pinctrl-names = "default", "uhs";
pinctrl-0 = <&pinctrl_sd>;
pinctrl-1 = <&pinctrl_sd_1v8>;
pinctrl-1 = <&pinctrl_sd_uhs>;
clocks = <&sd_clk 0>;
reset-names = "host";
resets = <&sd_rst 0>;

10
arch/arm/dts/uniphier-pxs3.dtsi
Unescape View File

@ -327,7 +327,7 @@
reg = <0x5a000000 0x400>;
interrupts = <0 78 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc_1v8>;
pinctrl-0 = <&pinctrl_emmc>;
clocks = <&sys_clk 4>;
resets = <&sys_rst 4>;
bus-width = <8>;
@ -342,17 +342,21 @@
};
sd: sdhc@5a400000 {
compatible = "socionext,uniphier-sdhc";
compatible = "socionext,uniphier-sd-v3.1.1";
status = "disabled";
reg = <0x5a400000 0x800>;
interrupts = <0 76 4>;
pinctrl-names = "default";
pinctrl-names = "default", "uhs";
pinctrl-0 = <&pinctrl_sd>;
pinctrl-1 = <&pinctrl_sd_uhs>;
clocks = <&sd_clk 0>;
reset-names = "host";
resets = <&sd_rst 0>;
bus-width = <4>;
cap-sd-highspeed;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
};
soc_glue: soc-glue@5f800000 {

17
arch/arm/dts/uniphier-sld8.dtsi
Unescape View File

@ -229,13 +229,13 @@
};
sd: sdhc@5a400000 {
compatible = "socionext,uniphier-sdhc";
compatible = "socionext,uniphier-sd-v2.91";
status = "disabled";
reg = <0x5a400000 0x200>;
interrupts = <0 76 4>;
pinctrl-names = "default", "1.8v";
pinctrl-names = "default", "uhs";
pinctrl-0 = <&pinctrl_sd>;
pinctrl-1 = <&pinctrl_sd_1v8>;
pinctrl-1 = <&pinctrl_sd_uhs>;
clocks = <&mio_clk 0>;
reset-names = "host", "bridge";
resets = <&mio_rst 0>, <&mio_rst 3>;
@ -247,20 +247,19 @@
};
emmc: sdhc@5a500000 {
compatible = "socionext,uniphier-sdhc";
compatible = "socionext,uniphier-sd-v2.91";
status = "disabled";
reg = <0x5a500000 0x200>;
interrupts = <0 78 4>;
pinctrl-names = "default", "1.8v";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc>;
pinctrl-1 = <&pinctrl_emmc_1v8>;
clocks = <&mio_clk 1>;
reset-names = "host", "bridge";
resets = <&mio_rst 1>, <&mio_rst 4>;
reset-names = "host", "bridge", "hw";
resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>;
bus-width = <8>;
non-removable;
cap-mmc-highspeed;
cap-mmc-hw-reset;
non-removable;
};
usb0: usb@5a800100 {

6
arch/arm/mach-uniphier/clk/clk-ld11.c
Unescape View File

@ -34,14 +34,8 @@ void uniphier_ld11_clk_init(void)
#ifdef CONFIG_USB_EHCI_HCD
{
/* FIXME: the current clk driver can not handle parents */
u32 tmp;
int ch;
tmp = readl(SC_CLKCTRL4);
tmp |= BIT(10) | BIT(8); /* MIO, STDMAC */
writel(tmp, SC_CLKCTRL4);
for (ch = 0; ch < 3; ch++) {
void __iomem *phyctrl = (void __iomem *)SG_USBPHYCTRL;

3
arch/arm/mach-uniphier/clk/clk-ld4.c
Unescape View File

@ -24,9 +24,6 @@ void uniphier_ld4_clk_init(void)
/* provide clocks */
tmp = readl(SC_CLKCTRL);
#ifdef CONFIG_USB_EHCI_HCD
tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
#endif
#ifdef CONFIG_NAND_DENALI
tmp |= SC_CLKCTRL_CEN_NAND;
#endif

3
arch/arm/mach-uniphier/clk/clk-pro4.c
Unescape View File

@ -39,9 +39,6 @@ void uniphier_pro4_clk_init(void)
tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
SC_CLKCTRL_CEN_GIO;
#endif
#ifdef CONFIG_USB_EHCI_HCD
tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
#endif
#ifdef CONFIG_NAND_DENALI
tmp |= SC_CLKCTRL_CEN_NAND;
#endif

3
arch/arm/mach-uniphier/sc-regs.h
Unescape View File

@ -42,7 +42,6 @@
#define SC_RSTCTRL_NRST_USB3B0 (0x1 << 17) /* USB3 #0 bus */
#define SC_RSTCTRL_NRST_USB3C0 (0x1 << 16) /* USB3 #0 core */
#define SC_RSTCTRL_NRST_ETHER (0x1 << 12)
#define SC_RSTCTRL_NRST_STDMAC (0x1 << 10)
#define SC_RSTCTRL_NRST_GIO (0x1 << 6)
/* Pro4 or older */
#define SC_RSTCTRL_NRST_UMC1 (0x1 << 5)
@ -73,8 +72,6 @@
#define SC_CLKCTRL_CEN_USB31 (0x1 << 17) /* USB3 #1 */
#define SC_CLKCTRL_CEN_USB30 (0x1 << 16) /* USB3 #0 */
#define SC_CLKCTRL_CEN_ETHER (0x1 << 12)
#define SC_CLKCTRL_CEN_MIO (0x1 << 11)
#define SC_CLKCTRL_CEN_STDMAC (0x1 << 10)
#define SC_CLKCTRL_CEN_GIO (0x1 << 6)
/* Pro4 or older */
#define SC_CLKCTRL_CEN_UMC (0x1 << 4)

1
configs/uniphier_ld4_sld8_defconfig
Unescape View File

@ -27,6 +27,7 @@ CONFIG_CMD_TIME=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=uniphier-nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=uniphier-nand.0:1m(firmware),-(UBI)"
CONFIG_CMD_UBI=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld4-ref"

1
configs/uniphier_v7_defconfig
Unescape View File

@ -26,6 +26,7 @@ CONFIG_CMD_TIME=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=uniphier-nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=uniphier-nand.0:1m(firmware),-(UBI)"
CONFIG_CMD_UBI=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_DEFAULT_DEVICE_TREE="uniphier-pxs2-vodka"

4
drivers/mmc/uniphier-sd.c
Unescape View File

@ -25,7 +25,9 @@ static const struct dm_mmc_ops uniphier_sd_ops = {
};
static const struct udevice_id uniphier_sd_match[] = {
{ .compatible = "socionext,uniphier-sdhc", .data = 0 },
{ .compatible = "socionext,uniphier-sd-v2.91" },
{ .compatible = "socionext,uniphier-sd-v3.1" },
{ .compatible = "socionext,uniphier-sd-v3.1.1" },
{ /* sentinel */ }
};

4
include/configs/uniphier.h
Unescape View File

@ -60,7 +60,7 @@
#define CONFIG_SYS_MAX_FLASH_SECT 256
#define CONFIG_SYS_MONITOR_BASE 0
#define CONFIG_SYS_MONITOR_LEN 0x00090000 /* 576KB */
#define CONFIG_SYS_MONITOR_LEN 0x000d0000 /* 832KB */
#define CONFIG_SYS_FLASH_BASE 0
/*
@ -218,7 +218,7 @@
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
/* subtract sizeof(struct image_header) */
#define CONFIG_SYS_UBOOT_BASE (0x70000 - 0x40)
#define CONFIG_SYS_UBOOT_BASE (0x130000 - 0x40)
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_MAX_FOOTPRINT 0x10000

Write Preview
Loading…
Cancel
Save