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* Make sure Block Lock Bits get cleared in R360MPI flash driver

Browse Source 
* MPC823 LCD driver: Fill color map backwards, to allow for steady
  display when Linux takes over

* Patch by Erwin Rol, 27 Feb 2003:
  Add support for RTEMS (this time for real).

* Add support for "bmp info" and "bmp display" commands to load
  bitmap images; this can be used (for example in a "preboot"
  command) to display a splash screen very quickly after poweron.

* Add support for 133 MHz clock on INCA-IP board
master
wdenk 22 years ago
parent 4a6fd34b26
commit d791b1dc3e
21 changed files with 392 additions and 110 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 14
      CHANGELOG
  2. 4
      CREDITS
  3. 12
      README
  4. 26
      board/incaip/memsetup.S
  5. 6
      board/r360mpi/flash.c
  6. 156
      board/r360mpi/r360mpi.c
  7. 2
      common/Makefile
  8. 31
      common/cmd_bootm.c
  9. 2
      common/command.c
  10. 9
      common/console.c
  11. 5
      common/devices.c
  12. 217
      cpu/mpc8xx/lcd.c
  13. 1
      doc/README.commands
  14. 2
      include/cmd_confdefs.h
  15. 2
      include/commproc.h
  16. 3
      include/configs/R360MPI.h
  17. 4
      include/configs/incaip.h
  18. 2
      include/configs/lwmon.h
  19. 1
      include/image.h
  20. 2
      tools/env/fw_env.h
  21. 1
      tools/mkimage.c

14
CHANGELOG
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@ -2,6 +2,20 @@
Changes since U-Boot 0.3.0:
======================================================================
* Make sure Block Lock Bits get cleared in R360MPI flash driver
* MPC823 LCD driver: Fill color map backwards, to allow for steady
display when Linux takes over
* Patch by Erwin Rol, 27 Feb 2003:
Add support for RTEMS (this time for real).
* Add support for "bmp info" and "bmp display" commands to load
bitmap images; this can be used (for example in a "preboot"
command) to display a splash screen very quickly after poweron.
* Add support for 133 MHz clock on INCA-IP board
* Patch by Lutz Dennig, 10 Apr 2003:
Update for R360MPI board

4
CREDITS
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@ -238,6 +238,10 @@ N: Stefan Roese
E: stefan.roese@esd-electronics.com
D: IBM PPC401/403/405GP Support; Windows environment support
N: Erwin Rol
E: erwin@muffin.org
D: boot support for RTEMS
N: Neil Russell
E: caret@c-side.com
D: Author of LiMon-1.4.2, which contributed some ideas

12
README
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@ -789,6 +789,18 @@ The following options need to be configured:
Normally display is black on white background; define
CFG_WHITE_ON_BLACK to get it inverted.
- Spash Screen Support: CONFIG_SPLASH_SCREEN
If this option is set, the environment is checked for
a variable "splashimage". If found, the usual display
of logo, copyright and system information on the LCD
is supressed and the BMP image at the address
specified in "splashimage" is loaded instead. The
console is redirected to the "nulldev", too. This
allows for a "silent" boot where a splash screen is
loaded very quickly after power-on.
- Ethernet address:
CONFIG_ETHADDR
CONFIG_ETH2ADDR

26
board/incaip/memsetup.S
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@ -49,13 +49,11 @@
#define MC_LATENCY(value) 0x1038(value)
#define MC_TREFRESH(value) 0x1040(value)
#if CPU_CLOCK_RATE==150000000 /* 150 MHz clock for the MIPS core */
#define CGU_MODUL_BASE 0xBF107000
#define CGU_PLL1CR(value) 0x0008(value)
#define CGU_DIVCR(value) 0x0010(value)
#define CGU_MUXCR(value) 0x0014(value)
#define CGU_PLL1SR(value) 0x000C(value)
#endif
.globl memsetup
memsetup:
@ -67,12 +65,12 @@ memsetup:
li t1, 0xA0000041
sw t1, EBU_ADDSEL0(t0)
#if CPU_CLOCK_RATE==150000000 /* 150 MHz clock for the MIPS core */
li t1, 0xA841417E
sw t1, EBU_BUSCON0(t0) /* value set up by magic flash word */
#if CPU_CLOCK_RATE==100000000 /* 100 MHz clock for the MIPS core */
lw t1, EBU_BUSCON0(t0) /* value set up by magic flash word */
sw t1, EBU_BUSCON2(t0)
#else /* 100 MHz */
lw t1, EBU_BUSCON0(t0) /* value set up by magic flash word */
#else /* 150 MHz or 133 MHz */
li t1, 0x8841417E
sw t1, EBU_BUSCON0(t0)
sw t1, EBU_BUSCON2(t0)
#endif
@ -85,10 +83,10 @@ memsetup:
li t1, 0xBE0000F1
sw t1, EBU_ADDSEL1(t0)
#if CPU_CLOCK_RATE==150000000 /* 150 MHz clock for the MIPS core */
li t1, 0x684143FD
#else /* 100 MHz */
#if CPU_CLOCK_RATE==100000000 /* 100 MHz clock for the MIPS core */
li t1, 0x684142BD
#else /* 150 MHz or 133 MHz */
li t1, 0x684143FD
#endif
sw t1, EBU_BUSCON1(t0)
@ -105,6 +103,14 @@ b1:
beq t1, zero, b1
li t1, 0x80000001
sw t1, CGU_MUXCR(t0)
#elif CPU_CLOCK_RATE==133000000 /* 133 MHz clock for the MIPS core */
li t0, CGU_MODUL_BASE
li t1, 0x80000054
sw t1, CGU_DIVCR(t0)
li t1, 0x80000000
sw t1, CGU_MUXCR(t0)
li t1, 0x800B0001
sw t1, CGU_PLL1CR(t0)
#endif
/* SDRAM Initialization.

6
board/r360mpi/flash.c
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@ -206,6 +206,12 @@ static ulong flash_get_size (FPW * addr, flash_info_t * info)
{
FPW value;
/* Make sure Block Lock Bits get cleared */
addr[0] = (FPW) 0x00FF00FF;
addr[0] = (FPW) 0x00600060;
addr[0] = (FPW) 0x00D000D0;
addr[0] = (FPW) 0x00FF00FF;
/* Write auto select command: read Manufacturer ID */
addr[0x5555] = (FPW) 0x00AA00AA;
addr[0x2AAA] = (FPW) 0x00550055;

156
board/r360mpi/r360mpi.c
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@ -126,12 +126,12 @@ long int initdram (int board_type)
memctl->memc_mar = 0x00000088;
/*
* Map controller bank 2 to the SDRAM bank at
* Map controller bank 1 to the SDRAM bank at
* preliminary address - these have to be modified after the
* SDRAM size has been determined.
*/
memctl->memc_or2 = CFG_OR2_PRELIM;
memctl->memc_br2 = CFG_BR2_PRELIM;
memctl->memc_or1 = CFG_OR1_PRELIM;
memctl->memc_br1 = CFG_BR1_PRELIM;
memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
@ -139,9 +139,9 @@ long int initdram (int board_type)
/* perform SDRAM initializsation sequence */
memctl->memc_mcr = 0x80004105; /* SDRAM bank 0 */
memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */
udelay (200);
memctl->memc_mcr = 0x80004230; /* SDRAM bank 0 - execute twice */
memctl->memc_mcr = 0x80002230; /* SDRAM bank 0 - execute twice */
udelay (200);
memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
@ -153,7 +153,7 @@ long int initdram (int board_type)
*
* try 8 column mode
*/
size8 = dram_size (CFG_MAMR_8COL, (ulong *) SDRAM_BASE2_PRELIM,
size8 = dram_size (CFG_MAMR_8COL, (ulong *) SDRAM_BASE1_PRELIM,
SDRAM_MAX_SIZE);
udelay (1000);
@ -161,13 +161,13 @@ long int initdram (int board_type)
/*
* try 9 column mode
*/
size9 = dram_size (CFG_MAMR_9COL, (ulong *) SDRAM_BASE2_PRELIM,
size9 = dram_size (CFG_MAMR_9COL, (ulong *) SDRAM_BASE1_PRELIM,
SDRAM_MAX_SIZE);
if (size8 < size9) { /* leave configuration at 9 columns */
size_b0 = size9;
/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
} else { /* back to 8 columns */
} else { /* back to 8 columns */
size_b0 = size8;
memctl->memc_mamr = CFG_MAMR_8COL;
udelay (500);
@ -200,47 +200,6 @@ long int initdram (int board_type)
udelay (10000);
#ifdef CONFIG_CAN_DRIVER
/* Initialize OR3 / BR3 */
memctl->memc_or3 = CFG_OR3_CAN; /* switch GPLB_5 to GPLA_5 */
memctl->memc_br3 = CFG_BR3_CAN;
/* Initialize MBMR */
memctl->memc_mbmr = MAMR_GPL_B4DIS; /* GPL_B4 works as UPWAITB */
/* Initialize UPMB for CAN: single read */
memctl->memc_mdr = 0xFFFFC004;
memctl->memc_mcr = 0x0100 | UPMB;
memctl->memc_mdr = 0x0FFFD004;
memctl->memc_mcr = 0x0101 | UPMB;
memctl->memc_mdr = 0x0FFFC000;
memctl->memc_mcr = 0x0102 | UPMB;
memctl->memc_mdr = 0x3FFFC004;
memctl->memc_mcr = 0x0103 | UPMB;
memctl->memc_mdr = 0xFFFFDC05;
memctl->memc_mcr = 0x0104 | UPMB;
/* Initialize UPMB for CAN: single write */
memctl->memc_mdr = 0xFFFCC004;
memctl->memc_mcr = 0x0118 | UPMB;
memctl->memc_mdr = 0xCFFCD004;
memctl->memc_mcr = 0x0119 | UPMB;
memctl->memc_mdr = 0x0FFCC000;
memctl->memc_mcr = 0x011A | UPMB;
memctl->memc_mdr = 0x7FFCC004;
memctl->memc_mcr = 0x011B | UPMB;
memctl->memc_mdr = 0xFFFDCC05;
memctl->memc_mcr = 0x011C | UPMB;
#endif
return (size_b0);
}
@ -254,8 +213,8 @@ long int initdram (int board_type)
* - short between data lines
*/
static long int dram_size (long int mamr_value,
long int *base, long int maxsize)
static long int dram_size (long int mamr_value, long int *base,
long int maxsize)
{
volatile immap_t *immap = (immap_t *) CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
@ -298,10 +257,10 @@ static long int dram_size (long int mamr_value,
/* ------------------------------------------------------------------------- */
void r360_i2c_lcd_write (uchar data0, uchar data1)
void r360_pwm_write (uchar reg, uchar val)
{
if (i2c_write (CFG_I2C_LCD_ADDR, data0, 1, &data1, 1)) {
printf("Can't write lcd data 0x%02X 0x%02X.\n", data0, data1);
if (i2c_write (CFG_I2C_PWM_ADDR, reg, 1, &val, 1)) {
printf ("Can't write PWM register 0x%02X.\n", reg);
}
}
@ -312,8 +271,10 @@ void r360_i2c_lcd_write (uchar data0, uchar data1)
*/
/* Number of bytes returned from Keyboard Controller */
#define KEYBD_KEY_MAX 16 /* maximum key number */
#define KEYBD_DATALEN ((KEYBD_KEY_MAX + 7) / 8) /* normal key scan data */
#define KEYBD_KEY_MAX 20 /* maximum key number */
#define KEYBD_DATALEN ((KEYBD_KEY_MAX + 7) / 8) /* normal key scan data */
static uchar kbd_addr = CFG_I2C_KBD_ADDR;
static uchar *key_match (uchar *);
@ -326,14 +287,14 @@ int misc_init_r (void)
i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
i2c_read (CFG_I2C_KEY_ADDR, 0, 0, kbd_data, KEYBD_DATALEN);
i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
for (i = 0; i < KEYBD_DATALEN; ++i) {
sprintf (keybd_env + i + i, "%02X", kbd_data[i]);
}
setenv ("keybd", keybd_env);
str = strdup (key_match (keybd_env)); /* decode keys */
str = strdup (key_match (kbd_data)); /* decode keys */
#ifdef CONFIG_PREBOOT /* automatically configure "preboot" command on key match */
setenv ("preboot", str); /* set or delete definition */
@ -363,13 +324,16 @@ int misc_init_r (void)
static uchar kbd_magic_prefix[] = "key_magic";
static uchar kbd_command_prefix[] = "key_cmd";
static uchar *key_match (uchar * kbd_str)
static uchar *key_match (uchar * kbd_data)
{
uchar compare[KEYBD_DATALEN];
uchar magic[sizeof (kbd_magic_prefix) + 1];
uchar cmd_name[sizeof (kbd_command_prefix) + 1];
uchar *str, *suffix;
uchar key_mask;
uchar *str, *nxt, *suffix;
uchar *kbd_magic_keys;
char *cmd;
int i;
/*
* The following string defines the characters that can pe appended
@ -379,48 +343,62 @@ static uchar *key_match (uchar * kbd_str)
* "key_magic" is checked (old behaviour); the string "125" causes
* checks for "key_magic1", "key_magic2" and "key_magic5", etc.
*/
if ((kbd_magic_keys = getenv ("magic_keys")) != NULL) {
/* loop over all magic keys;
* use '\0' suffix in case of empty string
*/
for (suffix = kbd_magic_keys;
*suffix || suffix == kbd_magic_keys;
++suffix) {
sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
kbd_magic_keys = "";
/* loop over all magic keys;
* use '\0' suffix in case of empty string
*/
for (suffix=kbd_magic_keys; *suffix || suffix==kbd_magic_keys; ++suffix) {
sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
#if 0
printf ("### Check magic \"%s\"\n", magic);
printf ("### Check magic \"%s\"\n", magic);
#endif
if ((str = getenv (magic)) != 0) {
memcpy(compare, kbd_data, KEYBD_DATALEN);
#if 0
printf ("### Compare \"%s\" \"%s\"\n",
kbd_str, str);
#endif
if (strcmp (kbd_str, str) == 0) {
sprintf (cmd_name, "%s%c",
kbd_command_prefix,
*suffix);
for (str = getenv(magic); str != NULL; str = (*nxt) ? nxt+1 : nxt) {
uchar c;
c = (uchar) simple_strtoul (str, (char **) (&nxt), 16);
if (str == nxt) /* invalid character */
break;
if (c >= KEYBD_KEY_MAX) /* bad key number */
goto next_magic;
key_mask = 0x80 >> (c % 8);
if ((cmd = getenv (cmd_name)) != 0) {
if (!(compare[c / 8] & key_mask)) /* key not pressed */
goto next_magic;
compare[c / 8] &= ~key_mask;
}
for (i=0; i<KEYBD_DATALEN; i++)
if (compare[i]) /* key(s) not released */
goto next_magic;
sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
cmd = getenv (cmd_name);
#if 0
printf ("### Set PREBOOT to $(%s): \"%s\"\n",
cmd_name, cmd);
printf ("### Set PREBOOT to $(%s): \"%s\"\n",
cmd_name, cmd ? cmd : "<<NULL>>");
#endif
return (cmd);
}
}
}
}
*kbd_data = *suffix;
return (cmd);
next_magic:;
}
#if 0
printf ("### Delete PREBOOT\n");
#endif
*kbd_str = '\0';
*kbd_data = '\0';
return (NULL);
}
#endif /* CONFIG_PREBOOT */
#endif /* CONFIG_PREBOOT */
/* Read Keyboard status */
int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
@ -432,7 +410,7 @@ int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
/* Read keys */
i2c_read (CFG_I2C_KEY_ADDR, 0, 0, kbd_data, KEYBD_DATALEN);
i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
puts ("Keys:");
for (i = 0; i < KEYBD_DATALEN; ++i) {

2
common/Makefile
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@ -28,7 +28,7 @@ LIB = libcommon.a
AOBJS =
COBJS = main.o altera.o bedbug.o \
cmd_autoscript.o cmd_bedbug.o cmd_boot.o \
cmd_autoscript.o cmd_bedbug.o cmd_bmp.o cmd_boot.o \
cmd_bootm.o cmd_cache.o cmd_console.o cmd_date.o \
cmd_dcr.o cmd_diag.o cmd_doc.o cmd_nand.o cmd_dtt.o \
cmd_eeprom.o cmd_elf.o cmd_fdc.o cmd_fdos.o cmd_flash.o \

31
common/cmd_bootm.c
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@ -98,6 +98,7 @@ static boot_os_Fcn do_bootm_linux;
extern boot_os_Fcn do_bootm_linux;
#endif
static boot_os_Fcn do_bootm_netbsd;
static boot_os_Fcn do_bootm_rtems;
#if (CONFIG_COMMANDS & CFG_CMD_ELF)
static boot_os_Fcn do_bootm_vxworks;
static boot_os_Fcn do_bootm_qnxelf;
@ -321,6 +322,12 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
do_bootm_netbsd (cmdtp, flag, argc, argv,
addr, len_ptr, verify);
break;
case IH_OS_RTEMS:
do_bootm_rtems (cmdtp, flag, argc, argv,
addr, len_ptr, verify);
break;
#if (CONFIG_COMMANDS & CFG_CMD_ELF)
case IH_OS_VXWORKS:
do_bootm_vxworks (cmdtp, flag, argc, argv,
@ -831,6 +838,7 @@ print_type (image_header_t *hdr)
case IH_OS_VXWORKS: os = "VxWorks"; break;
case IH_OS_QNX: os = "QNX"; break;
case IH_OS_U_BOOT: os = "U-Boot"; break;
case IH_OS_RTEMS: os = "RTEMS"; break;
default: os = "Unknown OS"; break;
}
@ -953,6 +961,29 @@ int gunzip(void *dst, int dstlen, unsigned char *src, int *lenp)
return (0);
}
static void
do_bootm_rtems (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
ulong addr, ulong *len_ptr, int verify)
{
DECLARE_GLOBAL_DATA_PTR;
image_header_t *hdr = &header;
void (*entry_point)(bd_t *);
entry_point = (void (*)(bd_t *)) hdr->ih_ep;
printf ("## Transferring control to RTEMS (at address %08lx) ...\n",
(ulong)entry_point);
SHOW_BOOT_PROGRESS (15);
/*
* RTEMS Parameters:
* r3: ptr to board info data
*/
(*entry_point ) ( gd->bd );
}
#if (CONFIG_COMMANDS & CFG_CMD_ELF)
static void
do_bootm_vxworks (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],

2
common/command.c
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@ -72,6 +72,7 @@
#include <cmd_vfd.h> /* load a bitmap to the VFDs on TRAB */
#include <cmd_log.h>
#include <cmd_fdos.h>
#include <cmd_bmp.h>
#ifdef CONFIG_AMIGAONEG3SE
#include <cmd_menu.h>
@ -231,6 +232,7 @@ cmd_tbl_t cmd_tbl[] = {
CMD_TBL_AUTOSCRIPT
CMD_TBL_BASE
CMD_TBL_BDINFO
CMD_TBL_BMP
#ifdef CONFIG_AMIGAONEG3SE
CMD_TBL_BOOTA
#endif

9
common/console.c
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@ -355,7 +355,7 @@ int console_init_f (void)
return (0);
}
#ifdef CFG_CONSOLE_IS_IN_ENV
#if defined(CFG_CONSOLE_IS_IN_ENV) || defined(CONFIG_SPLASH_SCREEN)
/* search a device */
device_t *search_device (int flags, char *name)
{
@ -374,7 +374,7 @@ device_t *search_device (int flags, char *name)
}
return dev;
}
#endif /* CFG_CONSOLE_IS_IN_ENV */
#endif /* CFG_CONSOLE_IS_IN_ENV || CONFIG_SPLASH_SCREEN */
#ifdef CFG_CONSOLE_IS_IN_ENV
/* Called after the relocation - use desired console functions */
@ -469,6 +469,11 @@ int console_init_r (void)
device_t *inputdev = NULL, *outputdev = NULL;
int i, items = ListNumItems (devlist);
#ifdef CONFIG_SPLASH_SCREEN
/* suppress all output if splash screen is enabled */
outputdev = search_device (DEV_FLAGS_OUTPUT, "nulldev");
#endif
/* Scan devices looking for input and output devices */
for (i = 1;
(i <= items) && ((inputdev == NULL) || (outputdev == NULL));

5
common/devices.c
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@ -37,6 +37,11 @@ list_t devlist = 0;
device_t *stdio_devices[] = { NULL, NULL, NULL };
char *stdio_names[MAX_FILES] = { "stdin", "stdout", "stderr" };
#if defined(CONFIG_SPLASH_SCREEN) && !defined(CFG_DEVICE_NULLDEV)
#define CFG_DEVICE_NULLDEV 1
#endif
#ifdef CFG_DEVICE_NULLDEV
void nulldev_putc(const char c)
{

217
cpu/mpc8xx/lcd.c
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@ -39,12 +39,10 @@
/************************************************************************/
/* ** CONFIG STUFF -- should be moved to board config file */
/************************************************************************/
#ifndef CONFIG_EDT32F10
#define CONFIG_LCD_LOGO
#define LCD_INFO /* Display Logo, (C) and system info */
#endif
#ifdef CONFIG_V37
#if defined(CONFIG_V37) || defined(CONFIG_EDT32F10)
#undef CONFIG_LCD_LOGO
#undef LCD_INFO
#endif
@ -54,6 +52,14 @@
/************************************************************************/
/************************************************************************/
/* ** BITMAP DISPLAY SUPPORT -- should probably be moved elsewhere */
/************************************************************************/
#if (CONFIG_COMMANDS & CFG_CMD_BMP)
#include <bmp_layout.h>
#endif /* (CONFIG_COMMANDS & CFG_CMD_BMP) */
/************************************************************************/
/* ** FONT AND LOGO DATA */
/************************************************************************/
@ -995,6 +1001,102 @@ static void lcd_enable (void)
/*----------------------------------------------------------------------*/
#if (CONFIG_COMMANDS & CFG_CMD_BMP)
/*
Display the BMP file located at address bmp_image.
Only uncompressed
*/
int lcd_display_bitmap(ulong bmp_image)
{
volatile immap_t *immr = (immap_t *) CFG_IMMR;
volatile cpm8xx_t *cp = &(immr->im_cpm);
ushort *cmap;
ushort i, j;
uchar *fb;
bmp_image_t *bmp=(bmp_image_t *)bmp_image;
uchar *bmap;
ushort padded_line;
unsigned long width, height;
unsigned colors,bpix;
unsigned long compression;
if (!((bmp->header.signature[0]=='B') &&
(bmp->header.signature[1]=='M'))) {
printf ("Error: no valid bmp image at %lx\n", bmp_image);
return 1;
}
width = le32_to_cpu (bmp->header.width);
height = le32_to_cpu (bmp->header.height);
colors = 1<<le16_to_cpu (bmp->header.bit_count);
compression = le32_to_cpu (bmp->header.compression);
bpix = NBITS(panel_info.vl_bpix);
if ((bpix != 1) && (bpix != 8)) {
printf ("Error: %d bit/pixel mode not supported by U-Boot\n",
bpix);
return 1;
}
if (bpix != le16_to_cpu(bmp->header.bit_count)) {
printf ("Error: %d bit/pixel mode, but BMP has %d bit/pixel\n",
bpix,
le16_to_cpu(bmp->header.bit_count));
return 1;
}
if (compression!=BMP_BI_RGB) {
printf ("Error: compression type %ld not supported\n",
compression);
return 1;
}
debug ("Display-bmp: %d x %d with %d colors\n",
width, height, colors);
if (bpix==8) {
/* Fill the entire color map */
cmap = (ushort *)&(cp->lcd_cmap[255*sizeof(ushort)]);
/* Set color map */
for (i = 0; i < colors; ++i) {
bmp_color_table_entry_t cte = bmp->color_table[i];
ushort colreg =
((cte.red>>4) << 8) |
((cte.green>>4) << 4) |
(cte.blue>>4) ;
#ifdef CFG_INVERT_COLORS
colreg ^= 0xFFF;
#endif
*cmap-- = colreg;
}
}
padded_line = (width&0x3) ? ((width&~0x3)+4) : (width);
if (width>panel_info.vl_col)
width = panel_info.vl_col;
if (height>panel_info.vl_row)
height = panel_info.vl_row;
bmap = (uchar *)bmp + le32_to_cpu (bmp->header.data_offset);
fb = (uchar *)
(lcd_base +
(((height>=panel_info.vl_row) ? panel_info.vl_row : height)-1)
* lcd_line_length);
for (i = 0; i < height; ++i) {
for (j = 0; j < width ; j++)
*(fb++)=255-*(bmap++);
bmap += (width - padded_line);
fb -= (width + lcd_line_length);
}
return (0);
}
#endif /* (CONFIG_COMMANDS & CFG_CMD_BMP) */
/*----------------------------------------------------------------------*/
#ifdef NOT_USED_SO_FAR
static void lcd_disable (void)
{
@ -1066,6 +1168,100 @@ static void bitmap_plot (int x, int y)
}
#endif /* CONFIG_LCD_LOGO */
#if (CONFIG_COMMANDS & CFG_CMD_BMP)
/*
Display the BMP file located at address bmp_image.
Only uncompressed
*/
int lcd_display_bitmap(ulong bmp_image)
{
volatile immap_t *immr = (immap_t *) CFG_IMMR;
volatile cpm8xx_t *cp = &(immr->im_cpm);
ushort *cmap;
ushort i, j;
uchar *fb;
bmp_image_t *bmp=(bmp_image_t *)bmp_image;
uchar *bmap;
ushort padded_line;
unsigned long width, height;
unsigned colors,bpix;
unsigned long compression;
if (!((bmp->header.signature[0]=='B') &&
(bmp->header.signature[1]=='M'))) {
printf ("Error: no valid bmp image at %lx\n", bmp_image);
return 1;
}
width = le32_to_cpu (bmp->header.width);
height = le32_to_cpu (bmp->header.height);
colors = 1<<le16_to_cpu (bmp->header.bit_count);
compression = le32_to_cpu (bmp->header.compression);
bpix = NBITS(panel_info.vl_bpix);
if ((bpix != 1) && (bpix != 8)) {
printf ("Error: %d bit/pixel mode not supported by U-Boot\n",
bpix);
return 1;
}
if (bpix != le16_to_cpu(bmp->header.bit_count)) {
printf ("Error: %d bit/pixel mode, but BMP has %d bit/pixel\n",
bpix,
le16_to_cpu(bmp->header.bit_count));
return 1;
}
if (compression!=BMP_BI_RGB) {
printf ("Error: compression type %ld not supported\n",
compression);
return 1;
}
debug ("Display-bmp: %d x %d with %d colors\n",
width, height, colors);
if (bpix==8) {
/* Fill the entire color map */
cmap = (ushort *)&(cp->lcd_cmap[255*sizeof(ushort)]);
/* Set color map */
for (i = 0; i < colors; ++i) {
bmp_color_table_entry_t cte = bmp->color_table[i];
ushort colreg =
((cte.red>>4) << 8) |
((cte.green>>4) << 4) |
(cte.blue>>4) ;
#ifdef CFG_INVERT_COLORS
colreg ^= 0xFFF;
#endif
*cmap-- = colreg;
}
}
padded_line = (width&0x3) ? ((width&~0x3)+4) : (width);
if (width>panel_info.vl_col)
width = panel_info.vl_col;
if (height>panel_info.vl_row)
height = panel_info.vl_row;
bmap = (uchar *)bmp + le32_to_cpu (bmp->header.data_offset);
fb = (uchar *)
(lcd_base +
(((height>=panel_info.vl_row) ? panel_info.vl_row : height)-1)
* lcd_line_length);
for (i = 0; i < height; ++i) {
for (j = 0; j < width ; j++)
*(fb++)=255-*(bmap++);
bmap += (width - padded_line);
fb -= (width + lcd_line_length);
}
return (0);
}
#endif /* (CONFIG_COMMANDS & CFG_CMD_BMP) */
/*----------------------------------------------------------------------*/
static void *lcd_logo (void)
@ -1077,6 +1273,19 @@ static void *lcd_logo (void)
char temp[32];
#endif /* LCD_INFO */
#ifdef CONFIG_SPLASH_SCREEN
char *s;
ulong addr;
if ((s = getenv("splashimage")) != NULL) {
addr = simple_strtoul(s, NULL, 16);
if (lcd_display_bitmap (addr) == 0) {
return ((void *)lcd_base);
}
}
#endif /* CONFIG_SPLASH_SCREEN */
#ifdef CONFIG_LCD_LOGO
bitmap_plot (0, 0);
#endif /* CONFIG_LCD_LOGO */
@ -1086,7 +1295,7 @@ static void *lcd_logo (void)
sprintf (info, "%s (%s - %s) ", U_BOOT_VERSION, __DATE__, __TIME__);
lcd_drawchars (LCD_INFO_X, LCD_INFO_Y, info, strlen(info));
sprintf (info, "(C) 2002 DENX Software Engineering");
sprintf (info, "(C) 2003 DENX Software Engineering");
lcd_drawchars (LCD_INFO_X, LCD_INFO_Y + VIDEO_FONT_HEIGHT,
info, strlen(info));

1
doc/README.commands
Unescape View File

@ -15,6 +15,7 @@ as 2
autoscr 5
base 2
bdinfo 2
bmp 3
bootelf 7
bootm 5
bootp 5

2
include/cmd_confdefs.h
Unescape View File

@ -79,6 +79,7 @@
#define CFG_CMD_FDOS 0x0000200000000000 /* Floppy DOS support */
#define CFG_CMD_VFD 0x0000400000000000 /* VFD support (TRAB) */
#define CFG_CMD_NAND 0x0000800000000000 /* NAND support */
#define CFG_CMD_BMP 0x0001000000000000 /* BMP support */
#define CFG_CMD_ALL 0xFFFFFFFFFFFFFFFF /* ALL commands */
@ -87,6 +88,7 @@
*/
#define CFG_CMD_NONSTD (CFG_CMD_ASKENV | \
CFG_CMD_BEDBUG | \
CFG_CMD_BMP | \
CFG_CMD_BSP | \
CFG_CMD_CACHE | \
CFG_CMD_DATE | \

2
include/commproc.h
Unescape View File

@ -1365,7 +1365,7 @@ typedef struct scc_enet {
/*** TQM855L, TQM860L, TQM862L **************************************/
#if defined(CONFIG_TQM855L) || \
defined(CONFIG_TQM860L)
defined(CONFIG_TQM860L) || \
defined(CONFIG_TQM862L)
# ifdef CONFIG_SCC1_ENET /* use SCC for 10Mbps Ethernet */

3
include/configs/R360MPI.h
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@ -40,6 +40,8 @@
#undef CONFIG_EDT32F10
#define CONFIG_SHARP_LQ057Q3DC02
#define CONFIG_SPLASH_SCREEN
#define MPC8XX_FACT 1 /* Multiply by 1 */
#define MPC8XX_XIN 50000000 /* 50 MHz in */
#define CONFIG_8xx_GCLK_FREQ 50000000 /* define if can't use get_gclk_freq */
@ -118,6 +120,7 @@
#define CFG_I2C_TEM_ADDR 0x49 /* Temperature Sensors */
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
CFG_CMD_BMP | \
CFG_CMD_DHCP | \
CFG_CMD_DATE | \
CFG_CMD_I2C | \

4
include/configs/incaip.h
Unescape View File

@ -31,8 +31,8 @@
#define CONFIG_MIPS32 1 /* MIPS 4Kc CPU core */
#define CONFIG_INCA_IP 1 /* on a INCA-IP Board */
/* allowed values: 100000000 and 150000000 */
#define CPU_CLOCK_RATE 150000000 /* 150 MHz clock for the MIPS core */
/* allowed values: 100000000, 133000000, and 150000000 */
#define CPU_CLOCK_RATE 133000000 /* 133 MHz clock for the MIPS core */
#if CPU_CLOCK_RATE == 100000000
#define INFINEON_EBU_BOOTCFG 0x20C4 /* CMULT = 4 for 100 MHz */

2
include/configs/lwmon.h
Unescape View File

@ -153,6 +153,7 @@
CFG_CMD_EEPROM | \
CFG_CMD_IDE | \
CFG_CMD_BSP | \
CFG_CMD_BMP | \
CFG_CMD_POST_DIAG )
#else
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
@ -162,6 +163,7 @@
CFG_CMD_EEPROM | \
CFG_CMD_IDE | \
CFG_CMD_BSP | \
CFG_CMD_BMP | \
CFG_CMD_POST_DIAG )
#endif
#define CONFIG_MAC_PARTITION

1
include/image.h
Unescape View File

@ -45,6 +45,7 @@
#define IH_OS_PSOS 15 /* pSOS */
#define IH_OS_QNX 16 /* QNX */
#define IH_OS_U_BOOT 17 /* Firmware */
#define IH_OS_RTEMS 18 /* RTEMS */
/*
* CPU Architecture Codes (supported by Linux)

2
tools/env/fw_env.h vendored
Unescape View File

@ -27,7 +27,7 @@
* See included "fw_env.config" sample file (TRAB board)
* for notes on configuration.
*/
/*#define CONFIG_FILE "/etc/fw_env.config" */
#define CONFIG_FILE "/etc/fw_env.config"
#define HAVE_REDUND /* For systems with 2 env sectors */
#define DEVICE1_NAME "/dev/mtd1"

1
tools/mkimage.c
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@ -92,6 +92,7 @@ table_entry_t os_name[] = {
{ IH_OS_PSOS, "psos", "pSOS", },
{ IH_OS_QNX, "qnx", "QNX", },
{ IH_OS_U_BOOT, "u-boot", "U-Boot", },
{ IH_OS_RTEMS, "rtems", "RTEMS", },
{ -1, "", "", },
};

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