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Fix bad register definitions for LTX971 PHY on MPC85xx boards.

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Patch by Gerhard Jaeger, 21 Jun 2005
master
Wolfgang Denk 19 years ago
parent 0a3471fc78
commit d8169c9f3b
2 changed files with 9 additions and 6 deletions
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  1. 3
      CHANGELOG
  2. 12
      drivers/tsec.h

3
CHANGELOG
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@ -2,6 +2,9 @@
Changes since U-Boot 1.1.4:
======================================================================
* Fix bad register definitions for LTX971 PHY on MPC85xx boards.
Patch by Gerhard Jaeger, 21 Jun 2005
* Add netconsole and some more commands to RPXlite_DW board
Patch by Sam Song, 19 Jun 2005

12
drivers/tsec.h
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@ -161,12 +161,12 @@
#define MIIM_DM9161_10BTCSR_INIT 0x7800
/* LXT971 Status 2 registers */
#define MIIM_LXT971_SR2 17 /* Status Register 2 */
#define MIIM_LXT971_SR2_SPEED_MASK 0xf000
#define MIIM_LXT971_SR2_10HDX 0x1000 /* 10 Mbit half duplex selected */
#define MIIM_LXT971_SR2_10FDX 0x2000 /* 10 Mbit full duplex selected */
#define MIIM_LXT971_SR2_100HDX 0x4000 /* 100 Mbit half duplex selected */
#define MIIM_LXT971_SR2_100FDX 0x8000 /* 100 Mbit full duplex selected */
#define MIIM_LXT971_SR2 0x11 /* Status Register 2 */
#define MIIM_LXT971_SR2_SPEED_MASK 0x4200
#define MIIM_LXT971_SR2_10HDX 0x0000 /* 10 Mbit half duplex selected */
#define MIIM_LXT971_SR2_10FDX 0x0200 /* 10 Mbit full duplex selected */
#define MIIM_LXT971_SR2_100HDX 0x4000 /* 100 Mbit half duplex selected */
#define MIIM_LXT971_SR2_100FDX 0x4200 /* 100 Mbit full duplex selected */
#define MIIM_READ_COMMAND 0x00000001

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