This add some basic files required to allow the board to dispaly serial message and can run command(mmc info etc) Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Moved board Kconfig fragment from previous patch into this one to fix build error: Signed-off-by: Simon Glass <sjg@chromium.org> Series-changes: 8 - moved board Kconfig fragment from previous patch into this onemaster
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/* |
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* (C) Copyright 2015 Rockchip Electronics Co., Ltd |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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/dts-v1/; |
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#include "rk3036.dtsi" |
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/ { |
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model = "SDK-RK3036"; |
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compatible = "sdk,sdk-rk3036", "rockchip,rk3036"; |
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chosen { |
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stdout-path = &uart2; |
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}; |
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usb_control { |
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compatible = "rockchip,rk3036-usb-control"; |
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host_drv_gpio = <&gpio2 23 GPIO_ACTIVE_LOW>; |
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otg_drv_gpio = <&gpio0 26 GPIO_ACTIVE_LOW>; |
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}; |
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}; |
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&i2c1 { |
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status = "okay"; |
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hym8563: hym8563@51 { |
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compatible = "haoyu,hym8563"; |
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reg = <0x51>; |
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#clock-cells = <0>; |
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clock-frequency = <32768>; |
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clock-output-names = "xin32k"; |
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}; |
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}; |
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&usb_host { |
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status = "okay"; |
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}; |
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&usb_otg { |
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status = "okay"; |
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dr_mode = "host"; |
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}; |
@ -1,3 +1,17 @@ |
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if ROCKCHIP_RK3036 |
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config TARGET_EVB_RK3036 |
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bool "EVB_RK3036" |
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config SYS_SOC |
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default "rockchip" |
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config SYS_MALLOC_F_LEN |
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default 0x400 |
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config ROCKCHIP_COMMON |
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bool "Support rk common fuction" |
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source "board/evb_rk3036/evb_rk3036/Kconfig" |
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endif |
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@ -0,0 +1,15 @@ |
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if TARGET_EVB_RK3036 |
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config SYS_BOARD |
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default "evb_rk3036" |
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config SYS_VENDOR |
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default "evb_rk3036" |
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config SYS_CONFIG_NAME |
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default "evb_rk3036" |
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config BOARD_SPECIFIC_OPTIONS # dummy |
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def_bool y |
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endif |
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#
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# (C) Copyright 2015 Google, Inc
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += evb_rk3036.o
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/*
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* (C) Copyright 2015 Rockchip Electronics Co., Ltd |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <dm.h> |
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#include <asm/io.h> |
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#include <asm/arch/uart.h> |
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#include <asm/arch/sdram_rk3036.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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void get_ddr_config(struct rk3036_ddr_config *config) |
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{ |
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/* K4B4G1646Q config */ |
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config->ddr_type = 3; |
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config->rank = 2; |
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config->cs0_row = 15; |
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config->cs1_row = 15; |
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/* 8bank */ |
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config->bank = 3; |
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config->col = 10; |
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/* 16bit bw */ |
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config->bw = 1; |
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} |
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int board_init(void) |
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{ |
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return 0; |
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} |
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int dram_init(void) |
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{ |
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gd->ram_size = sdram_size(); |
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return 0; |
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} |
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#ifndef CONFIG_SYS_DCACHE_OFF |
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void enable_caches(void) |
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{ |
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/* Enable D-cache. I-cache is already enabled in start.S */ |
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dcache_enable(); |
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} |
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#endif |
@ -0,0 +1,26 @@ |
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CONFIG_ARM=y |
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CONFIG_ARCH_ROCKCHIP=y |
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CONFIG_ROCKCHIP_RK3036=y |
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CONFIG_TARGET_EVB_RK3036=y |
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CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk" |
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CONFIG_SPL_STACK_R=y |
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CONFIG_SPL_STACK_R_ADDR=0x80000 |
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# CONFIG_CMD_IMLS is not set |
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# CONFIG_CMD_SETEXPR is not set |
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CONFIG_CMD_PMIC=y |
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CONFIG_CMD_REGULATOR=y |
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CONFIG_CLK=y |
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CONFIG_REGMAP=y |
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CONFIG_SYSCON=y |
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CONFIG_RESET=y |
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CONFIG_LED=y |
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CONFIG_SYS_I2C_ROCKCHIP=y |
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CONFIG_PINCTRL=y |
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CONFIG_ROCKCHIP_DWMMC=y |
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CONFIG_ROCKCHIP_3036_PINCTRL=y |
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CONFIG_ROCKCHIP_GPIO=y |
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CONFIG_RAM=y |
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CONFIG_DM_MMC=y |
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CONFIG_USE_PRIVATE_LIBGCC=y |
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CONFIG_CMD_DHRYSTONE=y |
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CONFIG_ERRNO_STR=y |
@ -0,0 +1,12 @@ |
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/*
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* (C) Copyright 2015 Rockchip Electronics Co., Ltd |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#ifndef __CONFIG_H |
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#define __CONFIG_H |
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#include <configs/rk3036_common.h> |
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#endif |
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