S5P: Use accessor functions instead of SoC specific defines to access the base address

This patch is intended to prepare the other S5P SoC. (s5pc210)
If use SoC specific defines then can't share with other SoC.
So, make the accessor functions for access the base address by common way.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
master
Minkyu Kang 14 years ago
parent 6a69e11a79
commit d93d0f0cfe
  1. 24
      arch/arm/cpu/armv7/s5pc1xx/clock.c
  2. 2
      arch/arm/cpu/armv7/s5pc1xx/cpu_info.c
  3. 2
      arch/arm/cpu/armv7/s5pc1xx/reset.S
  4. 8
      arch/arm/cpu/armv7/s5pc1xx/sromc.c
  5. 5
      arch/arm/cpu/armv7/s5pc1xx/timer.c
  6. 28
      arch/arm/include/asm/arch-s5pc1xx/cpu.h
  7. 4
      arch/arm/include/asm/arch-s5pc1xx/pwm.h
  8. 6
      board/samsung/goni/lowlevel_init.S
  9. 2
      board/samsung/smdkc100/lowlevel_init.S
  10. 3
      board/samsung/smdkc100/onenand.c
  11. 2
      board/samsung/smdkc100/smdkc100.c
  12. 6
      drivers/mmc/s5p_mmc.c
  13. 6
      drivers/serial/serial_s5p.c

@ -45,7 +45,8 @@ unsigned long (*get_pll_clk)(int);
/* s5pc110: return pll clock frequency */
static unsigned long s5pc100_get_pll_clk(int pllreg)
{
struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
struct s5pc100_clock *clk =
(struct s5pc100_clock *)samsung_get_base_clock();
unsigned long r, m, p, s, mask, fout;
unsigned int freq;
@ -95,7 +96,8 @@ static unsigned long s5pc100_get_pll_clk(int pllreg)
/* s5pc100: return pll clock frequency */
static unsigned long s5pc110_get_pll_clk(int pllreg)
{
struct s5pc110_clock *clk = (struct s5pc110_clock *)S5PC1XX_CLOCK_BASE;
struct s5pc110_clock *clk =
(struct s5pc110_clock *)samsung_get_base_clock();
unsigned long r, m, p, s, mask, fout;
unsigned int freq;
@ -151,7 +153,8 @@ static unsigned long s5pc110_get_pll_clk(int pllreg)
/* s5pc110: return ARM clock frequency */
static unsigned long s5pc110_get_arm_clk(void)
{
struct s5pc110_clock *clk = (struct s5pc110_clock *)S5PC1XX_CLOCK_BASE;
struct s5pc110_clock *clk =
(struct s5pc110_clock *)samsung_get_base_clock();
unsigned long div;
unsigned long dout_apll, armclk;
unsigned int apll_ratio;
@ -170,7 +173,8 @@ static unsigned long s5pc110_get_arm_clk(void)
/* s5pc100: return ARM clock frequency */
static unsigned long s5pc100_get_arm_clk(void)
{
struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
struct s5pc100_clock *clk =
(struct s5pc100_clock *)samsung_get_base_clock();
unsigned long div;
unsigned long dout_apll, armclk;
unsigned int apll_ratio, arm_ratio;
@ -191,7 +195,8 @@ static unsigned long s5pc100_get_arm_clk(void)
/* s5pc100: return HCLKD0 frequency */
static unsigned long get_hclk(void)
{
struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
struct s5pc100_clock *clk =
(struct s5pc100_clock *)samsung_get_base_clock();
unsigned long hclkd0;
uint div, d0_bus_ratio;
@ -207,7 +212,8 @@ static unsigned long get_hclk(void)
/* s5pc100: return PCLKD1 frequency */
static unsigned long get_pclkd1(void)
{
struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
struct s5pc100_clock *clk =
(struct s5pc100_clock *)samsung_get_base_clock();
unsigned long d1_bus, pclkd1;
uint div, d1_bus_ratio, pclkd1_ratio;
@ -227,7 +233,8 @@ static unsigned long get_pclkd1(void)
/* s5pc110: return HCLKs frequency */
static unsigned long get_hclk_sys(int dom)
{
struct s5pc110_clock *clk = (struct s5pc110_clock *)S5PC1XX_CLOCK_BASE;
struct s5pc110_clock *clk =
(struct s5pc110_clock *)samsung_get_base_clock();
unsigned long hclk;
unsigned int div;
unsigned int offset;
@ -255,7 +262,8 @@ static unsigned long get_hclk_sys(int dom)
/* s5pc110: return PCLKs frequency */
static unsigned long get_pclk_sys(int dom)
{
struct s5pc110_clock *clk = (struct s5pc110_clock *)S5PC1XX_CLOCK_BASE;
struct s5pc110_clock *clk =
(struct s5pc110_clock *)samsung_get_base_clock();
unsigned long pclk;
unsigned int div;
unsigned int offset;

@ -30,7 +30,7 @@ unsigned int s5pc1xx_cpu_id = 0xC100;
#ifdef CONFIG_ARCH_CPU_INIT
int arch_cpu_init(void)
{
s5pc1xx_cpu_id = readl(S5PC1XX_PRO_ID);
s5pc1xx_cpu_id = readl(samsung_get_base_pro_id());
s5pc1xx_cpu_id = 0xC000 | ((s5pc1xx_cpu_id & 0x00FFF000) >> 12);
s5pc1xx_clock_init();

@ -28,7 +28,7 @@
.globl reset_cpu
reset_cpu:
ldr r1, =S5PC1XX_PRO_ID
ldr r1, =S5PC100_PRO_ID
ldr r2, [r1]
ldr r4, =0x00010000
and r4, r2, r4

@ -35,12 +35,8 @@
void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf)
{
u32 tmp;
struct s5pc1xx_smc *srom;
if (cpu_is_s5pc100())
srom = (struct s5pc1xx_smc *)S5PC100_SROMC_BASE;
else
srom = (struct s5pc1xx_smc *)S5PC110_SROMC_BASE;
struct s5pc1xx_smc *srom =
(struct s5pc1xx_smc *)samsung_get_base_sromc();
/* Configure SMC_BW register to handle proper SROMC bank */
tmp = srom->bw;

@ -46,10 +46,7 @@ static unsigned long lastdec; /* Last decremneter snapshot */
/* macro to read the 16 bit timer */
static inline struct s5pc1xx_timer *s5pc1xx_get_base_timer(void)
{
if (cpu_is_s5pc110())
return (struct s5pc1xx_timer *)S5PC110_TIMER_BASE;
else
return (struct s5pc1xx_timer *)S5PC100_TIMER_BASE;
return (struct s5pc1xx_timer *)samsung_get_base_timer();
}
int timer_init(void)

@ -25,9 +25,9 @@
#define S5PC1XX_ADDR_BASE 0xE0000000
#define S5PC1XX_CLOCK_BASE 0xE0100000
/* S5PC100 */
#define S5PC100_PRO_ID 0xE0000000
#define S5PC100_CLOCK_BASE 0xE0100000
#define S5PC100_GPIO_BASE 0xE0300000
#define S5PC100_VIC0_BASE 0xE4000000
#define S5PC100_VIC1_BASE 0xE4100000
@ -41,6 +41,8 @@
#define S5PC100_MMC_BASE 0xED800000
/* S5PC110 */
#define S5PC110_PRO_ID 0xE0000000
#define S5PC110_CLOCK_BASE 0xE0100000
#define S5PC110_GPIO_BASE 0xE0200000
#define S5PC110_PWMTIMER_BASE 0xE2500000
#define S5PC110_WATCHDOG_BASE 0xE2700000
@ -54,9 +56,6 @@
#define S5PC110_VIC2_BASE 0xF2200000
#define S5PC110_VIC3_BASE 0xF2300000
/* Chip ID */
#define S5PC1XX_PRO_ID 0xE0000000
#ifndef __ASSEMBLY__
/* CPU detection macros */
extern unsigned int s5pc1xx_cpu_id;
@ -69,6 +68,25 @@ static inline int cpu_is_##type(void) \
IS_SAMSUNG_TYPE(s5pc100, 0xc100)
IS_SAMSUNG_TYPE(s5pc110, 0xc110)
#define SAMSUNG_BASE(device, base) \
static inline unsigned int samsung_get_base_##device(void) \
{ \
if (cpu_is_s5pc100()) \
return S5PC100_##base; \
else if (cpu_is_s5pc110()) \
return S5PC110_##base; \
else \
return 0; \
} \
SAMSUNG_BASE(clock, CLOCK_BASE)
SAMSUNG_BASE(gpio, GPIO_BASE)
SAMSUNG_BASE(pro_id, PRO_ID)
SAMSUNG_BASE(mmc, MMC_BASE)
SAMSUNG_BASE(sromc, SROMC_BASE)
SAMSUNG_BASE(timer, PWMTIMER_BASE)
SAMSUNG_BASE(uart, UART_BASE)
#endif
#endif /* _S5PC1XX_CPU_H */

@ -22,10 +22,6 @@
#ifndef __ASM_ARM_ARCH_PWM_H_
#define __ASM_ARM_ARCH_PWM_H_
/* PWM timer addressing */
#define S5PC100_TIMER_BASE S5PC100_PWMTIMER_BASE
#define S5PC110_TIMER_BASE S5PC110_PWMTIMER_BASE
/* Interval mode(Auto Reload) of PWM Timer 4 */
#define S5PC1XX_TCON4_AUTO_RELOAD (1 << 22)
/* Update TCNTB4 */

@ -51,7 +51,7 @@ lowlevel_init:
ldr r7, =S5PC100_GPIO_BASE
ldr r8, =S5PC100_GPIO_BASE
/* Read CPU ID */
ldr r2, =S5PC1XX_PRO_ID
ldr r2, =S5PC110_PRO_ID
ldr r0, [r2]
mov r1, #0x00010000
and r0, r0, r1
@ -377,7 +377,7 @@ lockloop:
* void system_clock_init(void)
*/
system_clock_init:
ldr r0, =S5PC1XX_CLOCK_BASE @ 0xE0100000
ldr r0, =S5PC110_CLOCK_BASE @ 0xE0100000
/* Check S5PC100 */
cmp r7, r8
@ -437,7 +437,7 @@ system_clock_init:
ldr r1, =0x3ff03ff
str r1, [r0, #0x114] @ S5PC110_CLAMP_STABLE
ldr r0, =S5PC1XX_CLOCK_BASE @ 0xE0100000
ldr r0, =S5PC110_CLOCK_BASE @ 0xE0100000
/* Set Clock divider */
ldr r1, =0x14131330 @ 1:1:4:4, 1:4:5

@ -131,7 +131,7 @@ wakeup_reset:
* void system_clock_init(void)
*/
system_clock_init:
ldr r8, =S5PC1XX_CLOCK_BASE @ 0xE0100000
ldr r8, =S5PC100_CLOCK_BASE @ 0xE0100000
/* Set Clock divider */
ldr r1, =0x00011110

@ -35,7 +35,8 @@
void onenand_board_init(struct mtd_info *mtd)
{
struct onenand_chip *this = mtd->priv;
struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
struct s5pc100_clock *clk =
(struct s5pc100_clock *)samsung_get_base_clock();
struct samsung_onenand *onenand;
int value;

@ -38,7 +38,7 @@ static void smc9115_pre_init(void)
u32 smc_bw_conf, smc_bc_conf;
struct s5pc100_gpio *const gpio =
(struct s5pc100_gpio *)S5PC100_GPIO_BASE;
(struct s5pc100_gpio *)samsung_get_base_gpio();
/* gpio configuration GPK0CON */
gpio_cfg_pin(&gpio->gpio_k0, CONFIG_ENV_SROM_BANK, GPIO_FUNC(2));

@ -30,11 +30,7 @@ struct mmc_host mmc_host[4];
static inline struct s5p_mmc *s5p_get_base_mmc(int dev_index)
{
unsigned long offset = dev_index * sizeof(struct s5p_mmc);
if (cpu_is_s5pc100())
return (struct s5p_mmc *)(S5PC100_MMC_BASE + offset);
else
return (struct s5p_mmc *)(S5PC110_MMC_BASE + offset);
return (struct s5p_mmc *)(samsung_get_base_mmc() + offset);
}
static void mmc_prepare_data(struct mmc_host *host, struct mmc_data *data)

@ -30,11 +30,7 @@
static inline struct s5p_uart *s5p_get_base_uart(int dev_index)
{
u32 offset = dev_index * sizeof(struct s5p_uart);
if (cpu_is_s5pc100())
return (struct s5p_uart *)(S5PC100_UART_BASE + offset);
else
return (struct s5p_uart *)(S5PC110_UART_BASE + offset);
return (struct s5p_uart *)(samsung_get_base_uart() + offset);
}
/*

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