Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Remy Bohmer <linux@bohmer.net> Cc: Wolfgang Grandegger <wg@denx.de> Cc: Jason Liu <r64343@freescale.com>master
Marek Vasut
14 years ago
committed by
Remy Bohmer
parent
f93022c3b1
commit
d98d8bc1c9
@ -0,0 +1,210 @@ |
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/*
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* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> |
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* |
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* (C) Copyright 2009 Freescale Semiconductor, Inc. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <usb.h> |
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#include <asm/io.h> |
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#include <asm/arch/imx-regs.h> |
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#include <asm/arch/mx5x_pins.h> |
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#include <asm/arch/iomux.h> |
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#include <asm/gpio.h> |
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#include <usb/ehci-fsl.h> |
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#include <usb/ulpi.h> |
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#include <errno.h> |
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#include "../../drivers/usb/host/ehci.h" |
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/* USB pin configuration */ |
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#define USB_PAD_CONFIG (PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST | \ |
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PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | \
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PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL) |
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/*
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* Configure the USB H1 and USB H2 IOMUX |
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*/ |
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void setup_iomux_usb(void) |
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{ |
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setup_iomux_usb_h1(); |
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if (machine_is_efikasb()) |
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setup_iomux_usb_h2(); |
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/* USB PHY reset */ |
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mxc_request_iomux(MX51_PIN_EIM_D27, IOMUX_CONFIG_ALT1); |
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mxc_iomux_set_pad(MX51_PIN_EIM_D27, PAD_CTL_PKE_ENABLE | |
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PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH); |
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/* USB HUB reset */ |
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mxc_request_iomux(MX51_PIN_GPIO1_5, IOMUX_CONFIG_ALT0); |
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mxc_iomux_set_pad(MX51_PIN_GPIO1_5, PAD_CTL_PKE_ENABLE | |
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PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH); |
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/* WIFI EN (act low) */ |
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mxc_request_iomux(MX51_PIN_EIM_A22, IOMUX_CONFIG_GPIO); |
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mxc_iomux_set_pad(MX51_PIN_EIM_A22, 0); |
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/* WIFI RESET */ |
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mxc_request_iomux(MX51_PIN_EIM_A16, IOMUX_CONFIG_GPIO); |
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mxc_iomux_set_pad(MX51_PIN_EIM_A16, 0); |
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/* BT EN (act low) */ |
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mxc_request_iomux(MX51_PIN_EIM_A17, IOMUX_CONFIG_GPIO); |
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mxc_iomux_set_pad(MX51_PIN_EIM_A17, 0); |
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} |
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/*
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* Enable devices connected to USB BUSes |
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*/ |
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static void efika_usb_enable_devices(void) |
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{ |
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/* Enable Bluetooth */ |
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gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 0); |
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udelay(10000); |
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gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 1); |
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/* Enable WiFi */ |
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gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A22), 1); |
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udelay(10000); |
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/* Reset the WiFi chip */ |
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gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 0); |
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udelay(10000); |
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gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 1); |
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} |
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/*
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* Reset USB HUB (or HUBs on EfikaSB) |
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*/ |
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static void efika_usb_hub_reset(void) |
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{ |
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/* HUB reset */ |
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gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1); |
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udelay(1000); |
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gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 0); |
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udelay(1000); |
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gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1); |
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} |
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/*
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* Reset USB PHY (or PHYs on EfikaSB) |
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*/ |
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static void efika_usb_phy_reset(void) |
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{ |
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/* SMSC 3317 PHY reset */ |
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gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 0); |
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udelay(1000); |
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gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 1); |
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} |
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static void efika_ehci_init(struct usb_ehci *ehci, uint32_t stp_gpio, |
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uint32_t alt0, uint32_t alt1) |
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{ |
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int ret; |
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struct ulpi_regs *ulpi = (struct ulpi_regs *)0; |
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mxc_request_iomux(stp_gpio, alt0); |
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mxc_iomux_set_pad(stp_gpio, PAD_CTL_DRV_HIGH | |
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PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); |
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gpio_direction_output(IOMUX_TO_GPIO(stp_gpio), 0); |
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udelay(1000); |
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gpio_set_value(IOMUX_TO_GPIO(stp_gpio), 1); |
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udelay(1000); |
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mxc_request_iomux(stp_gpio, alt1); |
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mxc_iomux_set_pad(stp_gpio, USB_PAD_CONFIG); |
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udelay(10000); |
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ret = ulpi_init((u32)&ehci->ulpi_viewpoint); |
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if (ret) { |
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printf("Efika USB ULPI initialization failed\n"); |
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return; |
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} |
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/* ULPI set flags */ |
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ulpi_write((u32)&ehci->ulpi_viewpoint, &ulpi->otg_ctrl, |
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ULPI_OTG_DP_PULLDOWN | ULPI_OTG_DM_PULLDOWN | |
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ULPI_OTG_EXTVBUSIND); |
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ulpi_write((u32)&ehci->ulpi_viewpoint, &ulpi->function_ctrl, |
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ULPI_FC_FULL_SPEED | ULPI_FC_OPMODE_NORMAL | |
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ULPI_FC_SUSPENDM); |
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ulpi_write((u32)&ehci->ulpi_viewpoint, &ulpi->iface_ctrl, 0); |
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/* Set VBus */ |
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ulpi_write((u32)&ehci->ulpi_viewpoint, &ulpi->otg_ctrl_set, |
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ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); |
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/*
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* Set VBusChrg |
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* |
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* NOTE: This violates USB specification, but otherwise, USB on Efika |
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* doesn't work. |
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*/ |
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ulpi_write((u32)&ehci->ulpi_viewpoint, &ulpi->otg_ctrl_set, |
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ULPI_OTG_CHRGVBUS); |
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} |
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int board_ehci_hcd_init(int port) |
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{ |
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/* Init iMX51 EHCI */ |
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efika_usb_phy_reset(); |
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efika_usb_hub_reset(); |
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efika_usb_enable_devices(); |
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return 0; |
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} |
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void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg) |
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{ |
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uint32_t port = OTG_BASE_ADDR + (0x200 * CONFIG_MXC_USB_PORT); |
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struct usb_ehci *ehci = (struct usb_ehci *)port; |
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struct ulpi_regs *ulpi = (struct ulpi_regs *)0; |
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ulpi_write((u32)&ehci->ulpi_viewpoint, &ulpi->otg_ctrl_set, |
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ULPI_OTG_CHRGVBUS); |
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wait_ms(50); |
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/* terminate the reset */ |
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*reg = ehci_readl(status_reg); |
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*reg |= EHCI_PS_PE; |
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} |
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void board_ehci_hcd_postinit(struct usb_ehci *ehci, int port) |
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{ |
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uint32_t tmp; |
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if (port == 0) { |
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/* Adjust UTMI PHY frequency to 24MHz */ |
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tmp = readl(OTG_BASE_ADDR + 0x80c); |
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tmp = (tmp & ~0x3) | 0x01; |
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writel(tmp, OTG_BASE_ADDR + 0x80c); |
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} else if (port == 1) { |
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efika_ehci_init(ehci, MX51_PIN_USBH1_STP, |
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IOMUX_CONFIG_ALT2, IOMUX_CONFIG_ALT0); |
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} else if ((port == 2) && machine_is_efikasb()) { |
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efika_ehci_init(ehci, MX51_PIN_EIM_A26, |
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IOMUX_CONFIG_ALT1, IOMUX_CONFIG_ALT2); |
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} |
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if (port) |
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mdelay(10); |
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} |
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