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ARM: dts: omap3-evm: Add support for TMDSEVM{3530, 3730}

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This commit adds OMAP3 EVM devicetree files from Linux v4.15-rc3. Note
that this is the first addition of OMAP34XX devicetree files.

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
master
Derald D. Woods 7 years ago committed by Tom Rini
parent 2d28ba18b5
commit d9be183b4c
10 changed files with 884 additions and 0 deletions
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  1. 4
      arch/arm/dts/Makefile
  2. 55
      arch/arm/dts/omap-gpmc-smsc911x.dtsi
  3. 29
      arch/arm/dts/omap3-evm-37xx-u-boot.dtsi
  4. 110
      arch/arm/dts/omap3-evm-37xx.dts
  5. 195
      arch/arm/dts/omap3-evm-common.dtsi
  6. 216
      arch/arm/dts/omap3-evm-processor-common.dtsi
  7. 29
      arch/arm/dts/omap3-evm-u-boot.dtsi
  8. 89
      arch/arm/dts/omap3-evm.dts
  9. 73
      arch/arm/dts/omap3-panel-sharp-ls037v7dw01.dtsi
  10. 84
      arch/arm/dts/omap34xx.dtsi

4
arch/arm/dts/Makefile
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@ -434,6 +434,10 @@ dtb-$(CONFIG_TARGET_OMAP3_LOGIC) += \
logicpd-torpedo-37xx-devkit.dtb \
logicpd-som-lv-37xx-devkit.dtb
dtb-$(CONFIG_TARGET_OMAP3_EVM) += \
omap3-evm-37xx.dtb \
omap3-evm.dtb
dtb-$(CONFIG_TARGET_SAMA5D2_PTC_EK) += \
at91-sama5d2_ptc_ek.dtb

55
arch/arm/dts/omap-gpmc-smsc911x.dtsi
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@ -0,0 +1,55 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Common file for GPMC connected smsc911x on omaps
*
* Note that the board specifc DTS file needs to specify
* ranges, pinctrl, reg, interrupt parent and interrupts.
*/
/ {
vddvario: regulator-vddvario {
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
};
vdd33a: regulator-vdd33a {
compatible = "regulator-fixed";
regulator-name = "vdd33a";
regulator-always-on;
};
};
&gpmc {
ethernet@gpmc {
compatible = "smsc,lan9221", "smsc,lan9115";
bank-width = <2>;
gpmc,device-width = <1>;
gpmc,cycle2cycle-samecsen = <1>;
gpmc,cycle2cycle-diffcsen = <1>;
gpmc,cs-on-ns = <5>;
gpmc,cs-rd-off-ns = <150>;
gpmc,cs-wr-off-ns = <150>;
gpmc,adv-on-ns = <0>;
gpmc,adv-rd-off-ns = <15>;
gpmc,adv-wr-off-ns = <40>;
gpmc,oe-on-ns = <45>;
gpmc,oe-off-ns = <140>;
gpmc,we-on-ns = <45>;
gpmc,we-off-ns = <140>;
gpmc,rd-cycle-ns = <155>;
gpmc,wr-cycle-ns = <155>;
gpmc,access-ns = <120>;
gpmc,page-burst-access-ns = <20>;
gpmc,bus-turnaround-ns = <75>;
gpmc,cycle2cycle-delay-ns = <75>;
gpmc,wait-monitoring-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wr-data-mux-bus-ns = <0>;
gpmc,wr-access-ns = <0>;
vddvario-supply = <&vddvario>;
vdd33a-supply = <&vdd33a>;
reg-io-width = <4>;
smsc,save-mac-address;
};
};

29
arch/arm/dts/omap3-evm-37xx-u-boot.dtsi
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@ -0,0 +1,29 @@
/*
* U-Boot additions
*
* (C) Copyright 2017 Derald D. Woods <woods.technical@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/ {
chosen {
stdout-path = &uart1;
};
};
&mmc1 {
cd-inverted;
};
&uart1 {
reg-shift = <2>;
};
&uart2 {
reg-shift = <2>;
};
&uart3 {
reg-shift = <2>;
};

110
arch/arm/dts/omap3-evm-37xx.dts
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@ -0,0 +1,110 @@
/*
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "omap36xx.dtsi"
#include "omap3-evm-common.dtsi"
#include "omap3-evm-processor-common.dtsi"
/ {
model = "TI OMAP37XX EVM (TMDSEVM3730)";
compatible = "ti,omap3-evm-37xx", "ti,omap3630", "ti,omap3";
};
&omap3_pmx_core2 {
pinctrl-names = "default";
pinctrl-0 = <&hsusb2_2_pins>;
ehci_phy_pins: pinmux_ehci_phy_pins {
pinctrl-single,pins = <
/* EHCI PHY reset GPIO etk_d7.gpio_21 */
OMAP3630_CORE2_IOPAD(0x25ea, PIN_OUTPUT | MUX_MODE4)
/* EHCI VBUS etk_d8.gpio_22 */
OMAP3630_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4)
>;
};
/* Used by OHCI and EHCI. OHCI won't work without external phy */
hsusb2_2_pins: pinmux_hsusb2_2_pins {
pinctrl-single,pins = <
/* etk_d10.hsusb2_clk */
OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)
/* etk_d11.hsusb2_stp */
OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)
/* etk_d12.hsusb2_dir */
OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)
/* etk_d13.hsusb2_nxt */
OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)
/* etk_d14.hsusb2_data0 */
OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)
/* etk_d15.hsusb2_data1 */
OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)
>;
};
};
&gpmc {
nand@0,0 {
compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */
linux,mtd-name= "hynix,h8kds0un0mer-4em";
nand-bus-width = <16>;
gpmc,device-width = <2>;
ti,nand-ecc-opt = "bch8";
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-off-ns = <40>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "X-Loader";
reg = <0 0x80000>;
};
partition@0x80000 {
label = "U-Boot";
reg = <0x80000 0x1c0000>;
};
partition@0x1c0000 {
label = "Environment";
reg = <0x240000 0x40000>;
};
partition@0x280000 {
label = "Kernel";
reg = <0x280000 0x500000>;
};
partition@0x780000 {
label = "Filesystem";
reg = <0x780000 0x1f880000>;
};
};
};

195
arch/arm/dts/omap3-evm-common.dtsi
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// SPDX-License-Identifier: GPL-2.0
/*
* Common support for omap3 EVM boards
*/
#include <dt-bindings/input/input.h>
#include "omap-gpmc-smsc911x.dtsi"
/ {
cpus {
cpu@0 {
cpu0-supply = <&vcc>;
};
};
/* HS USB Port 2 Power */
hsusb2_power: hsusb2_power_reg {
compatible = "regulator-fixed";
regulator-name = "hsusb2_vbus";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; /* gpio_22 */
startup-delay-us = <70000>;
enable-active-high;
};
/* HS USB Host PHY on PORT 2 */
hsusb2_phy: hsusb2_phy {
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; /* gpio_21 */
vcc-supply = <&hsusb2_power>;
#phy-cells = <0>;
};
leds {
compatible = "gpio-leds";
ledb {
label = "omap3evm::ledb";
gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
linux,default-trigger = "default-on";
};
};
wl12xx_vmmc: wl12xx_vmmc {
compatible = "regulator-fixed";
regulator-name = "vwl1271";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* gpio150 */
startup-delay-us = <70000>;
enable-active-high;
vin-supply = <&vmmc2>;
};
};
&i2c1 {
clock-frequency = <2600000>;
twl: twl@48 {
reg = <0x48>;
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
interrupt-parent = <&intc>;
};
};
#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"
#include "omap3-panel-sharp-ls037v7dw01.dtsi"
&backlight0 {
gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>;
};
&twl {
twl_power: power {
compatible = "ti,twl4030-power-omap3-evm", "ti,twl4030-power-idle";
ti,use_poweroff;
};
};
&i2c2 {
clock-frequency = <400000>;
};
&i2c3 {
clock-frequency = <400000>;
/*
* TVP5146 Video decoder-in for analog input support.
*/
tvp5146@5c {
compatible = "ti,tvp5146m2";
reg = <0x5c>;
};
};
&lcd_3v3 {
gpio = <&gpio5 25 GPIO_ACTIVE_LOW>; /* gpio153 */
};
&lcd0 {
enable-gpios = <&gpio5 24 GPIO_ACTIVE_HIGH>; /* gpio152, lcd INI */
reset-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; /* gpio155, lcd RESB */
mode-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH /* gpio154, lcd MO */
&gpio1 2 GPIO_ACTIVE_HIGH /* gpio2, lcd LR */
&gpio1 3 GPIO_ACTIVE_HIGH>; /* gpio3, lcd UD */
};
&mcspi1 {
tsc2046@0 {
interrupt-parent = <&gpio6>;
interrupts = <15 0>; /* gpio175 */
pendown-gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;
};
};
&mmc1 {
interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>;
vmmc-supply = <&vmmc1>;
vqmmc-supply = <&vsim>;
bus-width = <8>;
};
&mmc2 {
vmmc-supply = <&wl12xx_vmmc>;
non-removable;
bus-width = <4>;
cap-power-off-card;
#address-cells = <1>;
#size-cells = <0>;
wlcore: wlcore@2 {
compatible = "ti,wl1271";
reg = <2>;
interrupt-parent = <&gpio5>;
interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; /* gpio 149 */
ref-clock-frequency = <38400000>;
};
};
&twl_gpio {
ti,use-leds;
};
&twl_keypad {
linux,keymap = <
MATRIX_KEY(2, 2, KEY_1)
MATRIX_KEY(1, 1, KEY_2)
MATRIX_KEY(0, 0, KEY_3)
MATRIX_KEY(3, 2, KEY_4)
MATRIX_KEY(2, 1, KEY_5)
MATRIX_KEY(1, 0, KEY_6)
MATRIX_KEY(1, 3, KEY_7)
MATRIX_KEY(3, 1, KEY_8)
MATRIX_KEY(2, 0, KEY_9)
MATRIX_KEY(2, 3, KEY_KPASTERISK)
MATRIX_KEY(0, 2, KEY_0)
MATRIX_KEY(3, 0, KEY_KPDOT)
/* s4 not wired */
MATRIX_KEY(1, 2, KEY_BACKSPACE)
MATRIX_KEY(0, 1, KEY_ENTER)
>;
};
&usbhshost {
port2-mode = "ehci-phy";
};
&usbhsehci {
phys = <0 &hsusb2_phy>;
};
&usb_otg_hs {
interface-type = <0>;
usb-phy = <&usb2_phy>;
phys = <&usb2_phy>;
phy-names = "usb2-phy";
mode = <3>;
power = <50>;
};
&gpmc {
ethernet@gpmc {
interrupt-parent = <&gpio6>;
interrupts = <16 8>;
reg = <5 0 0xff>;
};
};
&vaux2 {
regulator-name = "usb_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};

216
arch/arm/dts/omap3-evm-processor-common.dtsi
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@ -0,0 +1,216 @@
/*
* Common support for omap3 EVM 35xx/37xx processor modules
*/
/ {
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
wl12xx_vmmc: wl12xx_vmmc {
pinctrl-names = "default";
pinctrl-0 = <&wl12xx_gpio>;
};
};
&dss {
vdds_dsi-supply = <&vpll2>;
vdda_video-supply = <&lcd_3v3>;
pinctrl-names = "default";
pinctrl-0 = <
&dss_dpi_pins1
&dss_dpi_pins2
>;
};
&hsusb2_phy {
pinctrl-names = "default";
pinctrl-0 = <&ehci_phy_pins>;
};
&omap3_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <&on_board_gpio_61 &hsusb2_pins>;
dss_dpi_pins1: pinmux_dss_dpi_pins2 {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE3) /* dss_data18.dss_data0 */
OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE3) /* dss_data19.dss_data1 */
OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE3) /* dss_data20.dss_data2 */
OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE3) /* dss_data21.dss_data3 */
OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE3) /* dss_data22.dss_data4 */
OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE3) /* dss_data23.dss_data5 */
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */
OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */
OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */
OMAP3_CORE1_IOPAD(0x2156, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */
>;
};
/* NOTE: Clocked externally, needs INPUT also for sdmmc2_clk.sdmmc2_clk */
mmc2_pins: pinmux_mmc2_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
>;
};
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x219e, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
>;
};
/* Devices are routed with gpmc_nbe1.gpio_61 to on-board devices */
on_board_gpio_61: pinmux_ehci_port_select_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x20c8, PIN_OUTPUT | MUX_MODE4)
>;
};
/* Used by OHCI and EHCI. OHCI won't work without external phy */
hsusb2_pins: pinmux_hsusb2_pins {
pinctrl-single,pins = <
/* mcspi1_cs3.hsusb2_data2 */
OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)
/* mcspi2_clk.hsusb2_data7 */
OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)
/* mcspi2_simo.hsusb2_data4 */
OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)
/* mcspi2_somi.hsusb2_data5 */
OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)
/* mcspi2_cs0.hsusb2_data6 */
OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)
/* mcspi2_cs1.hsusb2_data3 */
OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)
>;
};
wl12xx_gpio: pinmux_wl12xx_gpio {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2180, PIN_OUTPUT | MUX_MODE4) /* uart1_cts.gpio_150 */
OMAP3_CORE1_IOPAD(0x217e, PIN_INPUT | MUX_MODE4) /* uart1_rts.gpio_149 */
>;
};
smsc911x_pins: pinmux_smsc911x_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
>;
};
};
&omap3_pmx_wkup {
dss_dpi_pins2: pinmux_dss_dpi_pins1 {
pinctrl-single,pins = <
OMAP3_WKUP_IOPAD(0x2a0a, PIN_OUTPUT | MUX_MODE3) /* sys_boot0.dss_data18 */
OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE3) /* sys_boot1.dss_data19 */
OMAP3_WKUP_IOPAD(0x2a10, PIN_OUTPUT | MUX_MODE3) /* sys_boot3.dss_data20 */
OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE3) /* sys_boot4.dss_data21 */
OMAP3_WKUP_IOPAD(0x2a14, PIN_OUTPUT | MUX_MODE3) /* sys_boot5.dss_data22 */
OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | MUX_MODE3) /* sys_boot6.dss_data23 */
>;
};
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
};
&mmc3 {
status = "disabled";
};
&uart1 {
interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
};
&uart2 {
interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
};
&uart3 {
interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
};
/*
* GPIO_61 (nUSB2_EN_1V8) must be low to enable on-board EHCI USB2 interface
* for bus switch SN74CB3Q3384A, level-shifter SN74AVC16T245DGGR, and 1.8V.
*/
&gpio2 {
en_usb2_port {
gpio-hog;
gpios = <29 GPIO_ACTIVE_HIGH>; /* gpio_61 */
output-low;
line-name = "enable usb2 port";
};
};
/* T2_GPIO_2 low to route GPIO_61 to on-board devices */
&twl_gpio {
en_on_board_gpio_61 {
gpio-hog;
gpios = <2 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "en_hsusb2_clk";
};
};
&gpmc {
ranges = <0 0 0x30000000 0x1000000>, /* CS0: 16MB for NAND */
<5 0 0x2c000000 0x01000000>; /* CS5: 16MB for LAN9220 */
ethernet@gpmc {
pinctrl-names = "default";
pinctrl-0 = <&smsc911x_pins>;
};
};

29
arch/arm/dts/omap3-evm-u-boot.dtsi
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/*
* U-Boot additions
*
* (C) Copyright 2017 Derald D. Woods <woods.technical@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/ {
chosen {
stdout-path = &uart1;
};
};
&mmc1 {
cd-inverted;
};
&uart1 {
reg-shift = <2>;
};
&uart2 {
reg-shift = <2>;
};
&uart3 {
reg-shift = <2>;
};

89
arch/arm/dts/omap3-evm.dts
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/*
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "omap34xx.dtsi"
#include "omap3-evm-common.dtsi"
#include "omap3-evm-processor-common.dtsi"
/ {
model = "TI OMAP35XX EVM (TMDSEVM3530)";
compatible = "ti,omap3-evm", "ti,omap3430", "ti,omap3";
};
&omap3_pmx_core2 {
pinctrl-names = "default";
pinctrl-0 = <&hsusb2_2_pins>;
ehci_phy_pins: pinmux_ehci_phy_pins {
pinctrl-single,pins = <
/* EHCI PHY reset GPIO etk_d7.gpio_21 */
OMAP3430_CORE2_IOPAD(0x25ea, PIN_OUTPUT | MUX_MODE4)
/* EHCI VBUS etk_d8.gpio_22 */
OMAP3430_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4)
>;
};
/* Used by OHCI and EHCI. OHCI won't work without external phy */
hsusb2_2_pins: pinmux_hsusb2_2_pins {
pinctrl-single,pins = <
/* etk_d10.hsusb2_clk */
OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)
/* etk_d11.hsusb2_stp */
OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)
/* etk_d12.hsusb2_dir */
OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)
/* etk_d13.hsusb2_nxt */
OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)
/* etk_d14.hsusb2_data0 */
OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)
/* etk_d15.hsusb2_data1 */
OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)
>;
};
};
&gpmc {
nand@0,0 {
compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */
linux,mtd-name= "micron,mt29f2g16abdhc";
nand-bus-width = <16>;
gpmc,device-width = <2>;
ti,nand-ecc-opt = "bch8";
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-off-ns = <40>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
#address-cells = <1>;
#size-cells = <1>;
};
};

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arch/arm/dts/omap3-panel-sharp-ls037v7dw01.dtsi
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// SPDX-License-Identifier: GPL-2.0
/*
* Common file for omap dpi panels with QVGA and reset pins
*
* Note that the board specifc DTS file needs to specify
* at minimum the GPIO enable-gpios for display, and
* gpios for gpio-backlight.
*/
/ {
aliases {
display0 = &lcd0;
};
backlight0: backlight {
compatible = "gpio-backlight";
default-on;
};
/* 3.3V GPIO controlled regulator for LCD_ENVDD */
lcd_3v3: regulator-lcd-3v3 {
compatible = "regulator-fixed";
regulator-name = "lcd_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <70000>;
};
lcd0: display {
compatible = "sharp,ls037v7dw01";
label = "lcd";
power-supply = <&lcd_3v3>;
envdd-supply = <&lcd_3v3>;
port {
lcd_in: endpoint {
remote-endpoint = <&dpi_out>;
};
};
};
};
/* Needed to power the DPI pins */
&vpll2 {
regulator-always-on;
};
&dss {
status = "ok";
port {
dpi_out: endpoint {
remote-endpoint = <&lcd_in>;
data-lines = <18>;
};
};
};
&mcspi1 {
tsc2046@0 {
reg = <0>; /* CS0 */
compatible = "ti,tsc2046";
spi-max-frequency = <1000000>;
vcc-supply = <&lcd_3v3>;
ti,x-min = /bits/ 16 <0>;
ti,x-max = /bits/ 16 <8000>;
ti,y-min = /bits/ 16 <0>;
ti,y-max = /bits/ 16 <4800>;
ti,x-plate-ohms = /bits/ 16 <40>;
ti,pressure-max = /bits/ 16 <255>;
ti,swap-xy;
wakeup-source;
};
};

84
arch/arm/dts/omap34xx.dtsi
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/*
* Device Tree Source for OMAP34xx/OMAP35xx SoC
*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#include <dt-bindings/media/omap3-isp.h>
#include "omap3.dtsi"
/ {
cpus {
cpu: cpu@0 {
/* OMAP343x/OMAP35xx variants OPP1-5 */
operating-points = <
/* kHz uV */
125000 975000
250000 1075000
500000 1200000
550000 1270000
600000 1350000
>;
clock-latency = <300000>; /* From legacy driver */
};
};
ocp@68000000 {
omap3_pmx_core2: pinmux@480025d8 {
compatible = "ti,omap3-padconf", "pinctrl-single";
reg = <0x480025d8 0x24>;
#address-cells = <1>;
#size-cells = <0>;
#pinctrl-cells = <1>;
#interrupt-cells = <1>;
interrupt-controller;
pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0xff1f>;
};
isp: isp@480bc000 {
compatible = "ti,omap3-isp";
reg = <0x480bc000 0x12fc
0x480bd800 0x017c>;
interrupts = <24>;
iommus = <&mmu_isp>;
syscon = <&scm_conf 0x6c>;
ti,phy-type = <OMAP3ISP_PHY_TYPE_COMPLEX_IO>;
#clock-cells = <1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
};
};
bandgap: bandgap@48002524 {
reg = <0x48002524 0x4>;
compatible = "ti,omap34xx-bandgap";
#thermal-sensor-cells = <0>;
};
};
thermal_zones: thermal-zones {
#include "omap3-cpu-thermal.dtsi"
};
};
&ssi {
status = "ok";
clocks = <&ssi_ssr_fck>,
<&ssi_sst_fck>,
<&ssi_ick>;
clock-names = "ssi_ssr_fck",
"ssi_sst_fck",
"ssi_ick";
};
/include/ "omap34xx-omap36xx-clocks.dtsi"
/include/ "omap36xx-omap3430es2plus-clocks.dtsi"
/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
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