Merge branch 'master' of http://www.denx.de/git/u-boot
Jon Loeliger
18 years ago
commit
daaba9859b
@ -0,0 +1,49 @@ |
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#
|
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# (C) Copyright 2001-2006
|
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
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#
|
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# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
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#
|
||||
|
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include $(TOPDIR)/config.mk |
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|
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LIB = $(obj)lib$(BOARD).a
|
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|
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COBJS := $(BOARD).o
|
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|
||||
SRCS := $(COBJS:.o=.c)
|
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OBJS := $(addprefix $(obj),$(COBJS))
|
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|
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$(LIB): $(OBJS) |
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$(AR) $(ARFLAGS) $@ $(OBJS)
|
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|
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clean: |
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rm -f $(OBJS)
|
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|
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distclean: clean |
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rm -f $(LIB) core *.bak .depend *~
|
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|
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#########################################################################
|
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|
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# defines $(obj).depend target
|
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include $(SRCTREE)/rules.mk |
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|
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sinclude $(obj).depend |
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|
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#########################################################################
|
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@ -0,0 +1,26 @@ |
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#
|
||||
# (C) Copyright 2001-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
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#
|
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|
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# EP82xxM series boards by Embedded Planet
|
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|
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TEXT_BASE = 0xFFF00000
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@ -0,0 +1,291 @@ |
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/*
|
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* Copyright (C) 2006 Embedded Planet, LLC. |
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* |
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* Support for Embedded Planet EP82xxM boards. |
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* Tested on EP82xxM (MPC8270). |
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* |
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* See file CREDITS for list of people who contributed to this |
||||
* project. |
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* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
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*/ |
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|
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#include <common.h> |
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#include <mpc8260.h> |
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#include <ioports.h> |
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#include <asm/m8260_pci.h> |
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#ifdef CONFIG_PCI |
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#include <pci.h> |
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#endif |
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#include <miiphy.h> |
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|
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/*
|
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* I/O Port configuration table |
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* |
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* if conf is 1, then that port pin will be configured at boot time |
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* according to the five values podr/pdir/ppar/psor/pdat for that entry |
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*/ |
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|
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#define CFG_FCC2 1 |
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#define CFG_FCC3 1 |
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|
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const iop_conf_t iop_conf_tab[4][32] = { |
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|
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/* Port A */ |
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{ /* conf ppar psor pdir podr pdat */ |
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/* PA31 */ { 0, 0, 0, 0, 0, 1 }, /* PA31 */ |
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/* PA30 */ { 0, 0, 0, 0, 0, 1 }, /* PA30 */ |
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/* PA29 */ { 0, 0, 0, 0, 0, 1 }, /* PA29 */ |
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/* PA28 */ { 0, 0, 0, 0, 0, 1 }, /* PA28 */ |
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/* PA27 */ { 0, 0, 0, 0, 0, 1 }, /* PA27 */ |
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/* PA26 */ { 0, 0, 0, 0, 0, 1 }, /* PA26 */ |
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/* PA25 */ { 0, 0, 0, 0, 0, 1 }, /* PA25 */ |
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/* PA24 */ { 0, 0, 0, 0, 0, 1 }, /* PA24 */ |
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/* PA23 */ { 0, 0, 0, 0, 0, 1 }, /* PA23 */ |
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/* PA22 */ { 0, 0, 0, 0, 0, 0 }, /* PA22 */ |
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/* PA21 */ { 0, 0, 0, 0, 0, 1 }, /* PA21 */ |
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/* PA20 */ { 0, 0, 0, 0, 0, 1 }, /* PA20 */ |
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/* PA19 */ { 0, 0, 0, 0, 0, 1 }, /* PA19 */ |
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/* PA18 */ { 0, 0, 0, 0, 0, 1 }, /* PA18 */ |
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/* PA17 */ { 0, 0, 0, 0, 0, 1 }, /* PA17 */ |
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/* PA16 */ { 0, 0, 0, 0, 0, 1 }, /* PA16 */ |
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/* PA15 */ { 0, 0, 0, 0, 0, 1 }, /* PA15 */ |
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/* PA14 */ { 0, 0, 0, 0, 0, 1 }, /* PA14 */ |
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/* PA13 */ { 0, 0, 0, 0, 0, 1 }, /* PA13 */ |
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/* PA12 */ { 0, 0, 0, 0, 0, 1 }, /* PA12 */ |
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/* PA11 */ { 0, 0, 0, 0, 0, 1 }, /* PA11 */ |
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/* PA10 */ { 0, 0, 0, 0, 0, 1 }, /* PA10 */ |
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/* PA9 */ { 1, 1, 0, 1, 0, 1 }, /* SMC2 TxD */ |
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/* PA8 */ { 1, 1, 0, 0, 0, 1 }, /* SMC2 RxD */ |
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/* PA7 */ { 0, 0, 0, 0, 0, 1 }, /* PA7 */ |
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/* PA6 */ { 0, 0, 0, 0, 0, 1 }, /* PA6 */ |
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/* PA5 */ { 0, 0, 0, 0, 0, 1 }, /* PA5 */ |
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/* PA4 */ { 0, 0, 0, 0, 0, 1 }, /* PA4 */ |
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/* PA3 */ { 0, 0, 0, 0, 0, 1 }, /* PA3 */ |
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/* PA2 */ { 0, 0, 0, 0, 0, 1 }, /* PA2 */ |
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/* PA1 */ { 0, 0, 0, 0, 0, 1 }, /* PA1 */ |
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/* PA0 */ { 0, 0, 0, 0, 0, 1 } /* PA0 */ |
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}, |
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|
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/* Port B */ |
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{ /* conf ppar psor pdir podr pdat */ |
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/* PB31 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */ |
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/* PB30 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */ |
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/* PB29 */ { CFG_FCC2, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */ |
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/* PB28 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */ |
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/* PB27 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */ |
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/* PB26 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */ |
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/* PB25 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */ |
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/* PB24 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */ |
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/* PB23 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */ |
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/* PB22 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */ |
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/* PB21 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */ |
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/* PB20 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */ |
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/* PB19 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */ |
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/* PB18 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */ |
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/* PB17 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RX_DIV */ |
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/* PB16 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RX_ERR */ |
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/* PB15 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TX_ERR */ |
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/* PB14 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TX_EN */ |
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/* PB13 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:COL */ |
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/* PB12 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:CRS */ |
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/* PB11 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ |
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/* PB10 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ |
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/* PB9 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ |
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/* PB8 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ |
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/* PB7 */ { 0, 0, 0, 0, 0, 0 }, /* PB7 */ |
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/* PB6 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ |
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/* PB5 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ |
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/* PB4 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ |
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/* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ |
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/* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ |
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/* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ |
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/* PB0 */ { 0, 0, 0, 0, 0, 0 } /* non-existent */ |
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}, |
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|
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/* Port C */ |
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{ /* conf ppar psor pdir podr pdat */ |
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/* PC31 */ { 0, 0, 0, 0, 0, 0 }, /* PC31 */ |
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/* PC30 */ { 0, 0, 0, 0, 0, 0 }, /* PC30 */ |
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/* PC29 */ { 1, 1, 1, 0, 0, 0 }, /* SCC1 CTS# */ |
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/* PC28 */ { 0, 0, 0, 0, 0, 0 }, /* PC28 */ |
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/* PC27 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3: TXD[0] */ |
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/* PC26 */ { 0, 0, 0, 0, 0, 0 }, /* PC26 */ |
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/* PC25 */ { 0, 0, 0, 0, 0, 0 }, /* PC25 */ |
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/* PC24 */ { 0, 0, 0, 0, 0, 0 }, /* PC24 */ |
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/* PC23 */ { 0, 0, 0, 0, 0, 0 }, /* PC23 */ |
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/* PC22 */ { 0, 0, 0, 0, 0, 0 }, /* PC22 */ |
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/* PC21 */ { 0, 0, 0, 0, 0, 0 }, /* PC21 */ |
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/* PC20 */ { 0, 0, 0, 0, 0, 0 }, /* PC20 */ |
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/* PC19 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* RxClk (CLK13) */ |
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/* PC18 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* TxClk (CLK14) */ |
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/* PC17 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* RxClk (CLK15) */ |
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/* PC16 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* TxClk (CLK16) */ |
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/* PC15 */ { 0, 0, 0, 0, 0, 0 }, /* PC15 */ |
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/* PC14 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 CD# */ |
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/* PC13 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 CTS# */ |
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/* PC12 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 CD# */ |
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/* PC11 */ { 0, 0, 0, 0, 0, 0 }, /* PC11 */ |
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/* PC10 */ { 1, 1, 0, 0, 0, 0 }, /* SCC3 CD# */ |
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/* PC9 */ { 0, 0, 0, 0, 0, 0 }, /* PC9 */ |
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/* PC8 */ { 1, 1, 1, 0, 0, 0 }, /* SCC3 CTS# */ |
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/* PC7 */ { 0, 0, 0, 0, 0, 0 }, /* PC7 */ |
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/* PC6 */ { 0, 0, 0, 0, 0, 0 }, /* PC6 */ |
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/* PC5 */ { 0, 0, 0, 0, 0, 0 }, /* PC5 */ |
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/* PC4 */ { 0, 0, 0, 0, 0, 0 }, /* PC4 */ |
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/* PC3 */ { 0, 0, 0, 0, 0, 0 }, /* PC3 */ |
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/* PC2 */ { 0, 0, 0, 0, 0, 0 }, /* PC2 */ |
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/* PC1 */ { 0, 0, 0, 0, 0, 0 }, /* PC1 */ |
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/* PC0 */ { 0, 0, 0, 0, 0, 0 }, /* PC0 */ |
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}, |
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|
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/* Port D */ |
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{ /* conf ppar psor pdir podr pdat */ |
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/* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 RXD */ |
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/* PD30 */ { 1, 1, 1, 1, 0, 1 }, /* SCC1 TXD */ |
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/* PD29 */ { 1, 1, 0, 1, 0, 0 }, /* SCC1 RTS# */ |
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/* PD28 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 RXD */ |
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/* PD27 */ { 1, 1, 0, 1, 0, 0 }, /* SCC2 TXD */ |
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/* PD26 */ { 1, 1, 0, 1, 0, 0 }, /* SCC2 RTS# */ |
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/* PD25 */ { 1, 1, 0, 0, 0, 0 }, /* SCC3 RXD */ |
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/* PD24 */ { 1, 1, 0, 1, 0, 0 }, /* SCC3 TXD */ |
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/* PD23 */ { 1, 1, 0, 1, 0, 0 }, /* SCC3 RTS# */ |
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/* PD22 */ { 0, 0, 0, 0, 0, 1 }, /* PD22 */ |
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/* PD21 */ { 0, 0, 0, 0, 0, 1 }, /* PD21 */ |
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/* PD20 */ { 0, 0, 0, 0, 0, 1 }, /* PD20 */ |
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/* PD19 */ { 0, 0, 0, 0, 0, 1 }, /* PD19 */ |
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/* PD18 */ { 0, 0, 0, 0, 0, 1 }, /* PD18 */ |
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/* PD17 */ { 0, 0, 0, 0, 0, 1 }, /* PD17 */ |
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/* PD16 */ { 0, 0, 0, 0, 0, 1 }, /* PD16 */ |
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/* PD15 */ { 1, 1, 1, 0, 1, 1 }, /* I2C SDA */ |
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/* PD14 */ { 1, 1, 1, 0, 1, 1 }, /* I2C SCL */ |
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/* PD13 */ { 0, 0, 0, 0, 0, 1 }, /* PD13 */ |
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/* PD12 */ { 0, 0, 0, 0, 0, 1 }, /* PD12 */ |
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/* PD11 */ { 0, 0, 0, 0, 0, 1 }, /* PD11 */ |
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/* PD10 */ { 0, 0, 0, 0, 0, 1 }, /* PD10 */ |
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/* PD9 */ { 1, 1, 0, 1, 0, 1 }, /* SMC1 TxD */ |
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/* PD8 */ { 1, 1, 0, 0, 0, 1 }, /* SMC1 RxD */ |
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/* PD7 */ { 1, 1, 0, 0, 0, 1 }, /* SMC1 SMSYN */ |
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/* PD6 */ { 0, 0, 0, 0, 0, 1 }, /* PD6 */ |
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/* PD5 */ { 0, 0, 0, 0, 0, 1 }, /* PD5 */ |
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/* PD4 */ { 0, 0, 0, 0, 0, 1 }, /* PD4 */ |
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/* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ |
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/* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ |
||||
/* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ |
||||
/* PD0 */ { 0, 0, 0, 0, 0, 0 } /* non-existent */ |
||||
} |
||||
}; |
||||
|
||||
#ifdef CONFIG_PCI |
||||
typedef struct pci_ic_s { |
||||
unsigned long pci_int_stat; |
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unsigned long pci_int_mask; |
||||
}pci_ic_t; |
||||
#endif |
||||
|
||||
int board_early_init_f (void) |
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{ |
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vu_char *bcsr = (vu_char *)CFG_BCSR; |
||||
|
||||
bcsr[4] |= 0x30; /* Turn the LEDs off */ |
||||
|
||||
#if defined(CONFIG_CONS_ON_SMC) || defined(CONFIG_KGDB_ON_SMC) |
||||
bcsr[6] |= 0x10; |
||||
#endif |
||||
#if defined(CONFIG_CONS_ON_SCC) || defined(CONFIG_KGDB_ON_SCC) |
||||
bcsr[7] |= 0x10; |
||||
#endif |
||||
|
||||
#if CFG_FCC3 |
||||
bcsr[8] |= 0xC0; |
||||
#endif /* CFG_FCC3 */ |
||||
#if CFG_FCC2 |
||||
bcsr[8] |= 0x30; |
||||
#endif /* CFG_FCC2 */ |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
long int initdram(int board_type) |
||||
{ |
||||
/* Size in MB of SDRAM populated on board*/ |
||||
long int msize = 256; |
||||
|
||||
#ifndef CFG_RAMBOOT |
||||
volatile immap_t *immap = (immap_t *)CFG_IMMR; |
||||
volatile memctl8260_t *memctl = &immap->im_memctl; |
||||
vu_char *ramaddr = (vu_char *)CFG_SDRAM_BASE; |
||||
uchar c = 0xFF; |
||||
uint psdmr = CFG_PSDMR; |
||||
int i; |
||||
|
||||
unsigned char ramtmp; |
||||
unsigned char *ramptr1 = (unsigned char *)0x00000110; |
||||
|
||||
memctl->memc_mptpr = CFG_MPTPR; |
||||
|
||||
udelay(400); |
||||
|
||||
/* Initialise 60x bus SDRAM */ |
||||
memctl->memc_psrt = CFG_PSRT; |
||||
memctl->memc_or1 = CFG_SDRAM_OR; |
||||
memctl->memc_br1 = CFG_SDRAM_BR; |
||||
memctl->memc_psdmr = psdmr; |
||||
|
||||
udelay(400); |
||||
|
||||
memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; /* Precharge all banks */ |
||||
ramtmp = *ramptr1; |
||||
memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; /* CBR refresh */ |
||||
for (i = 0; i < 8; i++) { |
||||
memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; /* CBR refresh */ |
||||
} |
||||
ramtmp = *ramptr1; |
||||
memctl->memc_psdmr = psdmr | PSDMR_OP_MRW; /* Mode Register write */ |
||||
*ramptr1 = 0xFF; |
||||
memctl->memc_psdmr = psdmr | PSDMR_RFEN; /* Refresh enable */ |
||||
#endif /* !CFG_RAMBOOT */ |
||||
|
||||
/* Return total 60x bus SDRAM size */ |
||||
return msize * 1024 * 1024; |
||||
} |
||||
|
||||
int checkboard(void) |
||||
{ |
||||
vu_char *bcsr = (vu_char *)CFG_BCSR; |
||||
|
||||
puts("Board: "); |
||||
switch (bcsr[0]) { |
||||
case 0x0A: |
||||
printf("EP82xxM 1.0 CPLD revision %d\n", bcsr[1]); |
||||
break; |
||||
default: |
||||
printf("unknown: ID=%02X\n", bcsr[0]); |
||||
} |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
#ifdef CONFIG_PCI |
||||
struct pci_controller hose; |
||||
|
||||
extern void pci_mpc8250_init(struct pci_controller *); |
||||
|
||||
void pci_init_board(void) |
||||
{ |
||||
pci_mpc8250_init(&hose); |
||||
} |
||||
#endif |
||||
@ -0,0 +1,125 @@ |
||||
/* |
||||
* (C) Copyright 2001 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* Modified by Yuli Barcohen <yuli@arabellasw.com> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
OUTPUT_ARCH(powerpc) |
||||
SECTIONS |
||||
{ |
||||
/* Read-only sections, merged into text segment: */ |
||||
. = + SIZEOF_HEADERS; |
||||
.interp : { *(.interp) } |
||||
.hash : { *(.hash) } |
||||
.dynsym : { *(.dynsym) } |
||||
.dynstr : { *(.dynstr) } |
||||
.rel.text : { *(.rel.text) } |
||||
.rela.text : { *(.rela.text) } |
||||
.rel.data : { *(.rel.data) } |
||||
.rela.data : { *(.rela.data) } |
||||
.rel.rodata : { *(.rel.rodata) } |
||||
.rela.rodata : { *(.rela.rodata) } |
||||
.rel.got : { *(.rel.got) } |
||||
.rela.got : { *(.rela.got) } |
||||
.rel.ctors : { *(.rel.ctors) } |
||||
.rela.ctors : { *(.rela.ctors) } |
||||
.rel.dtors : { *(.rel.dtors) } |
||||
.rela.dtors : { *(.rela.dtors) } |
||||
.rel.bss : { *(.rel.bss) } |
||||
.rela.bss : { *(.rela.bss) } |
||||
.rel.plt : { *(.rel.plt) } |
||||
.rela.plt : { *(.rela.plt) } |
||||
.init : { *(.init) } |
||||
.plt : { *(.plt) } |
||||
.text : |
||||
{ |
||||
cpu/mpc8260/start.o (.text) |
||||
*(.text) |
||||
*(.fixup) |
||||
*(.got1) |
||||
. = ALIGN(16); |
||||
*(.rodata) |
||||
*(.rodata1) |
||||
*(.rodata.str1.4) |
||||
*(.eh_frame) |
||||
} |
||||
.fini : { *(.fini) } =0 |
||||
.ctors : { *(.ctors) } |
||||
.dtors : { *(.dtors) } |
||||
|
||||
/* Read-write section, merged into data segment: */ |
||||
. = (. + 0x0FFF) & 0xFFFFF000; |
||||
_erotext = .; |
||||
PROVIDE (erotext = .); |
||||
.reloc : |
||||
{ |
||||
*(.got) |
||||
_GOT2_TABLE_ = .; |
||||
*(.got2) |
||||
_FIXUP_TABLE_ = .; |
||||
*(.fixup) |
||||
} |
||||
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; |
||||
__fixup_entries = (. - _FIXUP_TABLE_) >> 2; |
||||
|
||||
.data : |
||||
{ |
||||
*(.data) |
||||
*(.data1) |
||||
*(.sdata) |
||||
*(.sdata2) |
||||
*(.dynamic) |
||||
CONSTRUCTORS |
||||
} |
||||
_edata = .; |
||||
PROVIDE (edata = .); |
||||
|
||||
. = .; |
||||
__u_boot_cmd_start = .; |
||||
.u_boot_cmd : { *(.u_boot_cmd) } |
||||
__u_boot_cmd_end = .; |
||||
|
||||
|
||||
. = .; |
||||
__start___ex_table = .; |
||||
__ex_table : { *(__ex_table) } |
||||
__stop___ex_table = .; |
||||
|
||||
. = ALIGN(4096); |
||||
__init_begin = .; |
||||
.text.init : { *(.text.init) } |
||||
.data.init : { *(.data.init) } |
||||
. = ALIGN(4096); |
||||
__init_end = .; |
||||
|
||||
__bss_start = .; |
||||
.bss : |
||||
{ |
||||
*(.sbss) *(.scommon) |
||||
*(.dynbss) |
||||
*(.bss) |
||||
*(COMMON) |
||||
} |
||||
_end = . ; |
||||
PROVIDE (end = .); |
||||
} |
||||
ENTRY(_start) |
||||
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Reference in new issue