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sh3: remove unused cache.c file from being built

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The change is similar to commit 994b56616b ("sh: delete an unused
source file") for SH2, however here the removed cache.c file was
built and included into an image as a dead code.

If it is needed in future the contents can be reused from a similar
arch/sh/cpu/sh4/cache.c file, which is in turn will be moved to
a shared among all core flavours location at arch/sh/lib/cache.c.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
master
Vladimir Zapolskiy 8 years ago committed by Tom Rini
parent 0f62bf633f
commit dad2b3005e
2 changed files with 1 additions and 97 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 2
      arch/sh/cpu/sh3/Makefile
  2. 96
      arch/sh/cpu/sh3/cache.c

2
arch/sh/cpu/sh3/Makefile
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@ -12,4 +12,4 @@
#
extra-y = start.o
obj-y = cpu.o interrupts.o watchdog.o cache.o
obj-y = cpu.o interrupts.o watchdog.o

96
arch/sh/cpu/sh3/cache.c
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@ -1,96 +0,0 @@
/*
* (C) Copyright 2007
* Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
*
* (C) Copyright 2007
* Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <command.h>
#include <asm/processor.h>
#include <asm/io.h>
/*
* Jump to P2 area.
* When handling TLB or caches, we need to do it from P2 area.
*/
#define jump_to_P2() \
do { \
unsigned long __dummy; \
__asm__ __volatile__( \
"mov.l 1f, %0\n\t" \
"or %1, %0\n\t" \
"jmp @%0\n\t" \
" nop\n\t" \
".balign 4\n" \
"1: .long 2f\n" \
"2:" \
: "=&r" (__dummy) \
: "r" (0x20000000)); \
} while (0)
/*
* Back to P1 area.
*/
#define back_to_P1() \
do { \
unsigned long __dummy; \
__asm__ __volatile__( \
"nop;nop;nop;nop;nop;nop;nop\n\t" \
"mov.l 1f, %0\n\t" \
"jmp @%0\n\t" \
" nop\n\t" \
".balign 4\n" \
"1: .long 2f\n" \
"2:" \
: "=&r" (__dummy)); \
} while (0)
#define CACHE_VALID 1
#define CACHE_UPDATED 2
static inline void cache_wback_all(void)
{
unsigned long addr, data, i, j;
jump_to_P2();
for (i = 0; i < CACHE_OC_NUM_ENTRIES; i++) {
for (j = 0; j < CACHE_OC_NUM_WAYS; j++) {
addr = CACHE_OC_ADDRESS_ARRAY
| (j << CACHE_OC_WAY_SHIFT)
| (i << CACHE_OC_ENTRY_SHIFT);
data = inl(addr);
if (data & CACHE_UPDATED) {
data &= ~CACHE_UPDATED;
outl(data, addr);
}
}
}
back_to_P1();
}
#define CACHE_ENABLE 0
#define CACHE_DISABLE 1
int cache_control(unsigned int cmd)
{
unsigned long ccr;
jump_to_P2();
ccr = inl(CCR);
if (ccr & CCR_CACHE_ENABLE)
cache_wback_all();
if (cmd == CACHE_DISABLE)
outl(CCR_CACHE_STOP, CCR);
else
outl(CCR_CACHE_INIT, CCR);
back_to_P1();
return 0;
}
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