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@ -8,6 +8,7 @@ |
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#include <common.h> |
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#include <dm.h> |
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#include <mmc.h> |
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#include <reset-uclass.h> |
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#include <sdhci.h> |
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#include <asm/arch/sdhci.h> |
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@ -16,15 +17,10 @@ DECLARE_GLOBAL_DATA_PTR; |
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struct sti_sdhci_plat { |
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struct mmc_config cfg; |
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struct mmc mmc; |
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struct reset_ctl reset; |
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int instance; |
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}; |
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/*
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* used to get access to MMC1 reset, |
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* will be removed when STi reset driver will be available |
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*/ |
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#define STIH410_SYSCONF5_BASE 0x092b0000 |
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/**
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* sti_mmc_core_config: configure the Arasan HC |
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* @dev : udevice |
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@ -37,17 +33,19 @@ struct sti_sdhci_plat { |
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* W/o these settings the SDHCI could configure and use the embedded controller |
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* with limited features. |
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*/ |
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static void sti_mmc_core_config(struct udevice *dev) |
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static int sti_mmc_core_config(struct udevice *dev) |
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{ |
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struct sti_sdhci_plat *plat = dev_get_platdata(dev); |
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struct sdhci_host *host = dev_get_priv(dev); |
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unsigned long *sysconf; |
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int ret; |
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/* only MMC1 has a reset line */ |
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if (plat->instance) { |
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sysconf = (unsigned long *)(STIH410_SYSCONF5_BASE + |
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ST_MMC_CCONFIG_REG_5); |
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generic_set_bit(SYSCONF_MMC1_ENABLE_BIT, sysconf); |
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ret = reset_deassert(&plat->reset); |
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if (ret < 0) { |
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error("MMC1 deassert failed: %d", ret); |
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return ret; |
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} |
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} |
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writel(STI_FLASHSS_MMC_CORE_CONFIG_1, |
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@ -66,6 +64,8 @@ static void sti_mmc_core_config(struct udevice *dev) |
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} |
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writel(STI_FLASHSS_MMC_CORE_CONFIG4, |
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host->ioaddr + FLASHSS_MMC_CORE_CONFIG_4); |
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return 0; |
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} |
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static int sti_sdhci_probe(struct udevice *dev) |
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@ -80,13 +80,18 @@ static int sti_sdhci_probe(struct udevice *dev) |
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* MMC0 is wired to the SD slot, |
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* MMC1 is wired on the high speed connector |
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*/ |
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if (fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "resets", NULL)) |
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ret = reset_get_by_index(dev, 0, &plat->reset); |
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if (!ret) |
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plat->instance = 1; |
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else |
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plat->instance = 0; |
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if (ret == -ENOENT) |
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plat->instance = 0; |
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else |
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return ret; |
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sti_mmc_core_config(dev); |
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ret = sti_mmc_core_config(dev); |
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if (ret) |
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return ret; |
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host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD | |
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SDHCI_QUIRK_32BIT_DMA_ADDR | |
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