The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Cadence. This is the first part of the basic architecture port with changes to common files. The 'arch/xtensa' directory, and boards and additional drivers will be in separate commits. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>master
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U-Boot for the Xtensa Architecture |
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================================== |
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Xtensa Architecture and Diamond Cores |
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------------------------------------- |
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Xtensa is a configurable processor architecture from Tensilica, Inc. |
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Diamond Cores are pre-configured instances available for license and |
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SoC cores in the same manner as ARM, MIPS, etc. |
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Xtensa licensees create their own Xtensa cores with selected features |
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and custom instructions, registers and co-processors. The custom core |
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is configured with Tensilica tools and built with Tensilica's Xtensa |
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Processor Generator. |
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There are an effectively infinite number of CPUs in the Xtensa |
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architecture family. It is, however, not feasible to support individual |
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Xtensa CPUs in U-Boot. Therefore, there is only a single 'xtensa' CPU |
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in the cpu tree of U-Boot. |
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In the same manner as the Linux port to Xtensa, U-Boot adapts to an |
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individual Xtensa core configuration using a set of macros provided with |
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the particular core. This is part of what is known as the hardware |
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abstraction layer (HAL). For the purpose of U-Boot, the HAL consists only |
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of a few header files. These provide CPP macros that customize sources, |
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Makefiles, and the linker script. |
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Adding support for an additional processor configuration |
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-------------------------------------------------------- |
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The header files for one particular processor configuration are inside |
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a variant-specific directory located in the arch/xtensa/include/asm |
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directory. The name of that directory starts with 'arch-' followed by |
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the name for the processor configuration, for example, arch-dc233c for |
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the Diamond DC233 processor. |
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core.h Definitions for the core itself. |
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The following files are part of the overlay but not used by U-Boot. |
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tie.h Co-processors and custom extensions defined |
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in the Tensilica Instruction Extension (TIE) |
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language. |
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tie-asm.h Assembly macros to access custom-defined registers |
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and states. |
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Global Data Pointer, Exported Function Stubs, and the ABI |
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--------------------------------------------------------- |
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To support standalone applications launched with the "go" command, |
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U-Boot provides a jump table of entrypoints to exported functions |
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(grep for EXPORT_FUNC). The implementation for Xtensa depends on |
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which ABI (or function calling convention) is used. |
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Windowed ABI presents unique difficulties with the approach based on |
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keeping global data pointer in dedicated register. Because the register |
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window rotates during a call, there is no register that is constantly |
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available for the gd pointer. Therefore, on xtensa gd is a simple |
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global variable. Another difficulty arises from the requirement to have |
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an 'entry' at the beginning of a function, which rotates the register |
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file and reserves a stack frame. This is an integral part of the |
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windowed ABI implemented in hardware. It makes using a jump table to an |
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arbitrary (separately compiled) function a bit tricky. Use of a simple |
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wrapper is also very tedious due to the need to move all possible |
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register arguments and adjust the stack to handle arguments that cannot |
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be passed in registers. The most efficient approach is to have the jump |
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table perform the 'entry' so as to pretend it's the start of the real |
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function. This requires decoding the target function's 'entry' |
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instruction to determine the stack frame size, and adjusting the stack |
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pointer accordingly, then jumping into the target function just after |
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the 'entry'. Decoding depends on the processor's endianness so uses the |
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HAL. The implementation (12 instructions) is in examples/stubs.c. |
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Access to Invalid Memory Addresses |
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---------------------------------- |
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U-Boot does not check if memory addresses given as arguments to commands |
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such as "md" are valid. There are two possible types of invalid |
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addresses: an area of physical address space may not be mapped to RAM |
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or peripherals, or in the presence of MMU an area of virtual address |
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space may not be mapped to physical addresses. |
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Accessing first type of invalid addresses may result in hardware lockup, |
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reading of meaningless data, written data being ignored or an exception, |
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depending on the CPU wiring to the system. Accessing second type of |
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invalid addresses always ends with an exception. |
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U-Boot for Xtensa provides a special memory exception handler that |
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reports such access attempts and resets the board. |
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------------------------------------------------------------------------------ |
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Chris Zankel |
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Ross Morley |
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