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@ -227,12 +227,19 @@ |
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#define CFG_LBLAWBAR0_PRELIM CFG_FLASH_BASE /* Window base at flash base */ |
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#define CFG_LBLAWAR0_PRELIM 0x80000018 /* 32MB window size */ |
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#define CFG_BR0_PRELIM (CFG_FLASH_BASE | /* Flash Base address */ \ |
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(2 << BR_PS_SHIFT) | /* 16 bit port size */ \
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BR_V) /* valid */ |
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#define CFG_OR0_PRELIM ((~(CFG_FLASH_SIZE - 1) << 20) | OR_UPM_XAM | \ |
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OR_GPCM_CSNT | OR_GPCM_ACS_0b11 | OR_GPCM_XACS | OR_GPCM_SCY_15 | \
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OR_GPCM_TRLX | OR_GPCM_EHTR | OR_GPCM_EAD) |
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#define CFG_BR0_PRELIM ( CFG_FLASH_BASE /* Flash Base address */ \ |
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| (2 << BR_PS_SHIFT) /* 16 bit port size */ \
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| BR_V ) /* valid */ |
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#define CFG_OR0_PRELIM ( (~(CFG_FLASH_SIZE - 1) << 20) \ |
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| OR_UPM_XAM \
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| OR_GPCM_CSNT \
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| OR_GPCM_ACS_0b11 \
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| OR_GPCM_XACS \
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| OR_GPCM_SCY_15 \
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| OR_GPCM_TRLX \
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| OR_GPCM_EHTR \
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| OR_GPCM_EAD ) |
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/* 0xFE000FF7 */ |
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#define CFG_MAX_FLASH_BANKS 1 /* number of banks */ |
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#define CFG_MAX_FLASH_SECT 256 /* max sectors per device */ |
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