arm: zynq: Fix indentation for zynq-cse targets

Trivial DT style fixes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years ago · df09969070
parent 7996fcca9d
commit df09969070
2 changed files with 1 additions and 3 deletions
--- a/arch/arm/dts/zynq-cse-nand.dts
+++ b/arch/arm/dts/zynq-cse-nand.dts
@ -38,7 +38,7 @@
 		#size-cells = <1>;
 		ranges;

-			slcr: slcr@f8000000 {
+		slcr: slcr@f8000000 {
 			u-boot,dm-pre-reloc;
 			#address-cells = <1>;
 			#size-cells = <1>;
@ -72,7 +72,6 @@
 			};
 		};
 	};
-
 };

 &dcc {
--- a/arch/arm/dts/zynq-cse-nor.dts
+++ b/arch/arm/dts/zynq-cse-nor.dts
@ -79,7 +79,6 @@
 			};
 		};
 	};
-
 };

 &dcc {