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@ -59,17 +59,6 @@ |
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#define CONFIG_USART_BASE ATMEL_BASE_DBGU |
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#define CONFIG_USART_ID ATMEL_ID_SYS |
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/*
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* This needs to be defined for the OHCI code to work but it is defined as |
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* ATMEL_ID_UHPHS in the CPU specific header files. |
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*/ |
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#define ATMEL_ID_UHP ATMEL_ID_UHPHS |
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/*
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* Specify the clock enable bit in the PMC_SCER register. |
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*/ |
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#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP |
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/* LCD */ |
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#define CONFIG_LCD |
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#define LCD_BPP LCD_COLOR8 |
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@ -147,13 +136,10 @@ |
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#define CONFIG_RESET_PHY_R |
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/* USB */ |
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#define CONFIG_USB_ATMEL |
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#define CONFIG_USB_OHCI_NEW |
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#define CONFIG_USB_EHCI |
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#define CONFIG_USB_EHCI_ATMEL |
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2 |
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#define CONFIG_DOS_PARTITION |
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#define CONFIG_SYS_USB_OHCI_CPU_INIT |
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#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_HCI |
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g45" |
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 |
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#define CONFIG_USB_STORAGE |
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#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
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