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@ -25,9 +25,6 @@ |
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#include <asm/arch/i2c.h> |
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#include <asm/io.h> |
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#define inw(a) __raw_readw(a) |
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#define outw(a,v) __raw_writew(a,v) |
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static void wait_for_bb (void); |
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static u16 wait_for_pin (void); |
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static void flush_fifo(void); |
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@ -36,32 +33,32 @@ void i2c_init (int speed, int slaveadd) |
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{ |
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u16 scl; |
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outw(0x2, I2C_SYSC); /* for ES2 after soft reset */ |
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writew(0x2, I2C_SYSC); /* for ES2 after soft reset */ |
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udelay(1000); |
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outw(0x0, I2C_SYSC); /* will probably self clear but */ |
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writew(0x0, I2C_SYSC); /* will probably self clear but */ |
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if (inw (I2C_CON) & I2C_CON_EN) { |
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outw (0, I2C_CON); |
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if (readw (I2C_CON) & I2C_CON_EN) { |
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writew (0, I2C_CON); |
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udelay (50000); |
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} |
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/* 12MHz I2C module clock */ |
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outw (0, I2C_PSC); |
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writew (0, I2C_PSC); |
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speed = speed/1000; /* 100 or 400 */ |
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scl = ((12000/(speed*2)) - 7); /* use 7 when PSC = 0 */ |
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outw (scl, I2C_SCLL); |
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outw (scl, I2C_SCLH); |
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writew (scl, I2C_SCLL); |
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writew (scl, I2C_SCLH); |
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/* own address */ |
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outw (slaveadd, I2C_OA); |
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outw (I2C_CON_EN, I2C_CON); |
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writew (slaveadd, I2C_OA); |
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writew (I2C_CON_EN, I2C_CON); |
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/* have to enable intrrupts or OMAP i2c module doesn't work */ |
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outw (I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE | |
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I2C_IE_NACK_IE | I2C_IE_AL_IE, I2C_IE); |
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writew (I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE | |
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I2C_IE_NACK_IE | I2C_IE_AL_IE, I2C_IE); |
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udelay (1000); |
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flush_fifo(); |
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outw (0xFFFF, I2C_STAT); |
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outw (0, I2C_CNT); |
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writew (0xFFFF, I2C_STAT); |
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writew (0, I2C_CNT); |
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} |
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static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) |
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@ -73,19 +70,19 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) |
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wait_for_bb (); |
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/* one byte only */ |
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outw (1, I2C_CNT); |
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writew (1, I2C_CNT); |
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/* set slave address */ |
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outw (devaddr, I2C_SA); |
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writew (devaddr, I2C_SA); |
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/* no stop bit needed here */ |
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outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX, I2C_CON); |
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writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX, I2C_CON); |
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status = wait_for_pin (); |
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if (status & I2C_STAT_XRDY) { |
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/* Important: have to use byte access */ |
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*(volatile u8 *) (I2C_DATA) = regoffset; |
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writeb (regoffset, I2C_DATA); |
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udelay (20000); |
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if (inw (I2C_STAT) & I2C_STAT_NACK) { |
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if (readw (I2C_STAT) & I2C_STAT_NACK) { |
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i2c_error = 1; |
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} |
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} else { |
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@ -94,42 +91,42 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) |
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if (!i2c_error) { |
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/* free bus, otherwise we can't use a combined transction */ |
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outw (0, I2C_CON); |
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while (inw (I2C_STAT) || (inw (I2C_CON) & I2C_CON_MST)) { |
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writew (0, I2C_CON); |
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while (readw (I2C_STAT) || (readw (I2C_CON) & I2C_CON_MST)) { |
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udelay (10000); |
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/* Have to clear pending interrupt to clear I2C_STAT */ |
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outw (0xFFFF, I2C_STAT); |
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writew (0xFFFF, I2C_STAT); |
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} |
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wait_for_bb (); |
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/* set slave address */ |
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outw (devaddr, I2C_SA); |
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writew (devaddr, I2C_SA); |
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/* read one byte from slave */ |
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outw (1, I2C_CNT); |
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writew (1, I2C_CNT); |
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/* need stop bit here */ |
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outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, |
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I2C_CON); |
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writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, |
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I2C_CON); |
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status = wait_for_pin (); |
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if (status & I2C_STAT_RRDY) { |
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*value = inw (I2C_DATA); |
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*value = readw (I2C_DATA); |
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udelay (20000); |
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} else { |
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i2c_error = 1; |
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} |
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if (!i2c_error) { |
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outw (I2C_CON_EN, I2C_CON); |
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while (inw (I2C_STAT) |
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|| (inw (I2C_CON) & I2C_CON_MST)) { |
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writew (I2C_CON_EN, I2C_CON); |
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while (readw (I2C_STAT) |
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|| (readw (I2C_CON) & I2C_CON_MST)) { |
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udelay (10000); |
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outw (0xFFFF, I2C_STAT); |
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writew (0xFFFF, I2C_STAT); |
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} |
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} |
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} |
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flush_fifo(); |
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outw (0xFFFF, I2C_STAT); |
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outw (0, I2C_CNT); |
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writew (0xFFFF, I2C_STAT); |
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writew (0, I2C_CNT); |
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return i2c_error; |
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} |
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@ -142,22 +139,22 @@ static int i2c_write_byte (u8 devaddr, u8 regoffset, u8 value) |
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wait_for_bb (); |
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/* two bytes */ |
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outw (2, I2C_CNT); |
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writew (2, I2C_CNT); |
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/* set slave address */ |
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outw (devaddr, I2C_SA); |
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writew (devaddr, I2C_SA); |
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/* stop bit needed here */ |
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outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX | |
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I2C_CON_STP, I2C_CON); |
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writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX | |
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I2C_CON_STP, I2C_CON); |
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/* wait until state change */ |
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status = wait_for_pin (); |
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if (status & I2C_STAT_XRDY) { |
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/* send out two bytes */ |
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outw ((value << 8) + regoffset, I2C_DATA); |
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writew ((value << 8) + regoffset, I2C_DATA); |
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/* must have enough delay to allow BB bit to go low */ |
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udelay (50000); |
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if (inw (I2C_STAT) & I2C_STAT_NACK) { |
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if (readw (I2C_STAT) & I2C_STAT_NACK) { |
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i2c_error = 1; |
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} |
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} else { |
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@ -167,18 +164,18 @@ static int i2c_write_byte (u8 devaddr, u8 regoffset, u8 value) |
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if (!i2c_error) { |
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int eout = 200; |
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outw (I2C_CON_EN, I2C_CON); |
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while ((stat = inw (I2C_STAT)) || (inw (I2C_CON) & I2C_CON_MST)) { |
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writew (I2C_CON_EN, I2C_CON); |
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while ((stat = readw (I2C_STAT)) || (readw (I2C_CON) & I2C_CON_MST)) { |
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udelay (1000); |
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/* have to read to clear intrrupt */ |
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outw (0xFFFF, I2C_STAT); |
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writew (0xFFFF, I2C_STAT); |
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if(--eout == 0) /* better leave with error than hang */ |
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break; |
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} |
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} |
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flush_fifo(); |
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outw (0xFFFF, I2C_STAT); |
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outw (0, I2C_CNT); |
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writew (0xFFFF, I2C_STAT); |
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writew (0, I2C_CNT); |
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return i2c_error; |
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} |
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@ -189,10 +186,10 @@ static void flush_fifo(void) |
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* you get a bus error |
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*/ |
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while(1){ |
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stat = inw(I2C_STAT); |
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stat = readw(I2C_STAT); |
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if(stat == I2C_STAT_RRDY){ |
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inw(I2C_DATA); |
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outw(I2C_STAT_RRDY,I2C_STAT); |
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readw(I2C_DATA); |
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writew(I2C_STAT_RRDY,I2C_STAT); |
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udelay(1000); |
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}else |
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break; |
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@ -203,7 +200,7 @@ int i2c_probe (uchar chip) |
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{ |
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int res = 1; /* default = fail */ |
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if (chip == inw (I2C_OA)) { |
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if (chip == readw (I2C_OA)) { |
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return res; |
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} |
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@ -211,27 +208,27 @@ int i2c_probe (uchar chip) |
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wait_for_bb (); |
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/* try to read one byte */ |
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outw (1, I2C_CNT); |
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writew (1, I2C_CNT); |
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/* set slave address */ |
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outw (chip, I2C_SA); |
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writew (chip, I2C_SA); |
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/* stop bit needed here */ |
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outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, I2C_CON); |
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writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, I2C_CON); |
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/* enough delay for the NACK bit set */ |
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udelay (50000); |
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if (!(inw (I2C_STAT) & I2C_STAT_NACK)) { |
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if (!(readw (I2C_STAT) & I2C_STAT_NACK)) { |
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res = 0; /* success case */ |
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flush_fifo(); |
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outw(0xFFFF, I2C_STAT); |
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writew(0xFFFF, I2C_STAT); |
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} else { |
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outw(0xFFFF, I2C_STAT); /* failue, clear sources*/ |
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outw (inw (I2C_CON) | I2C_CON_STP, I2C_CON); /* finish up xfer */ |
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writew(0xFFFF, I2C_STAT); /* failue, clear sources*/ |
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writew (readw (I2C_CON) | I2C_CON_STP, I2C_CON); /* finish up xfer */ |
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udelay(20000); |
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wait_for_bb (); |
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} |
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flush_fifo(); |
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outw (0, I2C_CNT); /* don't allow any more data in...we don't want it.*/ |
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outw(0xFFFF, I2C_STAT); |
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writew (0, I2C_CNT); /* don't allow any more data in...we don't want it.*/ |
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writew(0xFFFF, I2C_STAT); |
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return res; |
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} |
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@ -290,17 +287,17 @@ static void wait_for_bb (void) |
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int timeout = 10; |
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u16 stat; |
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outw(0xFFFF, I2C_STAT); /* clear current interruts...*/ |
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while ((stat = inw (I2C_STAT) & I2C_STAT_BB) && timeout--) { |
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outw (stat, I2C_STAT); |
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writew(0xFFFF, I2C_STAT); /* clear current interruts...*/ |
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while ((stat = readw (I2C_STAT) & I2C_STAT_BB) && timeout--) { |
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writew (stat, I2C_STAT); |
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udelay (50000); |
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} |
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if (timeout <= 0) { |
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printf ("timed out in wait_for_bb: I2C_STAT=%x\n", |
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inw (I2C_STAT)); |
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readw (I2C_STAT)); |
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} |
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outw(0xFFFF, I2C_STAT); /* clear delayed stuff*/ |
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writew(0xFFFF, I2C_STAT); /* clear delayed stuff*/ |
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} |
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static u16 wait_for_pin (void) |
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@ -310,7 +307,7 @@ static u16 wait_for_pin (void) |
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do { |
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udelay (1000); |
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status = inw (I2C_STAT); |
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status = readw (I2C_STAT); |
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} while ( !(status & |
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(I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY | |
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I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK | |
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@ -318,8 +315,8 @@ static u16 wait_for_pin (void) |
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if (timeout <= 0) { |
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printf ("timed out in wait_for_pin: I2C_STAT=%x\n", |
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inw (I2C_STAT)); |
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outw(0xFFFF, I2C_STAT); |
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readw (I2C_STAT)); |
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writew(0xFFFF, I2C_STAT); |
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} |
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return status; |
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} |
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