Now that mx6sabresd_spl_defconfig can be used to boot all mx6sabresd variants, the non-SPL targets can be safely removed. Signed-off-by: Fabio Estevam <fabio.estvam@nxp.com>master
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b22841e582
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e2bab4b9ea
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/* |
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* Copyright (C) 2014 Freescale Semiconductor, Inc. |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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* |
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* Refer doc/README.imximage for more details about how-to configure |
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* and create imximage boot image |
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* |
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* The syntax is taken as close as possible with the kwbimage |
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*/ |
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|
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/* image version */ |
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|
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IMAGE_VERSION 2 |
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|
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/* |
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* Boot Device : one of |
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* spi, sd (the board has no nand neither onenand) |
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*/ |
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|
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BOOT_FROM sd |
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|
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/* |
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* Device Configuration Data (DCD) |
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* |
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* Each entry must have the format: |
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* Addr-type Address Value |
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* |
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* where: |
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* Addr-type register length (1,2 or 4 bytes) |
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* Address absolute address of the register |
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* value value to be stored in the register |
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*/ |
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DATA 4 0x020e0774 0x000C0000 |
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DATA 4 0x020e0754 0x00000000 |
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DATA 4 0x020e04ac 0x00000030 |
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DATA 4 0x020e04b0 0x00000030 |
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DATA 4 0x020e0464 0x00000030 |
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DATA 4 0x020e0490 0x00000030 |
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DATA 4 0x020e074c 0x00000030 |
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DATA 4 0x020e0494 0x00000030 |
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DATA 4 0x020e04a0 0x00000000 |
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DATA 4 0x020e04b4 0x00000030 |
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DATA 4 0x020e04b8 0x00000030 |
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DATA 4 0x020e076c 0x00000030 |
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DATA 4 0x020e0750 0x00020000 |
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DATA 4 0x020e04bc 0x00000030 |
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DATA 4 0x020e04c0 0x00000030 |
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DATA 4 0x020e04c4 0x00000030 |
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DATA 4 0x020e04c8 0x00000030 |
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DATA 4 0x020e04cc 0x00000030 |
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DATA 4 0x020e04d0 0x00000030 |
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DATA 4 0x020e04d4 0x00000030 |
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DATA 4 0x020e04d8 0x00000030 |
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DATA 4 0x020e0760 0x00020000 |
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DATA 4 0x020e0764 0x00000030 |
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DATA 4 0x020e0770 0x00000030 |
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DATA 4 0x020e0778 0x00000030 |
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DATA 4 0x020e077c 0x00000030 |
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DATA 4 0x020e0780 0x00000030 |
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DATA 4 0x020e0784 0x00000030 |
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DATA 4 0x020e078c 0x00000030 |
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DATA 4 0x020e0748 0x00000030 |
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DATA 4 0x020e0470 0x00000030 |
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DATA 4 0x020e0474 0x00000030 |
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DATA 4 0x020e0478 0x00000030 |
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DATA 4 0x020e047c 0x00000030 |
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DATA 4 0x020e0480 0x00000030 |
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DATA 4 0x020e0484 0x00000030 |
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DATA 4 0x020e0488 0x00000030 |
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DATA 4 0x020e048c 0x00000030 |
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DATA 4 0x021b0800 0xa1390003 |
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DATA 4 0x021b080c 0x001F001F |
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DATA 4 0x021b0810 0x001F001F |
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DATA 4 0x021b480c 0x001F001F |
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DATA 4 0x021b4810 0x001F001F |
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DATA 4 0x021b083c 0x4220021F |
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DATA 4 0x021b0840 0x0207017E |
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DATA 4 0x021b483c 0x4201020C |
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DATA 4 0x021b4840 0x01660172 |
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DATA 4 0x021b0848 0x4A4D4E4D |
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DATA 4 0x021b4848 0x4A4F5049 |
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DATA 4 0x021b0850 0x3F3C3D31 |
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DATA 4 0x021b4850 0x3238372B |
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DATA 4 0x021b081c 0x33333333 |
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DATA 4 0x021b0820 0x33333333 |
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DATA 4 0x021b0824 0x33333333 |
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DATA 4 0x021b0828 0x33333333 |
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DATA 4 0x021b481c 0x33333333 |
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DATA 4 0x021b4820 0x33333333 |
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DATA 4 0x021b4824 0x33333333 |
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DATA 4 0x021b4828 0x33333333 |
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DATA 4 0x021b08b8 0x00000800 |
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DATA 4 0x021b48b8 0x00000800 |
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DATA 4 0x021b0004 0x0002002D |
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DATA 4 0x021b0008 0x00333030 |
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DATA 4 0x021b000c 0x3F435313 |
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DATA 4 0x021b0010 0xB66E8B63 |
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DATA 4 0x021b0014 0x01FF00DB |
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DATA 4 0x021b0018 0x00001740 |
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DATA 4 0x021b001c 0x00008000 |
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DATA 4 0x021b002c 0x000026d2 |
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DATA 4 0x021b0030 0x00431023 |
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DATA 4 0x021b0040 0x00000027 |
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DATA 4 0x021b0000 0x831A0000 |
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DATA 4 0x021b001c 0x04008032 |
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DATA 4 0x021b001c 0x00008033 |
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DATA 4 0x021b001c 0x00048031 |
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DATA 4 0x021b001c 0x05208030 |
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DATA 4 0x021b001c 0x04008040 |
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DATA 4 0x021b0020 0x00005800 |
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DATA 4 0x021b0818 0x00011117 |
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DATA 4 0x021b4818 0x00011117 |
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DATA 4 0x021b0004 0x0002556D |
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DATA 4 0x021b0404 0x00011006 |
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DATA 4 0x021b001c 0x00000000 |
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|
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/* set the default clock gate to save power */ |
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DATA 4 0x020c4068 0x00C03F3F |
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DATA 4 0x020c406c 0x0030FC03 |
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DATA 4 0x020c4070 0x0FFFC000 |
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DATA 4 0x020c4074 0x3FF00000 |
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DATA 4 0x020c4078 0x00FFF300 |
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DATA 4 0x020c407c 0x0F0000C3 |
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DATA 4 0x020c4080 0x000003FF |
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|
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/* enable AXI cache for VDOA/VPU/IPU */ |
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DATA 4 0x020e0010 0xF00000CF |
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/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ |
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DATA 4 0x020e0018 0x007F007F |
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DATA 4 0x020e001c 0x007F007F |
@ -1,169 +0,0 @@ |
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/* |
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* Copyright (C) 2011 Freescale Semiconductor, Inc. |
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* Jason Liu <r64343@freescale.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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* |
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* Refer doc/README.imximage for more details about how-to configure |
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* and create imximage boot image |
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* |
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* The syntax is taken as close as possible with the kwbimage |
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*/ |
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|
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/* image version */ |
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IMAGE_VERSION 2 |
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/* |
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* Boot Device : one of |
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* spi, sd (the board has no nand neither onenand) |
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*/ |
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BOOT_FROM sd |
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|
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/* |
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* Device Configuration Data (DCD) |
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* |
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* Each entry must have the format: |
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* Addr-type Address Value |
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* |
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* where: |
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* Addr-type register length (1,2 or 4 bytes) |
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* Address absolute address of the register |
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* value value to be stored in the register |
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*/ |
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DATA 4 0x020e05a8 0x00000030 |
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DATA 4 0x020e05b0 0x00000030 |
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DATA 4 0x020e0524 0x00000030 |
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DATA 4 0x020e051c 0x00000030 |
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DATA 4 0x020e0518 0x00000030 |
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DATA 4 0x020e050c 0x00000030 |
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DATA 4 0x020e05b8 0x00000030 |
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DATA 4 0x020e05c0 0x00000030 |
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DATA 4 0x020e05ac 0x00020030 |
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DATA 4 0x020e05b4 0x00020030 |
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DATA 4 0x020e0528 0x00020030 |
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DATA 4 0x020e0520 0x00020030 |
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DATA 4 0x020e0514 0x00020030 |
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DATA 4 0x020e0510 0x00020030 |
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DATA 4 0x020e05bc 0x00020030 |
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DATA 4 0x020e05c4 0x00020030 |
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DATA 4 0x020e056c 0x00020030 |
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DATA 4 0x020e0578 0x00020030 |
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DATA 4 0x020e0588 0x00020030 |
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DATA 4 0x020e0594 0x00020030 |
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DATA 4 0x020e057c 0x00020030 |
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DATA 4 0x020e0590 0x00003000 |
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DATA 4 0x020e0598 0x00003000 |
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DATA 4 0x020e058c 0x00000000 |
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DATA 4 0x020e059c 0x00003030 |
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DATA 4 0x020e05a0 0x00003030 |
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DATA 4 0x020e0784 0x00000030 |
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DATA 4 0x020e0788 0x00000030 |
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DATA 4 0x020e0794 0x00000030 |
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DATA 4 0x020e079c 0x00000030 |
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DATA 4 0x020e07a0 0x00000030 |
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DATA 4 0x020e07a4 0x00000030 |
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DATA 4 0x020e07a8 0x00000030 |
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DATA 4 0x020e0748 0x00000030 |
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DATA 4 0x020e074c 0x00000030 |
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DATA 4 0x020e0750 0x00020000 |
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DATA 4 0x020e0758 0x00000000 |
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DATA 4 0x020e0774 0x00020000 |
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DATA 4 0x020e078c 0x00000030 |
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DATA 4 0x020e0798 0x000C0000 |
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DATA 4 0x021b081c 0x33333333 |
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DATA 4 0x021b0820 0x33333333 |
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DATA 4 0x021b0824 0x33333333 |
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DATA 4 0x021b0828 0x33333333 |
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DATA 4 0x021b481c 0x33333333 |
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DATA 4 0x021b4820 0x33333333 |
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DATA 4 0x021b4824 0x33333333 |
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DATA 4 0x021b4828 0x33333333 |
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DATA 4 0x021b0018 0x00081740 |
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DATA 4 0x021b001c 0x00008000 |
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DATA 4 0x021b000c 0x555A7974 |
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DATA 4 0x021b0010 0xDB538F64 |
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DATA 4 0x021b0014 0x01FF00DB |
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DATA 4 0x021b002c 0x000026D2 |
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DATA 4 0x021b0030 0x005A1023 |
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DATA 4 0x021b0008 0x09444040 |
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DATA 4 0x021b0004 0x00025576 |
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DATA 4 0x021b0040 0x00000027 |
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DATA 4 0x021b0000 0x831A0000 |
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DATA 4 0x021b001c 0x04088032 |
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DATA 4 0x021b001c 0x0408803A |
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DATA 4 0x021b001c 0x00008033 |
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DATA 4 0x021b001c 0x0000803B |
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DATA 4 0x021b001c 0x00428031 |
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DATA 4 0x021b001c 0x00428039 |
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DATA 4 0x021b001c 0x19308030 |
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DATA 4 0x021b001c 0x19308038 |
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DATA 4 0x021b001c 0x04008040 |
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DATA 4 0x021b001c 0x04008048 |
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DATA 4 0x021b0800 0xA1380003 |
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DATA 4 0x021b4800 0xA1380003 |
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DATA 4 0x021b0020 0x00005800 |
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DATA 4 0x021b0818 0x00022227 |
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DATA 4 0x021b4818 0x00022227 |
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DATA 4 0x021b083c 0x434B0350 |
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DATA 4 0x021b0840 0x034C0359 |
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DATA 4 0x021b483c 0x434B0350 |
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DATA 4 0x021b4840 0x03650348 |
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DATA 4 0x021b0848 0x4436383B |
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DATA 4 0x021b4848 0x39393341 |
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DATA 4 0x021b0850 0x35373933 |
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DATA 4 0x021b4850 0x48254A36 |
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DATA 4 0x021b080c 0x001F001F |
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DATA 4 0x021b0810 0x001F001F |
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DATA 4 0x021b480c 0x00440044 |
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DATA 4 0x021b4810 0x00440044 |
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DATA 4 0x021b08b8 0x00000800 |
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DATA 4 0x021b48b8 0x00000800 |
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DATA 4 0x021b001c 0x00000000 |
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DATA 4 0x021b0404 0x00011006 |
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/* set the default clock gate to save power */ |
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DATA 4 0x020c4068 0x00C03F3F |
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DATA 4 0x020c406c 0x0030FC03 |
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DATA 4 0x020c4070 0x0FFFC000 |
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DATA 4 0x020c4074 0x3FF00000 |
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DATA 4 0x020c4078 0x00FFF300 |
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DATA 4 0x020c407c 0x0F0000C3 |
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DATA 4 0x020c4080 0x000003FF |
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/* enable AXI cache for VDOA/VPU/IPU */ |
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DATA 4 0x020e0010 0xF00000CF |
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/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ |
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DATA 4 0x020e0018 0x007F007F |
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DATA 4 0x020e001c 0x007F007F |
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/* |
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* Setup CCM_CCOSR register as follows: |
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* |
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* cko1_en = 1 --> CKO1 enabled |
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* cko1_div = 111 --> divide by 8 |
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* cko1_sel = 1011 --> ahb_clk_root |
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* |
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* This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz |
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*/ |
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DATA 4 0x020c4060 0x000000fb |
@ -1,44 +0,0 @@ |
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CONFIG_ARM=y |
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CONFIG_ARCH_MX6=y |
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CONFIG_TARGET_MX6SABRESD=y |
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CONFIG_VIDEO=y |
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CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6dlsabresd.cfg,MX6DL" |
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CONFIG_BOOTDELAY=3 |
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# CONFIG_CONSOLE_MUX is not set |
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CONFIG_SYS_CONSOLE_IS_IN_ENV=y |
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CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y |
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CONFIG_HUSH_PARSER=y |
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CONFIG_CMD_BOOTZ=y |
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# CONFIG_CMD_IMLS is not set |
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# CONFIG_CMD_FLASH is not set |
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CONFIG_CMD_MMC=y |
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CONFIG_CMD_SF=y |
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CONFIG_CMD_I2C=y |
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CONFIG_CMD_USB=y |
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CONFIG_CMD_DFU=y |
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CONFIG_CMD_USB_MASS_STORAGE=y |
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CONFIG_CMD_GPIO=y |
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CONFIG_CMD_DHCP=y |
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CONFIG_CMD_MII=y |
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CONFIG_CMD_PING=y |
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CONFIG_CMD_CACHE=y |
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CONFIG_CMD_EXT2=y |
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CONFIG_CMD_EXT4=y |
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CONFIG_CMD_EXT4_WRITE=y |
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CONFIG_CMD_FAT=y |
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CONFIG_CMD_FS_GENERIC=y |
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CONFIG_DFU_MMC=y |
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CONFIG_DFU_SF=y |
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CONFIG_SPI_FLASH=y |
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CONFIG_SPI_FLASH_STMICRO=y |
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CONFIG_PCI=y |
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CONFIG_USB=y |
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CONFIG_USB_STORAGE=y |
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CONFIG_USB_GADGET=y |
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CONFIG_CI_UDC=y |
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CONFIG_USB_GADGET_DOWNLOAD=y |
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CONFIG_G_DNL_MANUFACTURER="FSL" |
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CONFIG_G_DNL_VENDOR_NUM=0x0525 |
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CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 |
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# CONFIG_VIDEO_SW_CURSOR is not set |
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CONFIG_OF_LIBFDT=y |
@ -1,44 +0,0 @@ |
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CONFIG_ARM=y |
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CONFIG_ARCH_MX6=y |
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CONFIG_TARGET_MX6SABRESD=y |
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CONFIG_VIDEO=y |
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CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg,MX6Q" |
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CONFIG_BOOTDELAY=3 |
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# CONFIG_CONSOLE_MUX is not set |
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CONFIG_SYS_CONSOLE_IS_IN_ENV=y |
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CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y |
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CONFIG_HUSH_PARSER=y |
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CONFIG_CMD_BOOTZ=y |
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# CONFIG_CMD_IMLS is not set |
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# CONFIG_CMD_FLASH is not set |
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CONFIG_CMD_MMC=y |
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CONFIG_CMD_SF=y |
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CONFIG_CMD_I2C=y |
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CONFIG_CMD_USB=y |
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CONFIG_CMD_DFU=y |
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CONFIG_CMD_USB_MASS_STORAGE=y |
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CONFIG_CMD_GPIO=y |
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CONFIG_CMD_DHCP=y |
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CONFIG_CMD_MII=y |
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CONFIG_CMD_PING=y |
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CONFIG_CMD_CACHE=y |
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CONFIG_CMD_EXT2=y |
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CONFIG_CMD_EXT4=y |
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CONFIG_CMD_EXT4_WRITE=y |
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CONFIG_CMD_FAT=y |
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CONFIG_CMD_FS_GENERIC=y |
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CONFIG_DFU_MMC=y |
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CONFIG_DFU_SF=y |
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CONFIG_SPI_FLASH=y |
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CONFIG_SPI_FLASH_STMICRO=y |
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CONFIG_PCI=y |
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CONFIG_USB=y |
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CONFIG_USB_STORAGE=y |
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CONFIG_USB_GADGET=y |
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CONFIG_CI_UDC=y |
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CONFIG_USB_GADGET_DOWNLOAD=y |
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CONFIG_G_DNL_MANUFACTURER="FSL" |
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CONFIG_G_DNL_VENDOR_NUM=0x0525 |
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CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 |
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# CONFIG_VIDEO_SW_CURSOR is not set |
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CONFIG_OF_LIBFDT=y |
Loading…
Reference in new issue