Wandboard is a development board that has two variants: one version based on mx6 dual lite and another one based on mx6 solo. For more details about Wandboard, please refer to: http://www.wandboard.org/ Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>master
Fabio Estevam
12 years ago
committed by
Stefano Babic
parent
209b571064
commit
e2d282a1b4
@ -0,0 +1,29 @@ |
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#
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# (C) Copyright 2013 Freescale Semiconductor, Inc.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).o
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COBJS := wandboard.o
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SRCS := $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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$(LIB): $(obj).depend $(OBJS) |
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$(call cmd_link_o_target, $(OBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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@ -0,0 +1,40 @@ |
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U-Boot for Wandboard |
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-------------------- |
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This file contains information for the port of U-Boot to the Wandboard. |
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Wandboard is a development board that has two variants: one version based |
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on mx6 dual lite and another one based on mx6 solo. |
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For more details about Wandboard, please refer to: |
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http://www.wandboard.org/ |
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Building U-boot for Wandboard |
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----------------------------- |
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To build U-Boot for the Wandboard Dual Lite version: |
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$ make wanboard_dl_config |
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$ make |
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To build U-Boot for the Wandboard Solo version: |
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$ make wanboard_solo_config |
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$ make |
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Flashing U-boot into the SD card |
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-------------------------------- |
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- After the 'make' command completes, the generated 'u-boot.imx' binary must be |
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flashed into the SD card; |
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$ sudo dd if=u-boot.imx of=/dev/mmcblk0 bs=512 seek=2; sync |
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(Note - the SD card node may vary, so adjust this as needed). |
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- Insert the SD card into the slot located in the bottom of the board (same side |
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as the mx6 processor) |
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- Connect the serial cable to the host PC |
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- Power up the board and U-boot messages will appear in the serial console. |
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@ -0,0 +1,181 @@ |
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/*
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* Copyright (C) 2013 Freescale Semiconductor, Inc. |
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* |
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* Author: Fabio Estevam <fabio.estevam@freescale.com> |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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*/ |
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#include <asm/arch/clock.h> |
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#include <asm/arch/iomux.h> |
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#include <asm/arch/imx-regs.h> |
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#include <asm/arch/mx6-pins.h> |
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#include <asm/arch/sys_proto.h> |
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#include <asm/gpio.h> |
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#include <asm/imx-common/iomux-v3.h> |
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#include <asm/io.h> |
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#include <asm/sizes.h> |
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#include <common.h> |
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#include <fsl_esdhc.h> |
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#include <mmc.h> |
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#include <miiphy.h> |
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#include <netdev.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ |
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PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
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#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ |
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PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \
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PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
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#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ |
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PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_HYS) |
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#define ETH_PHY_RESET IMX_GPIO_NR(3, 29) |
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int dram_init(void) |
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{ |
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gd->ram_size = CONFIG_DDR_MB * SZ_1M; |
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return 0; |
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} |
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static iomux_v3_cfg_t const uart1_pads[] = { |
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MX6_PAD_CSI0_DAT10__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL), |
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MX6_PAD_CSI0_DAT11__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), |
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}; |
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static iomux_v3_cfg_t const usdhc3_pads[] = { |
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MX6_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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}; |
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static iomux_v3_cfg_t const enet_pads[] = { |
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MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), |
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MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), |
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MX6_PAD_RGMII_TXC__ENET_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), |
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MX6_PAD_RGMII_TD0__ENET_RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
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MX6_PAD_RGMII_TD1__ENET_RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
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MX6_PAD_RGMII_TD2__ENET_RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
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MX6_PAD_RGMII_TD3__ENET_RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
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MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), |
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MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), |
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MX6_PAD_RGMII_RXC__ENET_RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), |
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MX6_PAD_RGMII_RD0__ENET_RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
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MX6_PAD_RGMII_RD1__ENET_RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
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MX6_PAD_RGMII_RD2__ENET_RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
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MX6_PAD_RGMII_RD3__ENET_RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
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MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), |
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/* AR8031 PHY Reset */ |
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MX6_PAD_EIM_D29__GPIO_3_29 | MUX_PAD_CTRL(NO_PAD_CTRL), |
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}; |
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static void setup_iomux_uart(void) |
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{ |
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imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); |
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} |
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static void setup_iomux_enet(void) |
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{ |
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imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); |
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/* Reset AR8031 PHY */ |
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gpio_direction_output(ETH_PHY_RESET, 0); |
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udelay(500); |
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gpio_set_value(ETH_PHY_RESET, 1); |
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} |
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static struct fsl_esdhc_cfg usdhc_cfg[1] = { |
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{USDHC3_BASE_ADDR}, |
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}; |
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int board_mmc_init(bd_t *bis) |
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{ |
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imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); |
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usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); |
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return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); |
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} |
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static int mx6_rgmii_rework(struct phy_device *phydev) |
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{ |
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unsigned short val; |
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/* To enable AR8031 ouput a 125MHz clk from CLK_25M */ |
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phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); |
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phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); |
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phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); |
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val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); |
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val &= 0xffe3; |
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val |= 0x18; |
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phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); |
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/* introduce tx clock delay */ |
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); |
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val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); |
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val |= 0x0100; |
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); |
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return 0; |
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} |
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int board_phy_config(struct phy_device *phydev) |
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{ |
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mx6_rgmii_rework(phydev); |
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if (phydev->drv->config) |
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phydev->drv->config(phydev); |
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return 0; |
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} |
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int board_eth_init(bd_t *bis) |
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{ |
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int ret; |
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setup_iomux_enet(); |
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ret = cpu_eth_init(bis); |
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if (ret) |
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printf("FEC MXC: %s:failed\n", __func__); |
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return 0; |
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} |
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int board_early_init_f(void) |
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{ |
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setup_iomux_uart(); |
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return 0; |
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} |
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int board_init(void) |
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{ |
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/* address of boot parameters */ |
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; |
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return 0; |
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} |
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u32 get_board_rev(void) |
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{ |
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return get_cpu_rev(); |
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} |
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int checkboard(void) |
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{ |
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puts("Board: Wandboard\n"); |
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return 0; |
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} |
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@ -0,0 +1,211 @@ |
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/*
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* Copyright (C) 2013 Freescale Semiconductor, Inc. |
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* |
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* Configuration settings for the Wandboard. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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*/ |
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#ifndef __CONFIG_H |
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#define __CONFIG_H |
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#include <asm/arch/imx-regs.h> |
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#include <asm/imx-common/gpio.h> |
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#include <asm/sizes.h> |
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#define CONFIG_MX6 |
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#define CONFIG_DISPLAY_CPUINFO |
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#define CONFIG_DISPLAY_BOARDINFO |
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#define MACH_TYPE_WANDBOARD 4412 |
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#define CONFIG_MACH_TYPE MACH_TYPE_WANDBOARD |
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#define CONFIG_CMDLINE_TAG |
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#define CONFIG_SETUP_MEMORY_TAGS |
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#define CONFIG_INITRD_TAG |
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#define CONFIG_REVISION_TAG |
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/* Size of malloc() pool */ |
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#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) |
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#define CONFIG_BOARD_EARLY_INIT_F |
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#define CONFIG_MXC_GPIO |
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#define CONFIG_MXC_UART |
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#define CONFIG_MXC_UART_BASE UART1_BASE |
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/* allow to overwrite serial and ethaddr */ |
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#define CONFIG_ENV_OVERWRITE |
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#define CONFIG_CONS_INDEX 1 |
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#define CONFIG_BAUDRATE 115200 |
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/* Command definition */ |
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#include <config_cmd_default.h> |
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#undef CONFIG_CMD_IMLS |
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#define CONFIG_BOOTDELAY 5 |
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#define CONFIG_SYS_MEMTEST_START 0x10000000 |
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) |
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#define CONFIG_LOADADDR 0x12000000 |
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#define CONFIG_SYS_TEXT_BASE 0x17800000 |
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/* MMC Configuration */ |
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#define CONFIG_FSL_ESDHC |
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#define CONFIG_FSL_USDHC |
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
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#define CONFIG_SYS_FSL_USDHC_NUM 2 |
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#define CONFIG_MMC |
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#define CONFIG_CMD_MMC |
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#define CONFIG_GENERIC_MMC |
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#define CONFIG_BOUNCE_BUFFER |
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#define CONFIG_CMD_EXT2 |
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#define CONFIG_CMD_FAT |
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#define CONFIG_DOS_PARTITION |
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/* Ethernet Configuration */ |
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#define CONFIG_CMD_PING |
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#define CONFIG_CMD_DHCP |
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#define CONFIG_CMD_MII |
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#define CONFIG_CMD_NET |
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#define CONFIG_FEC_MXC |
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#define CONFIG_MII |
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#define IMX_FEC_BASE ENET_BASE_ADDR |
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#define CONFIG_FEC_XCV_TYPE RGMII |
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#define CONFIG_ETHPRIME "FEC" |
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#define CONFIG_FEC_MXC_PHYADDR 1 |
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#define CONFIG_PHYLIB |
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#define CONFIG_PHY_ATHEROS |
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#if defined(CONFIG_MX6DL) |
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#define CONFIG_DEFAULT_FDT_FILE "imx6dl-wandboard.dtb" |
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#elif defined(CONFIG_MX6S) |
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#define CONFIG_DEFAULT_FDT_FILE "imx6s-wandboard.dtb" |
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#endif |
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#define CONFIG_EXTRA_ENV_SETTINGS \ |
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"script=boot.scr\0" \
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"uimage=uImage\0" \
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"console=ttymxc0\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
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"fdt_addr=0x11000000\0" \
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"boot_fdt=try\0" \
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"ip_dyn=yes\0" \
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"mmcdev=0\0" \
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"mmcpart=2\0" \
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"mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=${mmcroot}\0" \
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"loadbootscript=" \
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"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source\0" \
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"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
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"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
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"if run loadfdt; then " \
|
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"bootm ${loadaddr} - ${fdt_addr}; " \
|
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"else " \
|
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"if test ${boot_fdt} = try; then " \
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"bootm; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootm; " \
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"fi;\0" \
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"netargs=setenv bootargs console=${console},${baudrate} " \
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"root=/dev/nfs " \
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"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
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"netboot=echo Booting from net ...; " \
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"run netargs; " \
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"if test ${ip_dyn} = yes; then " \
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"setenv get_cmd dhcp; " \
|
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"else " \
|
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"setenv get_cmd tftp; " \
|
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"fi; " \
|
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"${get_cmd} ${uimage}; " \
|
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
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"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
|
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"bootm ${loadaddr} - ${fdt_addr}; " \
|
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"else " \
|
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"if test ${boot_fdt} = try; then " \
|
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"bootm; " \
|
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"else " \
|
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"echo WARN: Cannot load the DT; " \
|
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"fi; " \
|
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"fi; " \
|
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"else " \
|
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"bootm; " \
|
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"fi;\0" |
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|
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#define CONFIG_BOOTCOMMAND \ |
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"mmc dev ${mmcdev};" \
|
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"mmc dev ${mmcdev}; if mmc rescan; then " \
|
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"if run loadbootscript; then " \
|
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"run bootscript; " \
|
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"else " \
|
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"if run loaduimage; then " \
|
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"run mmcboot; " \
|
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"else run netboot; " \
|
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"fi; " \
|
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"fi; " \
|
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"else run netboot; fi" |
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|
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/* Miscellaneous configurable options */ |
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#define CONFIG_SYS_LONGHELP |
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#define CONFIG_SYS_HUSH_PARSER |
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#define CONFIG_SYS_PROMPT "=> " |
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#define CONFIG_AUTO_COMPLETE |
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#define CONFIG_SYS_CBSIZE 256 |
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|
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/* Print Buffer Size */ |
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
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#define CONFIG_SYS_MAXARGS 16 |
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
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|
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
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#define CONFIG_SYS_HZ 1000 |
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|
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#define CONFIG_CMDLINE_EDITING |
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|
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/* Physical Memory Map */ |
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#define CONFIG_NR_DRAM_BANKS 1 |
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
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|
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
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|
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#define CONFIG_SYS_INIT_SP_OFFSET \ |
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
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#define CONFIG_SYS_INIT_SP_ADDR \ |
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
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|
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/* FLASH and environment organization */ |
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#define CONFIG_SYS_NO_FLASH |
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|
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#define CONFIG_ENV_SIZE (8 * 1024) |
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|
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#define CONFIG_ENV_IS_IN_MMC |
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#define CONFIG_ENV_OFFSET (6 * 64 * 1024) |
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#define CONFIG_SYS_MMC_ENV_DEV 0 |
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|
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#define CONFIG_OF_LIBFDT |
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#define CONFIG_CMD_BOOTZ |
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|
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#ifndef CONFIG_SYS_DCACHE_OFF |
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#define CONFIG_CMD_CACHE |
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#endif |
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|
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#endif /* __CONFIG_H * */ |
||||
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