m68k: add generic-board support

Add generic-board support for the m68k architecture.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
master
angelo@sysam.it 10 years ago committed by Tom Rini
parent e77e65dfc2
commit e310b93ec1
  1. 3
      arch/m68k/config.mk
  2. 3
      arch/m68k/include/asm/config.h
  3. 8
      arch/m68k/include/asm/u-boot.h
  4. 4
      arch/m68k/lib/Makefile
  5. 22
      common/board_f.c
  6. 23
      common/board_r.c
  7. 2
      include/asm-generic/u-boot.h

@ -11,6 +11,9 @@ endif
CONFIG_STANDALONE_LOAD_ADDR ?= 0x20000
# Support generic board on m68k
__HAVE_ARCH_GENERIC_BOARD := y
PLATFORM_CPPFLAGS += -D__M68K__
PLATFORM_LDFLAGS += -n
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections

@ -7,6 +7,9 @@
#ifndef _ASM_CONFIG_H_
#define _ASM_CONFIG_H_
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_SYS_GENERIC_GLOBAL_DATA
#define CONFIG_NEEDS_MANUAL_RELOC
#define CONFIG_LMB

@ -20,6 +20,11 @@
* include/asm-ppc/u-boot.h
*/
#ifdef CONFIG_SYS_GENERIC_BOARD
/* Use the generic board which requires a unified bd_info */
#include <asm-generic/u-boot.h>
#else
#ifndef __ASSEMBLY__
typedef struct bd_info {
@ -48,6 +53,9 @@ typedef struct bd_info {
#endif /* __ASSEMBLY__ */
#endif /* !CONFIG_SYS_GENERIC_BOARD */
/* For image.h:image_check_target_arch() */
#define IH_ARCH_DEFAULT IH_ARCH_M68K

@ -5,7 +5,9 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += board.o
ifndef CONFIG_SYS_GENERIC_BOARD
obj-y += board.o
endif
obj-$(CONFIG_CMD_BOOTM) += bootm.o
obj-y += cache.o
obj-y += interrupts.o

@ -174,7 +174,7 @@ static int announce_dram_init(void)
return 0;
}
#if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
static int init_func_ram(void)
{
#ifdef CONFIG_BOARD_TYPES
@ -598,7 +598,7 @@ static int display_new_sp(void)
return 0;
}
#ifdef CONFIG_PPC
#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
static int setup_board_part1(void)
{
bd_t *bd = gd->bd;
@ -619,7 +619,7 @@ static int setup_board_part1(void)
defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
#endif
#if defined(CONFIG_MPC5xxx)
#if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
#endif
#if defined(CONFIG_MPC83xx)
@ -709,6 +709,13 @@ static int setup_reloc(void)
{
#ifdef CONFIG_SYS_TEXT_BASE
gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
#ifdef CONFIG_M68K
/*
* On all ColdFire arch cpu, monitor code starts always
* just after the default vector table location, so at 0x400
*/
gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
#endif
#endif
memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
@ -834,6 +841,9 @@ static init_fnc_t init_sequence_f[] = {
#ifdef CONFIG_FSL_ESDHC
get_clocks,
#endif
#ifdef CONFIG_M68K
get_clocks,
#endif
env_init, /* initialize environment */
#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
/* get CPU and bus clocks according to the environment variable */
@ -860,7 +870,7 @@ static init_fnc_t init_sequence_f[] = {
#if defined(CONFIG_MPC83xx)
prt_83xx_rsr,
#endif
#ifdef CONFIG_PPC
#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
checkcpu,
#endif
print_cpuinfo, /* display cpu info (and speed) */
@ -886,7 +896,7 @@ static init_fnc_t init_sequence_f[] = {
#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
dram_init, /* configure available RAM banks */
#endif
#if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
init_func_ram,
#endif
#ifdef CONFIG_POST
@ -954,7 +964,7 @@ static init_fnc_t init_sequence_f[] = {
reserve_stacks,
setup_dram_config,
show_dram_config,
#ifdef CONFIG_PPC
#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
setup_board_part1,
INIT_FUNC_WATCHDOG_RESET
setup_board_part2,

@ -167,14 +167,17 @@ static int initr_serial(void)
return 0;
}
#ifdef CONFIG_PPC
#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
static int initr_trap(void)
{
/*
* Setup trap handlers
*/
#if defined(CONFIG_PPC)
trap_init(gd->relocaddr);
#else
trap_init(CONFIG_SYS_SDRAM_BASE);
#endif
return 0;
}
#endif
@ -268,14 +271,6 @@ static int initr_malloc(void)
return 0;
}
#ifdef CONFIG_SYS_NONCACHED_MEMORY
static int initr_noncached(void)
{
noncached_init();
return 0;
}
#endif
#ifdef CONFIG_DM
static int initr_dm(void)
{
@ -703,9 +698,6 @@ init_fnc_t init_sequence_r[] = {
#endif
initr_barrier,
initr_malloc,
#ifdef CONFIG_SYS_NONCACHED_MEMORY
initr_noncached,
#endif
bootstage_relocate,
#ifdef CONFIG_DM
initr_dm,
@ -729,7 +721,7 @@ init_fnc_t init_sequence_r[] = {
#ifdef CONFIG_NEEDS_MANUAL_RELOC
initr_manual_reloc_cmdtable,
#endif
#ifdef CONFIG_PPC
#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
initr_trap,
#endif
#ifdef CONFIG_ADDR_MAP
@ -831,7 +823,8 @@ init_fnc_t init_sequence_r[] = {
#if defined(CONFIG_ARM) || defined(CONFIG_AVR32)
initr_enable_interrupts,
#endif
#if defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
#if defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) \
|| defined(CONFIG_M68K)
timer_init, /* initialize timer */
#endif
#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)

@ -45,7 +45,7 @@ typedef struct bd_info {
|| defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
unsigned long bi_immr_base; /* base of IMMR register */
#endif
#if defined(CONFIG_MPC5xxx)
#if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
unsigned long bi_mbar_base; /* base of internal registers */
#endif
#if defined(CONFIG_MPC83xx)

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