From e34e19feb7d06c2c0baf28ed145fe8f63b166fc8 Mon Sep 17 00:00:00 2001
From: Vikas Manocha <vikas.manocha@st.com>
Date: Sun, 12 Feb 2017 10:25:51 -0800
Subject: [PATCH] ARM: DT: stm32f7: add pin control node for serial port pins

And remove the uart pin configuration from board initialization.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
---
 arch/arm/dts/stm32f746-disco.dts           |  6 ++++++
 arch/arm/dts/stm32f746.dtsi                | 13 +++++++++++++
 board/st/stm32f746-disco/stm32f746-disco.c | 25 +------------------------
 3 files changed, 20 insertions(+), 24 deletions(-)

diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts
index 454b515..6734f23 100644
--- a/arch/arm/dts/stm32f746-disco.dts
+++ b/arch/arm/dts/stm32f746-disco.dts
@@ -70,6 +70,12 @@
 	clock-frequency = <25000000>;
 };
 
+&usart1 {
+	pinctrl-0 = <&usart1_pins_a>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
 &mac {
 	status = "okay";
 	phy-mode = "rmii";
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index f59eca8..867f399 100644
--- a/arch/arm/dts/stm32f746.dtsi
+++ b/arch/arm/dts/stm32f746.dtsi
@@ -104,6 +104,19 @@
 			ranges = <0 0x40020000 0x3000>;
 			u-boot,dm-pre-reloc;
 			pins-are-numbered;
+
+			usart1_pins_a: usart1@0 {
+				pins1 {
+					pinmux = <STM32F746_PA9_FUNC_USART1_TX>;
+					bias-disable;
+					drive-push-pull;
+					slew-rate = <2>;
+				};
+				pins2 {
+					pinmux = <STM32F746_PB7_FUNC_USART1_RX>;
+					bias-disable;
+				};
+			};
 		};
 	};
 };
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
index ee1deb5..9ebc36b 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -27,14 +27,6 @@ const struct stm32_gpio_ctl gpio_ctl_gpout = {
 	.af = STM32_GPIO_AF0
 };
 
-const struct stm32_gpio_ctl gpio_ctl_usart = {
-	.mode = STM32_GPIO_MODE_AF,
-	.otype = STM32_GPIO_OTYPE_PP,
-	.speed = STM32_GPIO_SPEED_50M,
-	.pupd = STM32_GPIO_PUPD_UP,
-	.af = STM32_GPIO_AF7
-};
-
 const struct stm32_gpio_ctl gpio_ctl_fmc = {
 	.mode = STM32_GPIO_MODE_AF,
 	.otype = STM32_GPIO_OTYPE_PP,
@@ -245,26 +237,11 @@ int dram_init(void)
 	return rv;
 }
 
-static const struct stm32_gpio_dsc usart_gpio[] = {
-	{STM32_GPIO_PORT_A, STM32_GPIO_PIN_9},	/* TX */
-	{STM32_GPIO_PORT_B, STM32_GPIO_PIN_7},	/* RX */
-};
-
 int uart_setup_gpio(void)
 {
-	int i;
-	int rv = 0;
-
 	clock_setup(GPIO_A_CLOCK_CFG);
 	clock_setup(GPIO_B_CLOCK_CFG);
-	for (i = 0; i < ARRAY_SIZE(usart_gpio); i++) {
-		rv = stm32_gpio_config(&usart_gpio[i], &gpio_ctl_usart);
-		if (rv)
-			goto out;
-	}
-
-out:
-	return rv;
+	return 0;
 }
 
 #ifdef CONFIG_ETH_DESIGNWARE