ARM: rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY

Many ARMv8 boards define a constant COUNTER_FREQUENCY to specify the
frequency of the ARM Generic Timer (aka. arch timer).
ARMv7 boards traditionally used CONFIG_TIMER_CLK_FREQ for the same
purpose. It seems useful to unify them.
Since there are less occurences of the latter version, lets convert all
users over to COUNTER_FREQUENCY.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
master
Andre Przywara 7 years ago committed by Jagan Teki
parent 1afd0f6f17
commit e4916e850b
  1. 4
      arch/arm/cpu/armv7/nonsec_virt.S
  2. 2
      arch/arm/cpu/armv7/sunxi/psci.c
  3. 6
      board/sunxi/board.c
  4. 2
      include/configs/exynos-common.h
  5. 2
      include/configs/ls1021aiot.h
  6. 2
      include/configs/ls1021aqds.h
  7. 2
      include/configs/ls1021atwr.h
  8. 2
      include/configs/mx7_common.h
  9. 1
      include/configs/sun50i.h
  10. 2
      include/configs/sunxi-common.h
  11. 1
      scripts/config_whitelist.txt

@ -188,11 +188,11 @@ ENTRY(_nonsec_init)
* we do this here instead.
* But first check if we have the generic timer.
*/
#ifdef CONFIG_TIMER_CLK_FREQ
#ifdef COUNTER_FREQUENCY
mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1
and r0, r0, #CPUID_ARM_GENTIMER_MASK @ mask arch timer bits
cmp r0, #(1 << CPUID_ARM_GENTIMER_SHIFT)
ldreq r1, =CONFIG_TIMER_CLK_FREQ
ldreq r1, =COUNTER_FREQUENCY
mcreq p15, 0, r1, c14, c0, 0 @ write CNTFRQ
#endif

@ -46,7 +46,7 @@ static u32 __secure cp15_read_cntp_ctl(void)
return val;
}
#define ONE_MS (CONFIG_TIMER_CLK_FREQ / 1000)
#define ONE_MS (COUNTER_FREQUENCY / 1000)
static void __secure __mdelay(u32 ms)
{

@ -100,14 +100,14 @@ int board_init(void)
* we avoid the risk of writing to it.
*/
asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r"(freq));
if (freq != CONFIG_TIMER_CLK_FREQ) {
if (freq != COUNTER_FREQUENCY) {
debug("arch timer frequency is %d Hz, should be %d, fixing ...\n",
freq, CONFIG_TIMER_CLK_FREQ);
freq, COUNTER_FREQUENCY);
#ifdef CONFIG_NON_SECURE
printf("arch timer frequency is wrong, but cannot adjust it\n");
#else
asm volatile("mcr p15, 0, %0, c14, c0, 0"
: : "r"(CONFIG_TIMER_CLK_FREQ));
: : "r"(COUNTER_FREQUENCY));
#endif
}
}

@ -23,7 +23,7 @@
/* input clock of PLL: 24MHz input clock */
#define CONFIG_SYS_CLK_FREQ 24000000
#define CONFIG_TIMER_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define COUNTER_FREQUENCY CONFIG_SYS_CLK_FREQ
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG

@ -243,7 +243,7 @@
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR 0x01ee0200
#define CONFIG_TIMER_CLK_FREQ 12500000
#define COUNTER_FREQUENCY 12500000
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 256

@ -500,7 +500,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR 0x01ee0200
#define CONFIG_TIMER_CLK_FREQ 12500000
#define COUNTER_FREQUENCY 12500000
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 256

@ -370,7 +370,7 @@
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR 0x01ee0200
#define CONFIG_TIMER_CLK_FREQ 12500000
#define COUNTER_FREQUENCY 12500000
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 256

@ -21,7 +21,7 @@
#define CONFIG_MXC_GPT_HCLK
#define CONFIG_SYSCOUNTER_TIMER
#define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
#define CONFIG_TIMER_CLK_FREQ CONFIG_SC_TIMER_CLK
#define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK
#define CONFIG_SYS_FSL_CLK
#define CONFIG_SYS_BOOTM_LEN 0x1000000

@ -18,7 +18,6 @@
#define CONFIG_SUNXI_USB_PHYS 1
#define COUNTER_FREQUENCY CONFIG_TIMER_CLK_FREQ
#define GICD_BASE 0x1c81000
#define GICC_BASE 0x1c82000

@ -46,7 +46,7 @@
#endif
/* CPU */
#define CONFIG_TIMER_CLK_FREQ 24000000
#define COUNTER_FREQUENCY 24000000
/*
* The DRAM Base differs between some models. We cannot use macros for the

@ -6453,7 +6453,6 @@ CONFIG_TI816X_EVM_DDR3
CONFIG_TI816X_USE_EMIF0
CONFIG_TI816X_USE_EMIF1
CONFIG_TI81XX
CONFIG_TIMER_CLK_FREQ
CONFIG_TIMESTAMP
CONFIG_TIZEN
CONFIG_TI_KEYSTONE_SERDES

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