Mike Frysinger
17 years ago
parent
8a9bab08a6
commit
e548321af0
@ -0,0 +1 @@ |
||||
/u-boot.lds |
||||
@ -0,0 +1,57 @@ |
||||
#
|
||||
# U-boot - Makefile
|
||||
#
|
||||
# Copyright (c) 2005-2008 Analog Device Inc.
|
||||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk |
||||
|
||||
LIB = $(obj)lib$(BOARD).a
|
||||
|
||||
COBJS-y := $(BOARD).o
|
||||
|
||||
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS-y))
|
||||
SOBJS := $(addprefix $(obj),$(SOBJS-y))
|
||||
|
||||
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds |
||||
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
|
||||
|
||||
$(obj)u-boot.lds: u-boot.lds.S |
||||
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
|
||||
|
||||
clean: |
||||
rm -f $(SOBJS) $(OBJS)
|
||||
|
||||
distclean: clean |
||||
rm -f $(LIB) core *.bak $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk |
||||
|
||||
sinclude $(obj).depend |
||||
|
||||
#########################################################################
|
||||
@ -0,0 +1,25 @@ |
||||
/*
|
||||
* U-boot - main board file |
||||
* |
||||
* Copyright (c) 2005-2008 Analog Devices Inc. |
||||
* |
||||
* Licensed under the GPL-2 or later. |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
|
||||
DECLARE_GLOBAL_DATA_PTR; |
||||
|
||||
int checkboard(void) |
||||
{ |
||||
printf("Board: Bluetechnix CM-BF561 core module\n"); |
||||
printf(" Support: http://www.bluetechnix.at/\n"); |
||||
return 0; |
||||
} |
||||
|
||||
phys_size_t initdram(int board_type) |
||||
{ |
||||
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; |
||||
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; |
||||
return gd->bd->bi_memsize; |
||||
} |
||||
@ -0,0 +1,33 @@ |
||||
#
|
||||
# Copyright (c) 2005-2008 Analog Device Inc.
|
||||
#
|
||||
# (C) Copyright 2001
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
# This is not actually used for Blackfin boards so do not change it
|
||||
#TEXT_BASE = do-not-use-me
|
||||
|
||||
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
|
||||
|
||||
# Set some default LDR flags based on boot mode.
|
||||
LDR_FLAGS-BFIN_BOOT_PARA := --bits 16
|
||||
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
|
||||
@ -0,0 +1,150 @@ |
||||
/* |
||||
* U-boot - u-boot.lds.S |
||||
* |
||||
* Copyright (c) 2005-2008 Analog Device Inc. |
||||
* |
||||
* (C) Copyright 2000-2004 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <config.h> |
||||
#include <asm/blackfin.h> |
||||
#undef ALIGN |
||||
#undef ENTRY |
||||
#undef bfin |
||||
|
||||
/* If we don't actually load anything into L1 data, this will avoid |
||||
* a syntax error. If we do actually load something into L1 data, |
||||
* we'll get a linker memory load error (which is what we'd want). |
||||
* This is here in the first place so we can quickly test building |
||||
* for different CPU's which may lack non-cache L1 data. |
||||
*/ |
||||
#ifndef L1_DATA_B_SRAM |
||||
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE |
||||
# define L1_DATA_B_SRAM_SIZE 0 |
||||
#endif |
||||
|
||||
/* The 0xC offset is so we don't clobber the tiny LDR jump block. */ |
||||
#ifdef CONFIG_BFIN_BOOTROM_USES_EVT1 |
||||
# define L1_CODE_ORIGIN L1_INST_SRAM |
||||
#else |
||||
# define L1_CODE_ORIGIN L1_INST_SRAM + 0xC |
||||
#endif |
||||
|
||||
OUTPUT_ARCH(bfin) |
||||
|
||||
MEMORY |
||||
{ |
||||
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN |
||||
l1_code : ORIGIN = L1_CODE_ORIGIN, LENGTH = L1_INST_SRAM_SIZE |
||||
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE |
||||
} |
||||
|
||||
ENTRY(_start) |
||||
SECTIONS |
||||
{ |
||||
.text : |
||||
{ |
||||
cpu/blackfin/start.o (.text .text.*) |
||||
|
||||
#ifdef ENV_IS_EMBEDDED |
||||
/* WARNING - the following is hand-optimized to fit within |
||||
* the sector before the environment sector. If it throws |
||||
* an error during compilation remove an object here to get |
||||
* it linked after the configuration sector. |
||||
*/ |
||||
|
||||
cpu/blackfin/traps.o (.text .text.*) |
||||
cpu/blackfin/interrupt.o (.text .text.*) |
||||
cpu/blackfin/serial.o (.text .text.*) |
||||
common/dlmalloc.o (.text .text.*) |
||||
lib_generic/crc32.o (.text .text.*) |
||||
|
||||
. = DEFINED(env_offset) ? env_offset : .;
|
||||
common/env_embedded.o (.text .text.*) |
||||
#endif |
||||
|
||||
__initcode_start = .;
|
||||
cpu/blackfin/initcode.o (.text .text.*) |
||||
__initcode_end = .;
|
||||
|
||||
*(.text .text.*) |
||||
} >ram |
||||
|
||||
.rodata : |
||||
{ |
||||
. = ALIGN(4);
|
||||
*(.rodata .rodata.*) |
||||
*(.rodata1) |
||||
*(.eh_frame) |
||||
. = ALIGN(4);
|
||||
} >ram |
||||
|
||||
.data : |
||||
{ |
||||
. = ALIGN(256);
|
||||
*(.data .data.*) |
||||
*(.data1) |
||||
*(.sdata) |
||||
*(.sdata2) |
||||
*(.dynamic) |
||||
CONSTRUCTORS |
||||
} >ram |
||||
|
||||
.u_boot_cmd : |
||||
{ |
||||
___u_boot_cmd_start = .;
|
||||
*(.u_boot_cmd) |
||||
___u_boot_cmd_end = .;
|
||||
} >ram |
||||
|
||||
.text_l1 : |
||||
{ |
||||
. = ALIGN(4);
|
||||
__stext_l1 = .;
|
||||
*(.l1.text) |
||||
. = ALIGN(4);
|
||||
__etext_l1 = .;
|
||||
} >l1_code AT>ram |
||||
__stext_l1_lma = LOADADDR(.text_l1);
|
||||
|
||||
.data_l1 : |
||||
{ |
||||
. = ALIGN(4);
|
||||
__sdata_l1 = .;
|
||||
*(.l1.data) |
||||
*(.l1.bss) |
||||
. = ALIGN(4);
|
||||
__edata_l1 = .;
|
||||
} >l1_data AT>ram |
||||
__sdata_l1_lma = LOADADDR(.data_l1);
|
||||
|
||||
.bss : |
||||
{ |
||||
. = ALIGN(4);
|
||||
__bss_start = .;
|
||||
*(.sbss) *(.scommon) |
||||
*(.dynbss) |
||||
*(.bss .bss.*) |
||||
*(COMMON) |
||||
__bss_end = .;
|
||||
} >ram |
||||
} |
||||
@ -0,0 +1,104 @@ |
||||
/*
|
||||
* U-boot - Configuration file for CM-BF561 board |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_CM_BF561_H__ |
||||
#define __CONFIG_CM_BF561_H__ |
||||
|
||||
#include <asm/blackfin-config-pre.h> |
||||
|
||||
|
||||
/*
|
||||
* Processor Settings |
||||
*/ |
||||
#define CONFIG_BFIN_CPU bf561-0.3 |
||||
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA |
||||
|
||||
|
||||
/*
|
||||
* Clock Settings |
||||
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV |
||||
* SCLK = (CLKIN * VCO_MULT) / SCLK_DIV |
||||
*/ |
||||
/* CONFIG_CLKIN_HZ is any value in Hz */ |
||||
#define CONFIG_CLKIN_HZ 25000000 |
||||
/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ |
||||
/* 1 = CLKIN / 2 */ |
||||
#define CONFIG_CLKIN_HALF 0 |
||||
/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ |
||||
/* 1 = bypass PLL */ |
||||
#define CONFIG_PLL_BYPASS 0 |
||||
/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ |
||||
/* Values can range from 0-63 (where 0 means 64) */ |
||||
#define CONFIG_VCO_MULT 22 |
||||
/* CCLK_DIV controls the core clock divider */ |
||||
/* Values can be 1, 2, 4, or 8 ONLY */ |
||||
#define CONFIG_CCLK_DIV 1 |
||||
/* SCLK_DIV controls the system clock divider */ |
||||
/* Values can range from 1-15 */ |
||||
#define CONFIG_SCLK_DIV 5 |
||||
|
||||
|
||||
/*
|
||||
* Memory Settings |
||||
*/ |
||||
#define CONFIG_MEM_ADD_WDTH 9 |
||||
#define CONFIG_MEM_SIZE 64 |
||||
|
||||
#define CONFIG_EBIU_SDRRC_VAL ((((CONFIG_SCLK_HZ / 1000) * 64) / 4096) - (7 + 2)) |
||||
#define CONFIG_EBIU_SDGCTL_VAL (SCTLE | PSS | TWR_2 | TRCD_2 | TRP_2 | TRAS_7 | PASR_ALL | CL_3) |
||||
|
||||
#define CONFIG_EBIU_AMGCTL_VAL (CDPRIO | B3_PEN | B2_PEN | B1_PEN | B0_PEN | AMBEN_ALL | AMCKEN) |
||||
#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) |
||||
#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) |
||||
|
||||
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) |
||||
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) |
||||
|
||||
|
||||
/*
|
||||
* Network Settings |
||||
*/ |
||||
#define ADI_CMDS_NETWORK 1 |
||||
#define CONFIG_DRIVER_SMC91111 1 |
||||
#define CONFIG_SMC91111_BASE 0x28000300 |
||||
#define CONFIG_HOSTNAME cm-bf561 |
||||
/* Uncomment next line to use fixed MAC address */ |
||||
/* #define CONFIG_ETHADDR 02:80:ad:20:31:cf */ |
||||
|
||||
|
||||
/*
|
||||
* Flash Settings |
||||
*/ |
||||
#define CONFIG_FLASH_CFI_DRIVER |
||||
#define CONFIG_SYS_FLASH_BASE 0x20000000 |
||||
#define CONFIG_SYS_FLASH_CFI |
||||
#define CONFIG_SYS_FLASH_PROTECTION |
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 |
||||
#define CONFIG_SYS_MAX_FLASH_SECT 67 |
||||
|
||||
|
||||
/*
|
||||
* Env Storage Settings |
||||
*/ |
||||
#define CONFIG_ENV_IS_IN_FLASH 1 |
||||
#define CONFIG_ENV_OFFSET 0x20000 |
||||
#define CONFIG_ENV_SECT_SIZE 0x20000 |
||||
#define CONFIG_ENV_SIZE 0x10000 |
||||
|
||||
|
||||
/*
|
||||
* Misc Settings |
||||
*/ |
||||
#define CONFIG_BAUDRATE 115200 |
||||
#define CONFIG_UART_CONSOLE 0 |
||||
|
||||
|
||||
/*
|
||||
* Pull in common ADI header for remaining command/environment setup |
||||
*/ |
||||
#include <configs/bfin_adi_common.h> |
||||
|
||||
#include <asm/blackfin-config-post.h> |
||||
|
||||
#endif |
||||
Loading…
Reference in new issue