ARM: tegra: enable USB device mode and UMS on some boards

For each of Jetson TK1, Venice2, and Beaver:

- Enable the first USB controller in DT, and describe its configuration.

- Enable USB device/gadget support. This allows the user to type e.g.
  "ums 0 mmc 0" at the command-line to cause U-Boot to act a USB device
  implementing the USB Mass Storage protocol, and expose MMC device 0
  that way.

This allows a host PC to mount the Tegra device's MMC, partition it, and
install a filesystem on it.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
master
Stephen Warren 11 years ago committed by Tom Warren
parent cc49da249c
commit e6607cffef
  1. 9
      arch/arm/dts/tegra124-jetson-tk1.dts
  2. 9
      arch/arm/dts/tegra124-venice2.dts
  3. 9
      arch/arm/dts/tegra30-beaver.dts
  4. 2
      include/configs/beaver.h
  5. 2
      include/configs/jetson-tk1.h
  6. 26
      include/configs/tegra-common-ums.h
  7. 2
      include/configs/venice2.h

@ -17,7 +17,8 @@
sdhci1 = "/sdhci@700b0400";
spi0 = "/spi@7000d400";
spi1 = "/spi@7000da00";
usb0 = "/usb@7d008000";
usb0 = "/usb@7d000000";
usb1 = "/usb@7d008000";
};
memory {
@ -77,6 +78,12 @@
bus-width = <8>;
};
usb@7d000000 {
status = "okay";
dr_mode = "otg";
nvidia,vbus-gpio = <&gpio 108 0>; /* gpio PN4, USB_VBUS_EN0 */
};
usb@7d008000 {
status = "okay";
nvidia,vbus-gpio = <&gpio 109 0>; /* gpio PN5, USB_VBUS_EN1 */

@ -17,7 +17,8 @@
sdhci1 = "/sdhci@700b0400";
spi0 = "/spi@7000d400";
spi1 = "/spi@7000da00";
usb0 = "/usb@7d008000";
usb0 = "/usb@7d000000";
usb1 = "/usb@7d008000";
};
memory {
@ -77,6 +78,12 @@
bus-width = <8>;
};
usb@7d000000 {
status = "okay";
dr_mode = "otg";
nvidia,vbus-gpio = <&gpio 108 0>; /* gpio PN4, USB_VBUS_EN0 */
};
usb@7d008000 {
status = "okay";
nvidia,vbus-gpio = <&gpio 109 0>; /* gpio PN5, USB_VBUS_EN1 */

@ -14,7 +14,8 @@
i2c4 = "/i2c@7000c700";
sdhci0 = "/sdhci@78000600";
sdhci1 = "/sdhci@78000000";
usb0 = "/usb@7d008000";
usb0 = "/usb@7d000000";
usb1 = "/usb@7d008000";
};
memory {
@ -70,6 +71,12 @@
bus-width = <8>;
};
usb@7d000000 {
status = "okay";
dr_mode = "otg";
nvidia,vbus-gpio = <&gpio 238 0>; /* gpio DD6, PEX_L1_CLKREQ */
};
usb@7d008000 {
nvidia,vbus-gpio = <&gpio 236 0>; /* PDD4 */
status = "okay";

@ -76,6 +76,7 @@
/* USB Host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_TEGRA
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_USB_STORAGE
#define CONFIG_CMD_USB
@ -87,6 +88,7 @@
#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
#include "tegra-common-ums.h"
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

@ -63,6 +63,7 @@
/* USB Host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_TEGRA
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_USB_STORAGE
#define CONFIG_CMD_USB
@ -74,6 +75,7 @@
#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
#include "tegra-common-ums.h"
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

@ -0,0 +1,26 @@
/*
* (C) Copyright 2014
* NVIDIA Corporation <www.nvidia.com>
*
* SPDX-License-Identifier: GPL-2.0
*/
#ifndef _TEGRA_COMMON_UMS_H_
#define _TEGRA_COMMON_UMS_H
#ifndef CONFIG_SPL_BUILD
/* USB gadget, and mass storage protocol */
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_VBUS_DRAW 2
#define CONFIG_CI_UDC
#define CONFIG_CI_UDC_HAS_HOSTPC
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_G_DNL_VENDOR_NUM 0x0955
#define CONFIG_G_DNL_PRODUCT_NUM 0x701A
#define CONFIG_G_DNL_MANUFACTURER "NVIDIA"
#define CONFIG_USBDOWNLOAD_GADGET
#define CONFIG_USB_GADGET_MASS_STORAGE
#define CONFIG_CMD_USB_MASS_STORAGE
#endif
#endif /* _TEGRA_COMMON_UMS_H */

@ -63,6 +63,7 @@
/* USB Host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_TEGRA
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_USB_STORAGE
#define CONFIG_CMD_USB
@ -74,6 +75,7 @@
#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
#include "tegra-common-ums.h"
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

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