We have a new board Peach-Pi similar to Peach-Pit. Peach-Pi differs from Peach-Pit in configuration factors like display resolution, memory size, SoC version etc. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>master
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/* |
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* SAMSUNG/GOOGLE Peach-Pit board device tree source |
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* |
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* Copyright (c) 2013 Samsung Electronics Co., Ltd. |
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* http://www.samsung.com |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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/dts-v1/; |
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#include "exynos54xx.dtsi" |
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|
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/ { |
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model = "Samsung/Google Peach Pi board based on Exynos5800"; |
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|
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compatible = "google,pit-rev#", "google,pit", |
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"google,peach", "samsung,exynos5800", "samsung,exynos5"; |
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|
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config { |
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google,bad-wake-gpios = <&gpio 0x56 0>; /* gpx0-6 */ |
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hwid = "PIT TEST A-A 7848"; |
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lazy-init = <1>; |
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}; |
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|
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aliases { |
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serial0 = "/serial@12C30000"; |
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console = "/serial@12C30000"; |
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pmic = "/i2c@12ca0000"; |
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}; |
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|
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dmc { |
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mem-manuf = "samsung"; |
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mem-type = "ddr3"; |
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clock-frequency = <800000000>; |
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arm-frequency = <1700000000>; |
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}; |
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|
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tmu@10060000 { |
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samsung,min-temp = <25>; |
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samsung,max-temp = <125>; |
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samsung,start-warning = <95>; |
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samsung,start-tripping = <105>; |
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samsung,hw-tripping = <110>; |
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samsung,efuse-min-value = <40>; |
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samsung,efuse-value = <55>; |
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samsung,efuse-max-value = <100>; |
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samsung,slope = <274761730>; |
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samsung,dc-value = <25>; |
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}; |
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|
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/* MAX77802 is on i2c bus 4 */ |
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i2c@12ca0000 { |
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clock-frequency = <400000>; |
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power-regulator@9 { |
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compatible = "maxim,max77802-pmic"; |
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reg = <0x9>; |
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}; |
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}; |
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i2c@12cd0000 { /* i2c7 */ |
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clock-frequency = <100000>; |
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soundcodec@20 { |
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reg = <0x20>; |
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compatible = "maxim,max98090-codec"; |
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}; |
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edp-lvds-bridge@48 { |
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compatible = "parade,ps8625"; |
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reg = <0x48>; |
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}; |
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}; |
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sound@3830000 { |
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samsung,codec-type = "max98090"; |
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}; |
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i2c@12e10000 { /* i2c9 */ |
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clock-frequency = <400000>; |
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tpm@20 { |
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compatible = "infineon,slb9645-tpm"; |
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reg = <0x20>; |
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}; |
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}; |
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spi@12d30000 { /* spi1 */ |
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spi-max-frequency = <50000000>; |
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firmware_storage_spi: flash@0 { |
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reg = <0>; |
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|
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/* |
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* A region for the kernel to store a panic event |
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* which the firmware will add to the log. |
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*/ |
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elog-panic-event-offset = <0x01e00000 0x100000>; |
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|
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elog-shrink-size = <0x400>; |
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elog-full-threshold = <0xc00>; |
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}; |
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}; |
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spi@12d40000 { /* spi2 */ |
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spi-max-frequency = <4000000>; |
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spi-deactivate-delay = <200>; |
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cros-ec@0 { |
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reg = <0>; |
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compatible = "google,cros-ec"; |
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spi-half-duplex; |
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spi-max-timeout-ms = <1100>; |
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spi-frame-header = <0xec>; |
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ec-interrupt = <&gpio 93 1>; /* GPX1_5 */ |
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|
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/* |
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* This describes the flash memory within the EC. Note |
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* that the STM32L flash erases to 0, not 0xff. |
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*/ |
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#address-cells = <1>; |
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#size-cells = <1>; |
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flash@8000000 { |
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reg = <0x08000000 0x20000>; |
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erase-value = <0>; |
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}; |
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}; |
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}; |
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xhci@12000000 { |
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samsung,vbus-gpio = <&gpio 0x40 0>; /* H00 */ |
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}; |
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xhci@12400000 { |
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samsung,vbus-gpio = <&gpio 0x41 0>; /* H01 */ |
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}; |
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fimd@14400000 { |
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samsung,vl-freq = <60>; |
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samsung,vl-col = <1920>; |
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samsung,vl-row = <1080>; |
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samsung,vl-width = <1920>; |
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samsung,vl-height = <1080>; |
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samsung,vl-clkp; |
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samsung,vl-dp; |
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samsung,vl-bpix = <4>; |
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samsung,vl-hspw = <80>; |
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samsung,vl-hbpd = <172>; |
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samsung,vl-hfpd = <60>; |
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samsung,vl-vspw = <10>; |
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samsung,vl-vbpd = <25>; |
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samsung,vl-vfpd = <10>; |
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samsung,vl-cmd-allow-len = <0xf>; |
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samsung,winid = <3>; |
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samsung,interface-mode = <1>; |
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samsung,dp-enabled = <1>; |
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samsung,dual-lcd-enabled = <0>; |
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}; |
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}; |
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