sunxi: use CONFIG_SYS_CLK_FREQ to set cpu clock

make the CPU clock selectable via Kconfig

this removes the sunxi specific CONFIG_CLK_FULL_SPEED defined in each
soc header and replaces it's use in board/sunxi/board.c with
CONFIG_SYS_CLK_FREQ from Kconfig which allows us to configure board
specific frequency on boot

Signed-off-by: Iain Paton <ipaton0@gmail.com>
[hdegoede@redhat.com s/CONFIG_SYS_CLK_FREQ/CONFIG_TIMER_CLK_FREQ/ for the
 arch-timer clk speed on sun7i to fix mis-compile on sun7i]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
master
Iain Paton 9 years ago committed by Hans de Goede
parent 7a140117ef
commit e71b422bd7
  1. 2
      Kconfig
  2. 2
      arch/arm/cpu/armv7/sunxi/psci.S
  3. 4
      board/sunxi/Kconfig
  4. 2
      board/sunxi/board.c
  5. 1
      include/configs/sun4i.h
  6. 1
      include/configs/sun5i.h
  7. 1
      include/configs/sun6i.h
  8. 4
      include/configs/sun7i.h
  9. 1
      include/configs/sun8i.h

@ -184,7 +184,7 @@ config SYS_TEXT_BASE
TODO: Move CONFIG_SYS_TEXT_BASE for all the architecture
config SYS_CLK_FREQ
depends on ARC
depends on ARC || ARCH_SUNXI
int "CPU clock frequency"
help
TODO: Move CONFIG_SYS_CLK_FREQ for all the architecture

@ -37,7 +37,7 @@
.arch_extension sec
#define ONE_MS (CONFIG_SYS_CLK_FREQ / 1000)
#define ONE_MS (CONFIG_TIMER_CLK_FREQ / 1000)
#define TEN_MS (10 * ONE_MS)
#define GICD_BASE 0x1c81000
#define GICC_BASE 0x1c82000

@ -132,6 +132,10 @@ endchoice
endif
config SYS_CLK_FREQ
default 912000000 if MACH_SUN7I
default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
config SYS_CONFIG_NAME
default "sun4i" if MACH_SUN4I
default "sun5i" if MACH_SUN5I

@ -215,7 +215,7 @@ void sunxi_board_init(void)
* assured it's being powered with suitable core voltage
*/
if (!power_failed)
clock_set_pll1(CONFIG_CLK_FULL_SPEED);
clock_set_pll1(CONFIG_SYS_CLK_FREQ);
else
printf("Failed to set core voltage! Can't set CPU frequency\n");
}

@ -11,7 +11,6 @@
/*
* A10 specific configuration
*/
#define CONFIG_CLK_FULL_SPEED 1008000000
#ifdef CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_SUNXI

@ -11,7 +11,6 @@
/*
* High Level Configuration Options
*/
#define CONFIG_CLK_FULL_SPEED 1008000000
#ifdef CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_SUNXI

@ -14,7 +14,6 @@
/*
* A31 specific configuration
*/
#define CONFIG_CLK_FULL_SPEED 1008000000
#ifdef CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_SUNXI

@ -12,7 +12,6 @@
/*
* A20 specific configuration
*/
#define CONFIG_CLK_FULL_SPEED 912000000
#ifdef CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_SUNXI
@ -21,8 +20,7 @@
#define CONFIG_ARMV7_PSCI 1
#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
#define CONFIG_SYS_CLK_FREQ 24000000
#define CONFIG_TIMER_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_TIMER_CLK_FREQ 24000000
/*
* Include common sunxi configuration where most the settings are

@ -12,7 +12,6 @@
/*
* A23 specific configuration
*/
#define CONFIG_CLK_FULL_SPEED 1008000000
#ifdef CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_SUNXI

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