mx1ads: Fix build by using new relocation scheme

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
master
Fabio Estevam 14 years ago committed by Albert ARIBAUD
parent 22a9ea974b
commit e845f9006a
  1. 25
      board/mx1ads/config.mk
  2. 27
      board/mx1ads/mx1ads.c
  3. 10
      include/configs/mx1ads.h

@ -1,25 +0,0 @@
#
# board/mx1ads/config.mk
#
# (c) Copyright 2004
# Techware Information Technology, Inc.
# http://www.techware.com.tw/
#
# Ming-Len Wu <minglen_wu@techware.com.tw>
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
CONFIG_SYS_TEXT_BASE = 0x08400000

@ -78,7 +78,7 @@ void SetAsynchMode (void)
static u32 mc9328sid;
int board_init (void)
int board_early_init_f(void)
{
volatile unsigned int tmp;
@ -112,10 +112,6 @@ int board_init (void)
SetAsynchMode ();
gd->bd->bi_arch_number = MACH_TYPE_MX1ADS;
gd->bd->bi_boot_params = 0x08000100; /* adress of boot parameters */
icache_enable ();
dcache_enable ();
@ -133,6 +129,15 @@ int board_init (void)
return 0;
}
int board_init(void)
{
gd->bd->bi_arch_number = MACH_TYPE_MX1ADS;
gd->bd->bi_boot_params = 0x08000100; /* adress of boot parameters */
return 0;
}
int board_late_init (void)
{
@ -161,12 +166,18 @@ int board_late_init (void)
return 0;
}
int dram_init (void)
int dram_init(void)
{
/* dram_init must store complete ramsize in gd->ram_size */
gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM_1,
PHYS_SDRAM_1_SIZE);
return 0;
}
void dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
return 0;
}
#ifdef CONFIG_CMD_NET

@ -156,6 +156,16 @@
#define PHYS_SDRAM_1 0x08000000 /* SDRAM on CSD0 */
#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
#define CONFIG_SYS_TEXT_BASE 0x10000000
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR 0x00300000
#define CONFIG_SYS_INIT_RAM_SIZE 0x000FFFFF
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_GBL_DATA_OFFSET)
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* 1 bank of SyncFlash */
#define CONFIG_SYS_FLASH_BASE 0x0C000000 /* SyncFlash on CSD1 */
#define FLASH_BANK_SIZE 0x01000000 /* 16 MB Total */

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