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@ -378,10 +378,9 @@ |
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* BAT0 2G Cacheable, non-guarded |
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* 0x0000_0000 2G DDR |
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*/ |
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#define CFG_DBAT0L ( BATL_PP_RW | BATL_CACHEINHIBIT \ |
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| BATL_GUARDEDSTORAGE | BATL_MEMCOHERENCE ) |
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#define CFG_DBAT0U ( BATU_BL_2G | BATU_VS | BATU_VP ) |
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#define CFG_IBAT0L ( BATL_PP_RW | BATL_CACHEINHIBIT | BATL_MEMCOHERENCE) |
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#define CFG_DBAT0L (BATL_PP_RW | BATL_MEMCOHERENCE) |
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#define CFG_DBAT0U (BATU_BL_2G | BATU_VS | BATU_VP) |
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#define CFG_IBAT0L (BATL_PP_RW | BATL_MEMCOHERENCE ) |
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#define CFG_IBAT0U CFG_DBAT0U |
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/*
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