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@ -27,8 +27,8 @@ |
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* board/config.h - configuration options, board specific |
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*/ |
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#ifndef _JAMICA54455_H |
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#define _JAMICA54455_H |
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#ifndef _M54455EVB_H |
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#define _M54455EVB_H |
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/*
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* High Level Configuration Options |
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@ -75,7 +75,7 @@ |
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#define CONFIG_CMD_MISC |
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#define CONFIG_CMD_MII |
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#define CONFIG_CMD_NET |
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#define CONFIG_CMD_PCI |
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#undef CONFIG_CMD_PCI |
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#define CONFIG_CMD_PING |
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#define CONFIG_CMD_REGINFO |
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@ -129,8 +129,8 @@ |
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"u-boot=u-boot.bin\0" \
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"load=tftp ${loadaddr) ${u-boot}\0" \
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"upd=run load; run prog\0" \
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"prog=prot off 0 2ffff;" \
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"era 0 2ffff;" \
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"prog=prot off 4000000 402ffff;" \
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"era 4000000 402ffff;" \
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"cp.b ${loadaddr} 0 ${filesize};" \
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"save\0" \
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"" |
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@ -174,6 +174,7 @@ |
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#define CFG_IMMR CFG_MBAR |
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/* PCI */ |
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#ifdef CONFIG_CMD_PCI |
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#define CONFIG_PCI 1 |
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#define CFG_PCI_MEM_BUS 0xA0000000 |
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@ -187,6 +188,7 @@ |
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#define CFG_PCI_CFG_BUS 0xB0000000 |
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#define CFG_PCI_CFG_PHYS CFG_PCI_CFG_BUS |
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#define CFG_PCI_CFG_SIZE 0x01000000 |
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#endif |
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/* FPGA - Spartan 2 */ |
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/* experiment
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@ -268,8 +270,6 @@ |
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/* Configuration for environment
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* Environment is embedded in u-boot in the second sector of the flash |
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*/ |
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#define CFG_ENV_OFFSET 0x4000 |
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#define CFG_ENV_SECT_SIZE 0x2000 |
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#define CFG_ENV_IS_IN_FLASH 1 |
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#define CONFIG_ENV_OVERWRITE 1 |
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#undef CFG_ENV_IS_EMBEDDED |
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@ -278,13 +278,17 @@ |
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* FLASH organization |
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*/ |
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#ifdef CFG_ATMEL_BOOT |
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# define CFG_FLASH_BASE 0 |
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# define CFG_FLASH_BASE CFG_CS0_BASE |
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# define CFG_FLASH0_BASE CFG_CS0_BASE |
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# define CFG_FLASH1_BASE CFG_CS1_BASE |
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# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000) |
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# define CFG_ENV_SECT_SIZE 0x2000 |
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#else |
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# define CFG_FLASH_BASE CFG_FLASH0_BASE |
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# define CFG_FLASH0_BASE CFG_CS1_BASE |
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# define CFG_FLASH1_BASE CFG_CS0_BASE |
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# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x60000) |
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# define CFG_ENV_SECT_SIZE 0x20000 |
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#endif |
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/* M54455EVB has one non CFI flash, defined CFG_FLASH_CFI will cause the system
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@ -328,9 +332,9 @@ |
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* NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support. |
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*/ |
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#ifdef CFG_ATMEL_BOOT |
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# define CONFIG_JFFS2_DEV "nor0" |
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# define CONFIG_JFFS2_DEV "nor1" |
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# define CONFIG_JFFS2_PART_SIZE 0x01000000 |
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# define CONFIG_JFFS2_PART_OFFSET CFG_FLASH1_BASE |
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# define CONFIG_JFFS2_PART_OFFSET (CFG_FLASH1_BASE + 0x500000) |
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#else |
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# define CONFIG_JFFS2_DEV "nor0" |
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# define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x500000) |
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@ -356,20 +360,20 @@ |
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#ifdef CFG_ATMEL_BOOT |
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/* Atmel Flash */ |
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#define CFG_CS0_BASE 0 |
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#define CFG_CS0_BASE 0x04000000 |
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#define CFG_CS0_MASK 0x00070001 |
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#define CFG_CS0_CTRL 0x00001140 |
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/* Intel Flash */ |
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#define CFG_CS1_BASE 0x04000000 |
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#define CFG_CS1_BASE 0x00000000 |
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#define CFG_CS1_MASK 0x01FF0001 |
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#define CFG_CS1_CTRL 0x003F3D60 |
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#define CFG_CS1_CTRL 0x00000D60 |
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#define CFG_ATMEL_BASE CFG_CS0_BASE |
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#else |
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/* Intel Flash */ |
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#define CFG_CS0_BASE 0 |
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#define CFG_CS0_BASE 0x00000000 |
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#define CFG_CS0_MASK 0x01FF0001 |
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#define CFG_CS0_CTRL 0x003F3D60 |
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#define CFG_CS0_CTRL 0x00000D60 |
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/* Atmel Flash */ |
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#define CFG_CS1_BASE 0x04000000 |
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#define CFG_CS1_MASK 0x00070001 |
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@ -388,4 +392,4 @@ |
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#define CFG_CS3_MASK 0x00070001 |
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#define CFG_CS3_CTRL 0x00000020 |
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#endif /* _JAMICA54455_H */ |
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#endif /* _M54455EVB_H */ |
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