Albert ARIBAUD
11 years ago
commit
ebf8644a11
@ -0,0 +1,25 @@ |
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if ARCH_S5PC1XX |
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|
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choice |
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prompt "S5PC1XX board select" |
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config TARGET_S5P_GONI |
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bool "S5P Goni board" |
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select OF_CONTROL if !SPL_BUILD |
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config TARGET_SMDKC100 |
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bool "Support smdkc100 board" |
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select OF_CONTROL if !SPL_BUILD |
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endchoice |
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config SYS_CPU |
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default "armv7" |
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config SYS_SOC |
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default "s5pc1xx" |
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source "board/samsung/goni/Kconfig" |
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source "board/samsung/smdkc100/Kconfig" |
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endif |
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@ -1,30 +0,0 @@ |
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/* |
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* Copyright (C) 2009 Samsung Electronics |
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* Minkyu Kang <mk7.kang@samsung.com>
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* |
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* based on arch/arm/cpu/armv7/omap3/cache.S |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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.align 5
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#include <linux/linkage.h> |
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#ifndef CONFIG_SYS_L2CACHE_OFF |
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ENTRY(v7_outer_cache_enable) |
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push {r0, r1, r2, lr} |
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mrc 15, 0, r3, cr1, cr0, 1 |
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orr r3, r3, #2 |
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mcr 15, 0, r3, cr1, cr0, 1 |
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pop {r1, r2, r3, pc} |
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ENDPROC(v7_outer_cache_enable) |
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|
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ENTRY(v7_outer_cache_disable) |
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push {r0, r1, r2, lr} |
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mrc 15, 0, r3, cr1, cr0, 1 |
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bic r3, r3, #2 |
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mcr 15, 0, r3, cr1, cr0, 1 |
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pop {r1, r2, r3, pc} |
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ENDPROC(v7_outer_cache_disable) |
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#endif |
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@ -0,0 +1,47 @@ |
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/*
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* Copyright (C) 2014 Samsung Electronics |
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* Minkyu Kang <mk7.kang@samsung.com> |
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* Robert Baldyga <r.baldyga@samsung.com> |
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* |
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* based on arch/arm/cpu/armv7/omap3/cache.S |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#ifndef CONFIG_SYS_DCACHE_OFF |
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void enable_caches(void) |
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{ |
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dcache_enable(); |
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} |
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void disable_caches(void) |
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{ |
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dcache_disable(); |
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} |
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#endif |
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|
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#ifndef CONFIG_SYS_L2CACHE_OFF |
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void v7_outer_cache_enable(void) |
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{ |
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__asm( |
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"push {r0, r1, r2, lr}\n\t" |
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"mrc 15, 0, r3, cr1, cr0, 1\n\t" |
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"orr r3, r3, #2\n\t" |
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"mcr 15, 0, r3, cr1, cr0, 1\n\t" |
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"pop {r1, r2, r3, pc}" |
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); |
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} |
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|
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void v7_outer_cache_disable(void) |
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{ |
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__asm( |
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"push {r0, r1, r2, lr}\n\t" |
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"mrc 15, 0, r3, cr1, cr0, 1\n\t" |
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"bic r3, r3, #2\n\t" |
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"mcr 15, 0, r3, cr1, cr0, 1\n\t" |
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"pop {r1, r2, r3, pc}" |
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); |
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} |
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#endif |
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@ -0,0 +1,21 @@ |
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/* |
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* Samsung's Exynos4210-based SMDKV310 board device tree source |
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* |
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* Copyright (c) 2014 Google, Inc |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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/dts-v1/; |
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/include/ "exynos4.dtsi" |
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/ { |
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model = "Samsung SMDKV310 on Exynos4210"; |
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compatible = "samsung,smdkv310", "samsung,exynos4210"; |
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aliases { |
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serial0 = "/serial@13800000"; |
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console = "/serial@13820000"; |
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}; |
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}; |
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@ -0,0 +1,28 @@ |
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/* |
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* Samsung's S5PC110-based Goni board device tree source |
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* |
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* Copyright (c) 2014 Google, Inc |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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/dts-v1/; |
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#include "skeleton.dtsi" |
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/ { |
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model = "Samsung Goni based on S5PC110"; |
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compatible = "samsung,goni", "samsung,s5pc110"; |
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aliases { |
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serial2 = "/serial@e2900800"; |
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console = "/serial@e2900800"; |
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}; |
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serial@e2900800 { |
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compatible = "samsung,exynos4210-uart"; |
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reg = <0xe2900800 0x400>; |
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id = <2>; |
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}; |
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}; |
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@ -0,0 +1,29 @@ |
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/* |
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* Samsung's Exynos4210-based SMDKV310 board device tree source |
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* |
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* Copyright (c) 2014 Google, Inc |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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/dts-v1/; |
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#include "skeleton.dtsi" |
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/ { |
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model = "Samsung SMDKC100 based on S5PC100"; |
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compatible = "samsung,smdkc100", "samsung,s5pc100"; |
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aliases { |
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serial0 = "/serial@ec000000"; |
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console = "/serial@ec000000"; |
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}; |
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serial@ec000000 { |
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compatible = "samsung,exynos4210-uart"; |
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reg = <0xec000000 0x100>; |
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interrupts = <0 51 0>; |
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id = <0>; |
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}; |
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}; |
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@ -0,0 +1,61 @@ |
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/*
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* Copyright (C) 2012 Samsung Electronics |
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* Rajeshwari Shinde <rajeshwari.s@samsung.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#ifndef __ASM_ARM_ARCH_PERIPH_H |
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#define __ASM_ARM_ARCH_PERIPH_H |
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/*
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* Peripherals required for pinmux configuration. List will |
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* grow with support for more devices getting added. |
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* Numbering based on interrupt table. |
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* |
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*/ |
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enum periph_id { |
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PERIPH_ID_UART0 = 51, |
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PERIPH_ID_UART1, |
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PERIPH_ID_UART2, |
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PERIPH_ID_UART3, |
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PERIPH_ID_I2C0 = 56, |
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PERIPH_ID_I2C1, |
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PERIPH_ID_I2C2, |
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PERIPH_ID_I2C3, |
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PERIPH_ID_I2C4, |
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PERIPH_ID_I2C5, |
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PERIPH_ID_I2C6, |
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PERIPH_ID_I2C7, |
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PERIPH_ID_SPI0 = 68, |
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PERIPH_ID_SPI1, |
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PERIPH_ID_SPI2, |
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PERIPH_ID_SDMMC0 = 75, |
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PERIPH_ID_SDMMC1, |
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PERIPH_ID_SDMMC2, |
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PERIPH_ID_SDMMC3, |
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PERIPH_ID_I2C8 = 87, |
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PERIPH_ID_I2C9, |
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PERIPH_ID_I2S0 = 98, |
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PERIPH_ID_I2S1 = 99, |
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/* Since following peripherals do
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* not have shared peripheral interrupts (SPIs) |
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* they are numbered arbitiraly after the maximum |
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* SPIs Exynos has (128) |
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*/ |
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PERIPH_ID_SROMC = 128, |
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PERIPH_ID_SPI3, |
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PERIPH_ID_SPI4, |
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PERIPH_ID_SDMMC4, |
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PERIPH_ID_PWM0, |
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PERIPH_ID_PWM1, |
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PERIPH_ID_PWM2, |
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PERIPH_ID_PWM3, |
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PERIPH_ID_PWM4, |
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PERIPH_ID_I2C10 = 203, |
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PERIPH_ID_NONE = -1, |
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}; |
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#endif /* __ASM_ARM_ARCH_PERIPH_H */ |
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@ -0,0 +1,50 @@ |
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/*
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* Copyright (C) 2012 Samsung Electronics |
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* Abhilash Kesavan <a.kesavan@samsung.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#ifndef __ASM_ARM_ARCH_PINMUX_H |
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#define __ASM_ARM_ARCH_PINMUX_H |
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#include "periph.h" |
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/*
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* Flags for setting specific configarations of peripherals. |
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* List will grow with support for more devices getting added. |
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*/ |
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enum { |
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PINMUX_FLAG_NONE = 0x00000000, |
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/* Flags for eMMC */ |
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PINMUX_FLAG_8BIT_MODE = 1 << 0, /* SDMMC 8-bit mode */ |
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/* Flags for SROM controller */ |
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PINMUX_FLAG_BANK = 3 << 0, /* bank number (0-3) */ |
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PINMUX_FLAG_16BIT = 1 << 2, /* 16-bit width */ |
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}; |
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/**
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* Configures the pinmux for a particular peripheral. |
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* |
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* Each gpio can be configured in many different ways (4 bits on exynos) |
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* such as "input", "output", "special function", "external interrupt" |
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* etc. This function will configure the peripheral pinmux along with |
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* pull-up/down and drive strength. |
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* |
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* @param peripheral peripheral to be configured |
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* @param flags configure flags |
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* @return 0 if ok, -1 on error (e.g. unsupported peripheral) |
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*/ |
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int exynos_pinmux_config(int peripheral, int flags); |
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/**
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* Decode the peripheral id using the interrpt numbers. |
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* |
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* @param blob Device tree blob |
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* @param node FDT I2C node to find |
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* @return peripheral id if ok, PERIPH_ID_NONE on error |
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*/ |
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int pinmux_decode_periph_id(const void *blob, int node); |
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#endif |
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@ -1,2 +1,4 @@ |
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CONFIG_ARM=y |
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CONFIG_ARCH_S5PC1XX=y |
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CONFIG_TARGET_S5P_GONI=y |
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CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-goni" |
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@ -1,2 +1,4 @@ |
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CONFIG_ARM=y |
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CONFIG_TARGET_SMDKC100=y |
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CONFIG_ARCH_S5PC1XX=y |
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CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-smdkc100" |
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@ -0,0 +1,218 @@ |
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/*
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* Copyright (c) 2013 The Chromium OS Authors. |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <cros_ec.h> |
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#include <errno.h> |
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#include <power/tps65090_pmic.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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#define TPS65090_ADDR 0x48 |
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static struct tps65090 { |
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struct cros_ec_dev *dev; /* The CROS_EC device */ |
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} config; |
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/* TPS65090 register addresses */ |
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enum { |
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REG_IRQ1 = 0, |
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REG_CG_CTRL0 = 4, |
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REG_CG_STATUS1 = 0xa, |
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REG_FET1_CTRL = 0x0f, |
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REG_FET2_CTRL, |
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REG_FET3_CTRL, |
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REG_FET4_CTRL, |
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REG_FET5_CTRL, |
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REG_FET6_CTRL, |
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REG_FET7_CTRL, |
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TPS65090_NUM_REGS, |
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}; |
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enum { |
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IRQ1_VBATG = 1 << 3, |
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CG_CTRL0_ENC_MASK = 0x01, |
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MAX_FET_NUM = 7, |
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MAX_CTRL_READ_TRIES = 5, |
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/* TPS65090 FET_CTRL register values */ |
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FET_CTRL_TOFET = 1 << 7, /* Timeout, startup, overload */ |
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FET_CTRL_PGFET = 1 << 4, /* Power good for FET status */ |
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FET_CTRL_WAIT = 3 << 2, /* Overcurrent timeout max */ |
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FET_CTRL_ADENFET = 1 << 1, /* Enable output auto discharge */ |
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FET_CTRL_ENFET = 1 << 0, /* Enable FET */ |
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}; |
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/**
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* tps65090_read - read a byte from tps6090 |
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* |
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* @param reg The register address to read from. |
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* @param val We'll return value value read here. |
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* @return 0 if ok; error if EC returns failure. |
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*/ |
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static int tps65090_read(u32 reg, u8 *val) |
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{ |
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return cros_ec_i2c_xfer(config.dev, TPS65090_ADDR, reg, 1, |
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val, 1, true); |
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} |
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|
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/**
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* tps65090_write - write a byte to tps6090 |
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* |
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* @param reg The register address to write to. |
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* @param val The value to write. |
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* @return 0 if ok; error if EC returns failure. |
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*/ |
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static int tps65090_write(u32 reg, u8 val) |
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{ |
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return cros_ec_i2c_xfer(config.dev, TPS65090_ADDR, reg, 1, |
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&val, 1, false); |
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} |
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|
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/**
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* Checks for a valid FET number |
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* |
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* @param fet_id FET number to check |
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* @return 0 if ok, -EINVAL if FET value is out of range |
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*/ |
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static int tps65090_check_fet(unsigned int fet_id) |
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{ |
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if (fet_id == 0 || fet_id > MAX_FET_NUM) { |
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debug("parameter fet_id is out of range, %u not in 1 ~ %u\n", |
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fet_id, MAX_FET_NUM); |
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return -EINVAL; |
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} |
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|
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return 0; |
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} |
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|
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/**
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* Set the power state for a FET |
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* |
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* @param fet_id Fet number to set (1..MAX_FET_NUM) |
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* @param set 1 to power on FET, 0 to power off |
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* @return -EIO if we got a comms error, -EAGAIN if the FET failed to |
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* change state. If all is ok, returns 0. |
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*/ |
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static int tps65090_fet_set(int fet_id, bool set) |
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{ |
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int retry; |
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u8 reg, value; |
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|
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value = FET_CTRL_ADENFET | FET_CTRL_WAIT; |
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if (set) |
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value |= FET_CTRL_ENFET; |
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|
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if (tps65090_write(REG_FET1_CTRL + fet_id - 1, value)) |
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return -EIO; |
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|
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/* Try reading until we get a result */ |
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for (retry = 0; retry < MAX_CTRL_READ_TRIES; retry++) { |
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if (tps65090_read(REG_FET1_CTRL + fet_id - 1, ®)) |
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return -EIO; |
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|
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/* Check that the fet went into the expected state */ |
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if (!!(reg & FET_CTRL_PGFET) == set) |
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return 0; |
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|
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/* If we got a timeout, there is no point in waiting longer */ |
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if (reg & FET_CTRL_TOFET) |
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break; |
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|
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mdelay(1); |
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} |
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|
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debug("FET %d: Power good should have set to %d but reg=%#02x\n", |
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fet_id, set, reg); |
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return -EAGAIN; |
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} |
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|
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int tps65090_fet_enable(unsigned int fet_id) |
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{ |
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ulong start; |
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int loops; |
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int ret; |
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|
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ret = tps65090_check_fet(fet_id); |
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if (ret) |
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return ret; |
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|
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start = get_timer(0); |
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for (loops = 0;; loops++) { |
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ret = tps65090_fet_set(fet_id, true); |
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if (!ret) |
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break; |
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|
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if (get_timer(start) > 100) |
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break; |
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|
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/* Turn it off and try again until we time out */ |
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tps65090_fet_set(fet_id, false); |
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} |
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|
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if (ret) { |
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debug("%s: FET%d failed to power on: time=%lums, loops=%d\n", |
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__func__, fet_id, get_timer(start), loops); |
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} else if (loops) { |
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debug("%s: FET%d powered on after %lums, loops=%d\n", |
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__func__, fet_id, get_timer(start), loops); |
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} |
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/*
|
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* Unfortunately, there are some conditions where the power |
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* good bit will be 0, but the fet still comes up. One such |
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* case occurs with the lcd backlight. We'll just return 0 here |
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* and assume that the fet will eventually come up. |
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*/ |
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if (ret == -EAGAIN) |
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ret = 0; |
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|
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return ret; |
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} |
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|
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int tps65090_fet_disable(unsigned int fet_id) |
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{ |
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int ret; |
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|
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ret = tps65090_check_fet(fet_id); |
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if (ret) |
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return ret; |
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|
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ret = tps65090_fet_set(fet_id, false); |
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|
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return ret; |
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} |
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|
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int tps65090_fet_is_enabled(unsigned int fet_id) |
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{ |
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u8 reg = 0; |
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int ret; |
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|
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ret = tps65090_check_fet(fet_id); |
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if (ret) |
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return ret; |
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ret = tps65090_read(REG_FET1_CTRL + fet_id - 1, ®); |
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if (ret) { |
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debug("fail to read FET%u_CTRL register over I2C", fet_id); |
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return -EIO; |
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} |
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|
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return reg & FET_CTRL_ENFET; |
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} |
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|
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int tps65090_init(void) |
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{ |
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puts("TPS65090 PMIC EC init\n"); |
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|
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config.dev = board_get_cros_ec_dev(); |
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if (!config.dev) { |
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debug("%s: no cros_ec device: cannot init tps65090\n", |
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__func__); |
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return -ENODEV; |
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} |
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|
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return 0; |
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} |
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@ -0,0 +1,68 @@ |
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/*
|
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* Copyright (C) 2014 Samsung Electronics |
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* |
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* Configuration settings for the SAMSUNG EXYNOS5 board. |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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#ifndef __CONFIG_EXYNOS4_COMMON_H |
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#define __CONFIG_EXYNOS4_COMMON_H |
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|
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#define CONFIG_EXYNOS4 /* Exynos4 Family */ |
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|
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#include "exynos-common.h" |
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|
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#define CONFIG_BOARD_COMMON |
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|
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#define CONFIG_SYS_CACHELINE_SIZE 32 |
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#define CONFIG_REVISION_TAG |
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|
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/* SD/MMC configuration */ |
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#define CONFIG_MMC_SDMA |
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#define CONFIG_MMC_DEFAULT_DEV 0 |
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|
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#undef CONFIG_CMD_FPGA |
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#undef CONFIG_CMD_MISC |
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#undef CONFIG_CMD_NET |
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#undef CONFIG_CMD_NFS |
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#undef CONFIG_CMD_XIMG |
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#undef CONFIG_CMD_ONENAND |
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#undef CONFIG_CMD_MTDPARTS |
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#define CONFIG_CMD_DFU |
||||
#define CONFIG_CMD_GPT |
||||
#define CONFIG_CMD_PMIC |
||||
#define CONFIG_CMD_SETEXPR |
||||
|
||||
/* USB Composite download gadget - g_dnl */ |
||||
#define CONFIG_USBDOWNLOAD_GADGET |
||||
|
||||
/* TIZEN THOR downloader support */ |
||||
#define CONFIG_CMD_THOR_DOWNLOAD |
||||
#define CONFIG_THOR_FUNCTION |
||||
|
||||
#define CONFIG_DFU_FUNCTION |
||||
#define CONFIG_DFU_MMC |
||||
#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M |
||||
#define DFU_DEFAULT_POLL_TIMEOUT 300 |
||||
|
||||
/* USB Samsung's IDs */ |
||||
#define CONFIG_G_DNL_VENDOR_NUM 0x04E8 |
||||
#define CONFIG_G_DNL_PRODUCT_NUM 0x6601 |
||||
#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM |
||||
#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D |
||||
#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 |
||||
#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 |
||||
#define CONFIG_G_DNL_MANUFACTURER "Samsung" |
||||
|
||||
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ |
||||
|
||||
#define CONFIG_USB_GADGET |
||||
#define CONFIG_USB_GADGET_S3C_UDC_OTG |
||||
#define CONFIG_USB_GADGET_DUALSPEED |
||||
#define CONFIG_USB_GADGET_VBUS_DRAW 2 |
||||
|
||||
#define CONFIG_CMD_USB_MASS_STORAGE |
||||
#define CONFIG_USB_GADGET_MASS_STORAGE |
||||
|
||||
#endif /* __CONFIG_EXYNOS4_COMMON_H */ |
||||
@ -0,0 +1,35 @@ |
||||
/*
|
||||
* Copyright (C) 2014 Google, Inc |
||||
* |
||||
* Configuration settings for generic Exynos 5 board |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_EXYNOS5_DT_COMMON_H |
||||
#define __CONFIG_EXYNOS5_DT_COMMON_H |
||||
|
||||
#include "exynos5-common.h" |
||||
|
||||
/* PMIC */ |
||||
#define CONFIG_POWER |
||||
#define CONFIG_POWER_I2C |
||||
#define CONFIG_POWER_TPS65090 |
||||
|
||||
/* Enable keyboard */ |
||||
#define CONFIG_CROS_EC /* CROS_EC protocol */ |
||||
#define CONFIG_CROS_EC_KEYB /* CROS_EC keyboard input */ |
||||
#define CONFIG_CMD_CROS_EC |
||||
#define CONFIG_KEYBOARD |
||||
|
||||
/* Console configuration */ |
||||
#undef EXYNOS_DEVICE_SETTINGS |
||||
#define EXYNOS_DEVICE_SETTINGS \ |
||||
"stdin=serial,cros-ec-keyb\0" \
|
||||
"stdout=serial,lcd\0" \
|
||||
"stderr=serial,lcd\0" |
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \ |
||||
EXYNOS_DEVICE_SETTINGS |
||||
|
||||
#endif |
||||
Loading…
Reference in new issue