@ -44,56 +44,3 @@ phys_size_t initdram(int board_type)
return dram_size ;
}
# if defined(CONFIG_DDR_ECC) || (CONFIG_NUM_DDR_CONTROLLERS > 1)
void board_add_ram_info ( int use_default )
{
# if (CONFIG_NUM_DDR_CONTROLLERS > 1)
# if defined(CONFIG_MPC85xx)
volatile ccsr_ddr_t * ddr1 = ( void * ) ( CONFIG_SYS_MPC85xx_DDR_ADDR ) ;
# elif defined(CONFIG_MPC86xx)
volatile immap_t * immap = ( immap_t * ) CONFIG_SYS_IMMR ;
volatile ccsr_ddr_t * ddr1 = & immap - > im_ddr1 ;
# endif
# endif
puts ( " ( " ) ;
# if (CONFIG_NUM_DDR_CONTROLLERS > 1)
/* Print interleaving information */
if ( ddr1 - > cs0_config & 0x20000000 ) {
switch ( ( ddr1 - > cs0_config > > 24 ) & 0xf ) {
case 0 :
puts ( " cache line " ) ;
break ;
case 1 :
puts ( " page " ) ;
break ;
case 2 :
puts ( " bank " ) ;
break ;
case 3 :
puts ( " super-bank " ) ;
break ;
default :
puts ( " invalid " ) ;
break ;
}
} else {
puts ( " no " ) ;
}
puts ( " interleaving " ) ;
# endif
# if (CONFIG_NUM_DDR_CONTROLLERS > 1) && defined(CONFIG_DDR_ECC)
puts ( " , " ) ;
# endif
# if defined(CONFIG_DDR_ECC)
puts ( " ECC enabled " ) ;
# endif
puts ( " ) " ) ;
}
# endif /* CONFIG_DDR_ECC || CONFIG_NUM_DDR_CONTROLLERS > 1 */