Import the Renesas R8A7791 DTS and headers from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>master
Marek Vasut
7 years ago
committed by
Marek Vasut
parent
16b6e4aa37
commit
edd15fcffb
@ -0,0 +1,840 @@ |
||||
/* |
||||
* Device Tree Source for the Koelsch board |
||||
* |
||||
* Copyright (C) 2013 Renesas Electronics Corporation |
||||
* Copyright (C) 2013-2014 Renesas Solutions Corp. |
||||
* Copyright (C) 2014 Cogent Embedded, Inc. |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0 |
||||
*/ |
||||
|
||||
/* |
||||
* SSI-AK4643 |
||||
* |
||||
* SW1: 1: AK4643 |
||||
* 2: CN22 |
||||
* 3: ADV7511 |
||||
* |
||||
* This command is required when Playback/Capture |
||||
* |
||||
* amixer set "LINEOUT Mixer DACL" on |
||||
* amixer set "DVC Out" 100% |
||||
* amixer set "DVC In" 100% |
||||
* |
||||
* You can use Mute |
||||
* |
||||
* amixer set "DVC Out Mute" on |
||||
* amixer set "DVC In Mute" on |
||||
* |
||||
* You can use Volume Ramp |
||||
* |
||||
* amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" |
||||
* amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" |
||||
* amixer set "DVC Out Ramp" on |
||||
* aplay xxx.wav & |
||||
* amixer set "DVC Out" 80% // Volume Down |
||||
* amixer set "DVC Out" 100% // Volume Up |
||||
*/ |
||||
|
||||
/dts-v1/; |
||||
#include "r8a7791.dtsi" |
||||
#include <dt-bindings/gpio/gpio.h> |
||||
#include <dt-bindings/input/input.h> |
||||
|
||||
/ { |
||||
model = "Koelsch"; |
||||
compatible = "renesas,koelsch", "renesas,r8a7791"; |
||||
|
||||
aliases { |
||||
serial0 = &scif0; |
||||
serial1 = &scif1; |
||||
i2c9 = &gpioi2c1; |
||||
i2c12 = &i2cexio1; |
||||
}; |
||||
|
||||
chosen { |
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; |
||||
stdout-path = "serial0:115200n8"; |
||||
}; |
||||
|
||||
memory@40000000 { |
||||
device_type = "memory"; |
||||
reg = <0 0x40000000 0 0x40000000>; |
||||
}; |
||||
|
||||
memory@200000000 { |
||||
device_type = "memory"; |
||||
reg = <2 0x00000000 0 0x40000000>; |
||||
}; |
||||
|
||||
lbsc { |
||||
#address-cells = <1>; |
||||
#size-cells = <1>; |
||||
}; |
||||
|
||||
keyboard { |
||||
compatible = "gpio-keys"; |
||||
|
||||
key-1 { |
||||
gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; |
||||
linux,code = <KEY_1>; |
||||
label = "SW2-1"; |
||||
wakeup-source; |
||||
debounce-interval = <20>; |
||||
}; |
||||
key-2 { |
||||
gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; |
||||
linux,code = <KEY_2>; |
||||
label = "SW2-2"; |
||||
wakeup-source; |
||||
debounce-interval = <20>; |
||||
}; |
||||
key-3 { |
||||
gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; |
||||
linux,code = <KEY_3>; |
||||
label = "SW2-3"; |
||||
wakeup-source; |
||||
debounce-interval = <20>; |
||||
}; |
||||
key-4 { |
||||
gpios = <&gpio5 3 GPIO_ACTIVE_LOW>; |
||||
linux,code = <KEY_4>; |
||||
label = "SW2-4"; |
||||
wakeup-source; |
||||
debounce-interval = <20>; |
||||
}; |
||||
key-a { |
||||
gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; |
||||
linux,code = <KEY_A>; |
||||
label = "SW30"; |
||||
wakeup-source; |
||||
debounce-interval = <20>; |
||||
}; |
||||
key-b { |
||||
gpios = <&gpio7 1 GPIO_ACTIVE_LOW>; |
||||
linux,code = <KEY_B>; |
||||
label = "SW31"; |
||||
wakeup-source; |
||||
debounce-interval = <20>; |
||||
}; |
||||
key-c { |
||||
gpios = <&gpio7 2 GPIO_ACTIVE_LOW>; |
||||
linux,code = <KEY_C>; |
||||
label = "SW32"; |
||||
wakeup-source; |
||||
debounce-interval = <20>; |
||||
}; |
||||
key-d { |
||||
gpios = <&gpio7 3 GPIO_ACTIVE_LOW>; |
||||
linux,code = <KEY_D>; |
||||
label = "SW33"; |
||||
wakeup-source; |
||||
debounce-interval = <20>; |
||||
}; |
||||
key-e { |
||||
gpios = <&gpio7 4 GPIO_ACTIVE_LOW>; |
||||
linux,code = <KEY_E>; |
||||
label = "SW34"; |
||||
wakeup-source; |
||||
debounce-interval = <20>; |
||||
}; |
||||
key-f { |
||||
gpios = <&gpio7 5 GPIO_ACTIVE_LOW>; |
||||
linux,code = <KEY_F>; |
||||
label = "SW35"; |
||||
wakeup-source; |
||||
debounce-interval = <20>; |
||||
}; |
||||
key-g { |
||||
gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; |
||||
linux,code = <KEY_G>; |
||||
label = "SW36"; |
||||
wakeup-source; |
||||
debounce-interval = <20>; |
||||
}; |
||||
}; |
||||
|
||||
leds { |
||||
compatible = "gpio-leds"; |
||||
led6 { |
||||
gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>; |
||||
label = "LED6"; |
||||
}; |
||||
led7 { |
||||
gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>; |
||||
label = "LED7"; |
||||
}; |
||||
led8 { |
||||
gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>; |
||||
label = "LED8"; |
||||
}; |
||||
}; |
||||
|
||||
vcc_sdhi0: regulator-vcc-sdhi0 { |
||||
compatible = "regulator-fixed"; |
||||
|
||||
regulator-name = "SDHI0 Vcc"; |
||||
regulator-min-microvolt = <3300000>; |
||||
regulator-max-microvolt = <3300000>; |
||||
|
||||
gpio = <&gpio7 17 GPIO_ACTIVE_HIGH>; |
||||
enable-active-high; |
||||
}; |
||||
|
||||
vccq_sdhi0: regulator-vccq-sdhi0 { |
||||
compatible = "regulator-gpio"; |
||||
|
||||
regulator-name = "SDHI0 VccQ"; |
||||
regulator-min-microvolt = <1800000>; |
||||
regulator-max-microvolt = <3300000>; |
||||
|
||||
gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; |
||||
gpios-states = <1>; |
||||
states = <3300000 1 |
||||
1800000 0>; |
||||
}; |
||||
|
||||
vcc_sdhi1: regulator-vcc-sdhi1 { |
||||
compatible = "regulator-fixed"; |
||||
|
||||
regulator-name = "SDHI1 Vcc"; |
||||
regulator-min-microvolt = <3300000>; |
||||
regulator-max-microvolt = <3300000>; |
||||
|
||||
gpio = <&gpio7 18 GPIO_ACTIVE_HIGH>; |
||||
enable-active-high; |
||||
}; |
||||
|
||||
vccq_sdhi1: regulator-vccq-sdhi1 { |
||||
compatible = "regulator-gpio"; |
||||
|
||||
regulator-name = "SDHI1 VccQ"; |
||||
regulator-min-microvolt = <1800000>; |
||||
regulator-max-microvolt = <3300000>; |
||||
|
||||
gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>; |
||||
gpios-states = <1>; |
||||
states = <3300000 1 |
||||
1800000 0>; |
||||
}; |
||||
|
||||
vcc_sdhi2: regulator-vcc-sdhi2 { |
||||
compatible = "regulator-fixed"; |
||||
|
||||
regulator-name = "SDHI2 Vcc"; |
||||
regulator-min-microvolt = <3300000>; |
||||
regulator-max-microvolt = <3300000>; |
||||
|
||||
gpio = <&gpio7 19 GPIO_ACTIVE_HIGH>; |
||||
enable-active-high; |
||||
}; |
||||
|
||||
vccq_sdhi2: regulator-vccq-sdhi2 { |
||||
compatible = "regulator-gpio"; |
||||
|
||||
regulator-name = "SDHI2 VccQ"; |
||||
regulator-min-microvolt = <1800000>; |
||||
regulator-max-microvolt = <3300000>; |
||||
|
||||
gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; |
||||
gpios-states = <1>; |
||||
states = <3300000 1 |
||||
1800000 0>; |
||||
}; |
||||
|
||||
audio_clock: audio_clock { |
||||
compatible = "fixed-clock"; |
||||
#clock-cells = <0>; |
||||
clock-frequency = <11289600>; |
||||
}; |
||||
|
||||
rsnd_ak4643: sound { |
||||
compatible = "simple-audio-card"; |
||||
|
||||
simple-audio-card,format = "left_j"; |
||||
simple-audio-card,bitclock-master = <&sndcodec>; |
||||
simple-audio-card,frame-master = <&sndcodec>; |
||||
|
||||
sndcpu: simple-audio-card,cpu { |
||||
sound-dai = <&rcar_sound>; |
||||
}; |
||||
|
||||
sndcodec: simple-audio-card,codec { |
||||
sound-dai = <&ak4643>; |
||||
clocks = <&audio_clock>; |
||||
}; |
||||
}; |
||||
|
||||
hdmi-in { |
||||
compatible = "hdmi-connector"; |
||||
type = "a"; |
||||
|
||||
port { |
||||
hdmi_con_in: endpoint { |
||||
remote-endpoint = <&adv7612_in>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
hdmi-out { |
||||
compatible = "hdmi-connector"; |
||||
type = "a"; |
||||
|
||||
port { |
||||
hdmi_con_out: endpoint { |
||||
remote-endpoint = <&adv7511_out>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
x2_clk: x2-clock { |
||||
compatible = "fixed-clock"; |
||||
#clock-cells = <0>; |
||||
clock-frequency = <74250000>; |
||||
}; |
||||
|
||||
x13_clk: x13-clock { |
||||
compatible = "fixed-clock"; |
||||
#clock-cells = <0>; |
||||
clock-frequency = <148500000>; |
||||
}; |
||||
|
||||
gpioi2c1: i2c-9 { |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
compatible = "i2c-gpio"; |
||||
status = "disabled"; |
||||
gpios = <&gpio7 16 GPIO_ACTIVE_HIGH /* sda */ |
||||
&gpio7 15 GPIO_ACTIVE_HIGH /* scl */ |
||||
>; |
||||
i2c-gpio,delay-us = <5>; |
||||
}; |
||||
|
||||
/* |
||||
* I2C1 is routed to EXIO connector B, pins 64 (SCL) + 66 (SDA). |
||||
* A fallback to GPIO is provided. |
||||
*/ |
||||
i2cexio1: i2c-12 { |
||||
compatible = "i2c-demux-pinctrl"; |
||||
i2c-parent = <&i2c1>, <&gpioi2c1>; |
||||
i2c-bus-name = "i2c-exio1"; |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
}; |
||||
}; |
||||
|
||||
&du { |
||||
pinctrl-0 = <&du_pins>; |
||||
pinctrl-names = "default"; |
||||
status = "okay"; |
||||
|
||||
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 726>, |
||||
<&x13_clk>, <&x2_clk>; |
||||
clock-names = "du.0", "du.1", "lvds.0", |
||||
"dclkin.0", "dclkin.1"; |
||||
|
||||
ports { |
||||
port@0 { |
||||
endpoint { |
||||
remote-endpoint = <&adv7511_in>; |
||||
}; |
||||
}; |
||||
port@1 { |
||||
lvds_connector: endpoint { |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
&extal_clk { |
||||
clock-frequency = <20000000>; |
||||
}; |
||||
|
||||
&pfc { |
||||
pinctrl-0 = <&scif_clk_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
i2c1_pins: i2c1 { |
||||
groups = "i2c1"; |
||||
function = "i2c1"; |
||||
}; |
||||
|
||||
i2c2_pins: i2c2 { |
||||
groups = "i2c2"; |
||||
function = "i2c2"; |
||||
}; |
||||
|
||||
du_pins: du { |
||||
groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0"; |
||||
function = "du"; |
||||
}; |
||||
|
||||
scif0_pins: scif0 { |
||||
groups = "scif0_data_d"; |
||||
function = "scif0"; |
||||
}; |
||||
|
||||
scif1_pins: scif1 { |
||||
groups = "scif1_data_d"; |
||||
function = "scif1"; |
||||
}; |
||||
|
||||
scif_clk_pins: scif_clk { |
||||
groups = "scif_clk"; |
||||
function = "scif_clk"; |
||||
}; |
||||
|
||||
ether_pins: ether { |
||||
groups = "eth_link", "eth_mdio", "eth_rmii"; |
||||
function = "eth"; |
||||
}; |
||||
|
||||
phy1_pins: phy1 { |
||||
groups = "intc_irq0"; |
||||
function = "intc"; |
||||
}; |
||||
|
||||
sdhi0_pins: sd0 { |
||||
groups = "sdhi0_data4", "sdhi0_ctrl"; |
||||
function = "sdhi0"; |
||||
power-source = <3300>; |
||||
}; |
||||
|
||||
sdhi0_pins_uhs: sd0_uhs { |
||||
groups = "sdhi0_data4", "sdhi0_ctrl"; |
||||
function = "sdhi0"; |
||||
power-source = <1800>; |
||||
}; |
||||
|
||||
sdhi1_pins: sd1 { |
||||
groups = "sdhi1_data4", "sdhi1_ctrl"; |
||||
function = "sdhi1"; |
||||
power-source = <3300>; |
||||
}; |
||||
|
||||
sdhi1_pins_uhs: sd1_uhs { |
||||
groups = "sdhi1_data4", "sdhi1_ctrl"; |
||||
function = "sdhi1"; |
||||
power-source = <1800>; |
||||
}; |
||||
|
||||
sdhi2_pins: sd2 { |
||||
groups = "sdhi2_data4", "sdhi2_ctrl"; |
||||
function = "sdhi2"; |
||||
power-source = <3300>; |
||||
}; |
||||
|
||||
sdhi2_pins_uhs: sd2_uhs { |
||||
groups = "sdhi2_data4", "sdhi2_ctrl"; |
||||
function = "sdhi2"; |
||||
power-source = <1800>; |
||||
}; |
||||
|
||||
qspi_pins: qspi { |
||||
groups = "qspi_ctrl", "qspi_data4"; |
||||
function = "qspi"; |
||||
}; |
||||
|
||||
msiof0_pins: msiof0 { |
||||
groups = "msiof0_clk", "msiof0_sync", "msiof0_rx", |
||||
"msiof0_tx"; |
||||
function = "msiof0"; |
||||
}; |
||||
|
||||
usb0_pins: usb0 { |
||||
groups = "usb0"; |
||||
function = "usb0"; |
||||
}; |
||||
|
||||
usb1_pins: usb1 { |
||||
groups = "usb1"; |
||||
function = "usb1"; |
||||
}; |
||||
|
||||
vin0_pins: vin0 { |
||||
groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk"; |
||||
function = "vin0"; |
||||
}; |
||||
|
||||
vin1_pins: vin1 { |
||||
groups = "vin1_data8", "vin1_clk"; |
||||
function = "vin1"; |
||||
}; |
||||
|
||||
sound_pins: sound { |
||||
groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data"; |
||||
function = "ssi"; |
||||
}; |
||||
|
||||
sound_clk_pins: sound_clk { |
||||
groups = "audio_clk_a"; |
||||
function = "audio_clk"; |
||||
}; |
||||
}; |
||||
|
||||
ðer { |
||||
pinctrl-0 = <ðer_pins &phy1_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
phy-handle = <&phy1>; |
||||
renesas,ether-link-active-low; |
||||
status = "okay"; |
||||
|
||||
phy1: ethernet-phy@1 { |
||||
reg = <1>; |
||||
interrupt-parent = <&irqc0>; |
||||
interrupts = <0 IRQ_TYPE_LEVEL_LOW>; |
||||
micrel,led-mode = <1>; |
||||
}; |
||||
}; |
||||
|
||||
&cmt0 { |
||||
status = "okay"; |
||||
}; |
||||
|
||||
&sata0 { |
||||
status = "okay"; |
||||
}; |
||||
|
||||
&scif0 { |
||||
pinctrl-0 = <&scif0_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
status = "okay"; |
||||
}; |
||||
|
||||
&scif1 { |
||||
pinctrl-0 = <&scif1_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
status = "okay"; |
||||
}; |
||||
|
||||
&scif_clk { |
||||
clock-frequency = <14745600>; |
||||
}; |
||||
|
||||
&sdhi0 { |
||||
pinctrl-0 = <&sdhi0_pins>; |
||||
pinctrl-1 = <&sdhi0_pins_uhs>; |
||||
pinctrl-names = "default", "state_uhs"; |
||||
|
||||
vmmc-supply = <&vcc_sdhi0>; |
||||
vqmmc-supply = <&vccq_sdhi0>; |
||||
cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; |
||||
wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; |
||||
sd-uhs-sdr50; |
||||
sd-uhs-sdr104; |
||||
status = "okay"; |
||||
}; |
||||
|
||||
&sdhi1 { |
||||
pinctrl-0 = <&sdhi1_pins>; |
||||
pinctrl-1 = <&sdhi1_pins_uhs>; |
||||
pinctrl-names = "default", "state_uhs"; |
||||
|
||||
vmmc-supply = <&vcc_sdhi1>; |
||||
vqmmc-supply = <&vccq_sdhi1>; |
||||
cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; |
||||
wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>; |
||||
sd-uhs-sdr50; |
||||
status = "okay"; |
||||
}; |
||||
|
||||
&sdhi2 { |
||||
pinctrl-0 = <&sdhi2_pins>; |
||||
pinctrl-1 = <&sdhi2_pins_uhs>; |
||||
pinctrl-names = "default", "state_uhs"; |
||||
|
||||
vmmc-supply = <&vcc_sdhi2>; |
||||
vqmmc-supply = <&vccq_sdhi2>; |
||||
cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>; |
||||
sd-uhs-sdr50; |
||||
status = "okay"; |
||||
}; |
||||
|
||||
&qspi { |
||||
pinctrl-0 = <&qspi_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
status = "okay"; |
||||
|
||||
flash: flash@0 { |
||||
compatible = "spansion,s25fl512s", "jedec,spi-nor"; |
||||
reg = <0>; |
||||
spi-max-frequency = <30000000>; |
||||
spi-tx-bus-width = <4>; |
||||
spi-rx-bus-width = <4>; |
||||
spi-cpha; |
||||
spi-cpol; |
||||
m25p,fast-read; |
||||
|
||||
partitions { |
||||
compatible = "fixed-partitions"; |
||||
#address-cells = <1>; |
||||
#size-cells = <1>; |
||||
|
||||
partition@0 { |
||||
label = "loader"; |
||||
reg = <0x00000000 0x00080000>; |
||||
read-only; |
||||
}; |
||||
partition@80000 { |
||||
label = "user"; |
||||
reg = <0x00080000 0x00580000>; |
||||
read-only; |
||||
}; |
||||
partition@600000 { |
||||
label = "flash"; |
||||
reg = <0x00600000 0x03a00000>; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
&msiof0 { |
||||
pinctrl-0 = <&msiof0_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
status = "okay"; |
||||
|
||||
pmic: pmic@0 { |
||||
compatible = "renesas,r2a11302ft"; |
||||
reg = <0>; |
||||
spi-max-frequency = <6000000>; |
||||
spi-cpol; |
||||
spi-cpha; |
||||
}; |
||||
}; |
||||
|
||||
&i2c1 { |
||||
pinctrl-0 = <&i2c1_pins>; |
||||
pinctrl-names = "i2c-exio1"; |
||||
}; |
||||
|
||||
&i2c2 { |
||||
pinctrl-0 = <&i2c2_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
status = "okay"; |
||||
clock-frequency = <100000>; |
||||
|
||||
ak4643: codec@12 { |
||||
compatible = "asahi-kasei,ak4643"; |
||||
#sound-dai-cells = <0>; |
||||
reg = <0x12>; |
||||
}; |
||||
|
||||
composite-in@20 { |
||||
compatible = "adi,adv7180"; |
||||
reg = <0x20>; |
||||
remote = <&vin1>; |
||||
|
||||
port { |
||||
adv7180: endpoint { |
||||
bus-width = <8>; |
||||
remote-endpoint = <&vin1ep>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
cec_clock: cec-clock { |
||||
compatible = "fixed-clock"; |
||||
#clock-cells = <0>; |
||||
clock-frequency = <12000000>; |
||||
}; |
||||
|
||||
hdmi@39 { |
||||
compatible = "adi,adv7511w"; |
||||
reg = <0x39>; |
||||
interrupt-parent = <&gpio3>; |
||||
interrupts = <29 IRQ_TYPE_LEVEL_LOW>; |
||||
clocks = <&cec_clock>; |
||||
clock-names = "cec"; |
||||
|
||||
adi,input-depth = <8>; |
||||
adi,input-colorspace = "rgb"; |
||||
adi,input-clock = "1x"; |
||||
adi,input-style = <1>; |
||||
adi,input-justification = "evenly"; |
||||
|
||||
ports { |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
|
||||
port@0 { |
||||
reg = <0>; |
||||
adv7511_in: endpoint { |
||||
remote-endpoint = <&du_out_rgb>; |
||||
}; |
||||
}; |
||||
|
||||
port@1 { |
||||
reg = <1>; |
||||
adv7511_out: endpoint { |
||||
remote-endpoint = <&hdmi_con_out>; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
hdmi-in@4c { |
||||
compatible = "adi,adv7612"; |
||||
reg = <0x4c>; |
||||
interrupt-parent = <&gpio4>; |
||||
interrupts = <2 IRQ_TYPE_LEVEL_LOW>; |
||||
default-input = <0>; |
||||
|
||||
ports { |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
|
||||
port@0 { |
||||
reg = <0>; |
||||
adv7612_in: endpoint { |
||||
remote-endpoint = <&hdmi_con_in>; |
||||
}; |
||||
}; |
||||
|
||||
port@2 { |
||||
reg = <2>; |
||||
adv7612_out: endpoint { |
||||
remote-endpoint = <&vin0ep2>; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
eeprom@50 { |
||||
compatible = "renesas,24c02", "atmel,24c02"; |
||||
reg = <0x50>; |
||||
pagesize = <16>; |
||||
}; |
||||
}; |
||||
|
||||
&i2c6 { |
||||
status = "okay"; |
||||
clock-frequency = <100000>; |
||||
|
||||
pmic@58 { |
||||
compatible = "dlg,da9063"; |
||||
reg = <0x58>; |
||||
interrupt-parent = <&irqc0>; |
||||
interrupts = <2 IRQ_TYPE_LEVEL_LOW>; |
||||
interrupt-controller; |
||||
|
||||
rtc { |
||||
compatible = "dlg,da9063-rtc"; |
||||
}; |
||||
|
||||
wdt { |
||||
compatible = "dlg,da9063-watchdog"; |
||||
}; |
||||
}; |
||||
|
||||
vdd_dvfs: regulator@68 { |
||||
compatible = "dlg,da9210"; |
||||
reg = <0x68>; |
||||
interrupt-parent = <&irqc0>; |
||||
interrupts = <2 IRQ_TYPE_LEVEL_LOW>; |
||||
|
||||
regulator-min-microvolt = <1000000>; |
||||
regulator-max-microvolt = <1000000>; |
||||
regulator-boot-on; |
||||
regulator-always-on; |
||||
}; |
||||
}; |
||||
|
||||
&pci0 { |
||||
status = "okay"; |
||||
pinctrl-0 = <&usb0_pins>; |
||||
pinctrl-names = "default"; |
||||
}; |
||||
|
||||
&pci1 { |
||||
status = "okay"; |
||||
pinctrl-0 = <&usb1_pins>; |
||||
pinctrl-names = "default"; |
||||
}; |
||||
|
||||
&hsusb { |
||||
status = "okay"; |
||||
pinctrl-0 = <&usb0_pins>; |
||||
pinctrl-names = "default"; |
||||
renesas,enable-gpio = <&gpio5 31 GPIO_ACTIVE_HIGH>; |
||||
}; |
||||
|
||||
&usbphy { |
||||
status = "okay"; |
||||
}; |
||||
|
||||
&pcie_bus_clk { |
||||
clock-frequency = <100000000>; |
||||
}; |
||||
|
||||
&pciec { |
||||
status = "okay"; |
||||
}; |
||||
|
||||
&cpu0 { |
||||
cpu0-supply = <&vdd_dvfs>; |
||||
}; |
||||
|
||||
/* HDMI video input */ |
||||
&vin0 { |
||||
status = "okay"; |
||||
pinctrl-0 = <&vin0_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
port { |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
|
||||
vin0ep2: endpoint { |
||||
remote-endpoint = <&adv7612_out>; |
||||
bus-width = <24>; |
||||
hsync-active = <0>; |
||||
vsync-active = <0>; |
||||
pclk-sample = <1>; |
||||
data-active = <1>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
/* composite video input */ |
||||
&vin1 { |
||||
status = "okay"; |
||||
pinctrl-0 = <&vin1_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
port { |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
|
||||
vin1ep: endpoint { |
||||
remote-endpoint = <&adv7180>; |
||||
bus-width = <8>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
&rcar_sound { |
||||
pinctrl-0 = <&sound_pins &sound_clk_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
/* Single DAI */ |
||||
#sound-dai-cells = <0>; |
||||
|
||||
status = "okay"; |
||||
|
||||
rcar_sound,dai { |
||||
dai0 { |
||||
playback = <&ssi0 &src2 &dvc0>; |
||||
capture = <&ssi1 &src3 &dvc1>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
&ssi1 { |
||||
shared-pin; |
||||
}; |
||||
@ -0,0 +1,452 @@ |
||||
/* |
||||
* Device Tree Source for the Porter board |
||||
* |
||||
* Copyright (C) 2015 Cogent Embedded, Inc. |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0 |
||||
*/ |
||||
|
||||
/* |
||||
* SSI-AK4642 |
||||
* |
||||
* JP3: 2-1: AK4642 |
||||
* 2-3: ADV7511 |
||||
* |
||||
* This command is required before playback/capture: |
||||
* |
||||
* amixer set "LINEOUT Mixer DACL" on |
||||
*/ |
||||
|
||||
/dts-v1/; |
||||
#include "r8a7791.dtsi" |
||||
#include <dt-bindings/gpio/gpio.h> |
||||
|
||||
/ { |
||||
model = "Porter"; |
||||
compatible = "renesas,porter", "renesas,r8a7791"; |
||||
|
||||
aliases { |
||||
serial0 = &scif0; |
||||
}; |
||||
|
||||
chosen { |
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; |
||||
stdout-path = "serial0:115200n8"; |
||||
}; |
||||
|
||||
memory@40000000 { |
||||
device_type = "memory"; |
||||
reg = <0 0x40000000 0 0x40000000>; |
||||
}; |
||||
|
||||
memory@200000000 { |
||||
device_type = "memory"; |
||||
reg = <2 0x00000000 0 0x40000000>; |
||||
}; |
||||
|
||||
vcc_sdhi0: regulator-vcc-sdhi0 { |
||||
compatible = "regulator-fixed"; |
||||
|
||||
regulator-name = "SDHI0 Vcc"; |
||||
regulator-min-microvolt = <3300000>; |
||||
regulator-max-microvolt = <3300000>; |
||||
regulator-always-on; |
||||
}; |
||||
|
||||
vccq_sdhi0: regulator-vccq-sdhi0 { |
||||
compatible = "regulator-gpio"; |
||||
|
||||
regulator-name = "SDHI0 VccQ"; |
||||
regulator-min-microvolt = <1800000>; |
||||
regulator-max-microvolt = <3300000>; |
||||
|
||||
gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; |
||||
gpios-states = <1>; |
||||
states = <3300000 1 |
||||
1800000 0>; |
||||
}; |
||||
|
||||
vcc_sdhi2: regulator-vcc-sdhi2 { |
||||
compatible = "regulator-fixed"; |
||||
|
||||
regulator-name = "SDHI2 Vcc"; |
||||
regulator-min-microvolt = <3300000>; |
||||
regulator-max-microvolt = <3300000>; |
||||
regulator-always-on; |
||||
}; |
||||
|
||||
vccq_sdhi2: regulator-vccq-sdhi2 { |
||||
compatible = "regulator-gpio"; |
||||
|
||||
regulator-name = "SDHI2 VccQ"; |
||||
regulator-min-microvolt = <1800000>; |
||||
regulator-max-microvolt = <3300000>; |
||||
|
||||
gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; |
||||
gpios-states = <1>; |
||||
states = <3300000 1 |
||||
1800000 0>; |
||||
}; |
||||
|
||||
hdmi-out { |
||||
compatible = "hdmi-connector"; |
||||
type = "a"; |
||||
|
||||
port { |
||||
hdmi_con: endpoint { |
||||
remote-endpoint = <&adv7511_out>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
x3_clk: x3-clock { |
||||
compatible = "fixed-clock"; |
||||
#clock-cells = <0>; |
||||
clock-frequency = <148500000>; |
||||
}; |
||||
|
||||
x16_clk: x16-clock { |
||||
compatible = "fixed-clock"; |
||||
#clock-cells = <0>; |
||||
clock-frequency = <74250000>; |
||||
}; |
||||
|
||||
x14_clk: audio_clock { |
||||
compatible = "fixed-clock"; |
||||
#clock-cells = <0>; |
||||
clock-frequency = <11289600>; |
||||
}; |
||||
|
||||
sound { |
||||
compatible = "simple-audio-card"; |
||||
|
||||
simple-audio-card,format = "left_j"; |
||||
simple-audio-card,bitclock-master = <&soundcodec>; |
||||
simple-audio-card,frame-master = <&soundcodec>; |
||||
|
||||
simple-audio-card,cpu { |
||||
sound-dai = <&rcar_sound>; |
||||
}; |
||||
|
||||
soundcodec: simple-audio-card,codec { |
||||
sound-dai = <&ak4642>; |
||||
clocks = <&x14_clk>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
&extal_clk { |
||||
clock-frequency = <20000000>; |
||||
}; |
||||
|
||||
&pfc { |
||||
scif0_pins: scif0 { |
||||
groups = "scif0_data_d"; |
||||
function = "scif0"; |
||||
}; |
||||
|
||||
ether_pins: ether { |
||||
groups = "eth_link", "eth_mdio", "eth_rmii"; |
||||
function = "eth"; |
||||
}; |
||||
|
||||
phy1_pins: phy1 { |
||||
groups = "intc_irq0"; |
||||
function = "intc"; |
||||
}; |
||||
|
||||
sdhi0_pins: sd0 { |
||||
groups = "sdhi0_data4", "sdhi0_ctrl"; |
||||
function = "sdhi0"; |
||||
}; |
||||
|
||||
sdhi2_pins: sd2 { |
||||
groups = "sdhi2_data4", "sdhi2_ctrl"; |
||||
function = "sdhi2"; |
||||
}; |
||||
|
||||
qspi_pins: qspi { |
||||
groups = "qspi_ctrl", "qspi_data4"; |
||||
function = "qspi"; |
||||
}; |
||||
|
||||
i2c2_pins: i2c2 { |
||||
groups = "i2c2"; |
||||
function = "i2c2"; |
||||
}; |
||||
|
||||
usb0_pins: usb0 { |
||||
groups = "usb0"; |
||||
function = "usb0"; |
||||
}; |
||||
|
||||
usb1_pins: usb1 { |
||||
groups = "usb1"; |
||||
function = "usb1"; |
||||
}; |
||||
|
||||
vin0_pins: vin0 { |
||||
groups = "vin0_data8", "vin0_clk"; |
||||
function = "vin0"; |
||||
}; |
||||
|
||||
can0_pins: can0 { |
||||
groups = "can0_data"; |
||||
function = "can0"; |
||||
}; |
||||
|
||||
du_pins: du { |
||||
groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0"; |
||||
function = "du"; |
||||
}; |
||||
|
||||
ssi_pins: sound { |
||||
groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data"; |
||||
function = "ssi"; |
||||
}; |
||||
|
||||
audio_clk_pins: audio_clk { |
||||
groups = "audio_clk_a"; |
||||
function = "audio_clk"; |
||||
}; |
||||
}; |
||||
|
||||
&scif0 { |
||||
pinctrl-0 = <&scif0_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
status = "okay"; |
||||
}; |
||||
|
||||
ðer { |
||||
pinctrl-0 = <ðer_pins &phy1_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
phy-handle = <&phy1>; |
||||
renesas,ether-link-active-low; |
||||
status = "okay"; |
||||
|
||||
phy1: ethernet-phy@1 { |
||||
reg = <1>; |
||||
interrupt-parent = <&irqc0>; |
||||
interrupts = <0 IRQ_TYPE_LEVEL_LOW>; |
||||
micrel,led-mode = <1>; |
||||
}; |
||||
}; |
||||
|
||||
&sdhi0 { |
||||
pinctrl-0 = <&sdhi0_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
vmmc-supply = <&vcc_sdhi0>; |
||||
vqmmc-supply = <&vccq_sdhi0>; |
||||
cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; |
||||
wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; |
||||
status = "okay"; |
||||
}; |
||||
|
||||
&sdhi2 { |
||||
pinctrl-0 = <&sdhi2_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
vmmc-supply = <&vcc_sdhi2>; |
||||
vqmmc-supply = <&vccq_sdhi2>; |
||||
cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>; |
||||
status = "okay"; |
||||
}; |
||||
|
||||
&qspi { |
||||
pinctrl-0 = <&qspi_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
status = "okay"; |
||||
|
||||
flash@0 { |
||||
compatible = "spansion,s25fl512s", "jedec,spi-nor"; |
||||
reg = <0>; |
||||
spi-max-frequency = <30000000>; |
||||
spi-tx-bus-width = <4>; |
||||
spi-rx-bus-width = <4>; |
||||
m25p,fast-read; |
||||
|
||||
partitions { |
||||
compatible = "fixed-partitions"; |
||||
#address-cells = <1>; |
||||
#size-cells = <1>; |
||||
|
||||
partition@0 { |
||||
label = "loader_prg"; |
||||
reg = <0x00000000 0x00040000>; |
||||
read-only; |
||||
}; |
||||
partition@40000 { |
||||
label = "user_prg"; |
||||
reg = <0x00040000 0x00400000>; |
||||
read-only; |
||||
}; |
||||
partition@440000 { |
||||
label = "flash_fs"; |
||||
reg = <0x00440000 0x03bc0000>; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
&i2c2 { |
||||
pinctrl-0 = <&i2c2_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
status = "okay"; |
||||
clock-frequency = <400000>; |
||||
|
||||
ak4642: codec@12 { |
||||
compatible = "asahi-kasei,ak4642"; |
||||
#sound-dai-cells = <0>; |
||||
reg = <0x12>; |
||||
}; |
||||
|
||||
composite-in@20 { |
||||
compatible = "adi,adv7180"; |
||||
reg = <0x20>; |
||||
remote = <&vin0>; |
||||
|
||||
port { |
||||
adv7180: endpoint { |
||||
bus-width = <8>; |
||||
remote-endpoint = <&vin0ep>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
hdmi@39 { |
||||
compatible = "adi,adv7511w"; |
||||
reg = <0x39>; |
||||
interrupt-parent = <&gpio3>; |
||||
interrupts = <29 IRQ_TYPE_LEVEL_LOW>; |
||||
|
||||
adi,input-depth = <8>; |
||||
adi,input-colorspace = "rgb"; |
||||
adi,input-clock = "1x"; |
||||
adi,input-style = <1>; |
||||
adi,input-justification = "evenly"; |
||||
|
||||
ports { |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
|
||||
port@0 { |
||||
reg = <0>; |
||||
adv7511_in: endpoint { |
||||
remote-endpoint = <&du_out_rgb>; |
||||
}; |
||||
}; |
||||
|
||||
port@1 { |
||||
reg = <1>; |
||||
adv7511_out: endpoint { |
||||
remote-endpoint = <&hdmi_con>; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
&sata0 { |
||||
status = "okay"; |
||||
}; |
||||
|
||||
/* composite video input */ |
||||
&vin0 { |
||||
status = "okay"; |
||||
pinctrl-0 = <&vin0_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
port { |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
|
||||
vin0ep: endpoint { |
||||
remote-endpoint = <&adv7180>; |
||||
bus-width = <8>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
&pci0 { |
||||
pinctrl-0 = <&usb0_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
status = "okay"; |
||||
}; |
||||
|
||||
&pci1 { |
||||
pinctrl-0 = <&usb1_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
status = "okay"; |
||||
}; |
||||
|
||||
&hsusb { |
||||
pinctrl-0 = <&usb0_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
status = "okay"; |
||||
}; |
||||
|
||||
&usbphy { |
||||
status = "okay"; |
||||
}; |
||||
|
||||
&pcie_bus_clk { |
||||
clock-frequency = <100000000>; |
||||
}; |
||||
|
||||
&pciec { |
||||
status = "okay"; |
||||
}; |
||||
|
||||
&can0 { |
||||
pinctrl-0 = <&can0_pins>; |
||||
pinctrl-names = "default"; |
||||
|
||||
status = "okay"; |
||||
}; |
||||
|
||||
&du { |
||||
pinctrl-0 = <&du_pins>; |
||||
pinctrl-names = "default"; |
||||
status = "okay"; |
||||
|
||||
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 726>, |
||||
<&x3_clk>, <&x16_clk>; |
||||
clock-names = "du.0", "du.1", "lvds.0", |
||||
"dclkin.0", "dclkin.1"; |
||||
|
||||
ports { |
||||
port@1 { |
||||
endpoint { |
||||
remote-endpoint = <&adv7511_in>; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
&rcar_sound { |
||||
pinctrl-0 = <&ssi_pins &audio_clk_pins>; |
||||
pinctrl-names = "default"; |
||||
status = "okay"; |
||||
|
||||
/* Single DAI */ |
||||
#sound-dai-cells = <0>; |
||||
|
||||
rcar_sound,dai { |
||||
dai0 { |
||||
playback = <&ssi0>; |
||||
capture = <&ssi1>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
&ssi1 { |
||||
shared-pin; |
||||
}; |
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,165 @@ |
||||
/*
|
||||
* Copyright 2013 Ideas On Board SPRL |
||||
* |
||||
* This program is free software; you can redistribute it and/or modify |
||||
* it under the terms of the GNU General Public License as published by |
||||
* the Free Software Foundation; either version 2 of the License, or |
||||
* (at your option) any later version. |
||||
*/ |
||||
|
||||
#ifndef __DT_BINDINGS_CLOCK_R8A7791_H__ |
||||
#define __DT_BINDINGS_CLOCK_R8A7791_H__ |
||||
|
||||
/* CPG */ |
||||
#define R8A7791_CLK_MAIN 0 |
||||
#define R8A7791_CLK_PLL0 1 |
||||
#define R8A7791_CLK_PLL1 2 |
||||
#define R8A7791_CLK_PLL3 3 |
||||
#define R8A7791_CLK_LB 4 |
||||
#define R8A7791_CLK_QSPI 5 |
||||
#define R8A7791_CLK_SDH 6 |
||||
#define R8A7791_CLK_SD0 7 |
||||
#define R8A7791_CLK_Z 8 |
||||
#define R8A7791_CLK_RCAN 9 |
||||
#define R8A7791_CLK_ADSP 10 |
||||
|
||||
/* MSTP0 */ |
||||
#define R8A7791_CLK_MSIOF0 0 |
||||
|
||||
/* MSTP1 */ |
||||
#define R8A7791_CLK_VCP0 1 |
||||
#define R8A7791_CLK_VPC0 3 |
||||
#define R8A7791_CLK_JPU 6 |
||||
#define R8A7791_CLK_SSP1 9 |
||||
#define R8A7791_CLK_TMU1 11 |
||||
#define R8A7791_CLK_3DG 12 |
||||
#define R8A7791_CLK_2DDMAC 15 |
||||
#define R8A7791_CLK_FDP1_1 18 |
||||
#define R8A7791_CLK_FDP1_0 19 |
||||
#define R8A7791_CLK_TMU3 21 |
||||
#define R8A7791_CLK_TMU2 22 |
||||
#define R8A7791_CLK_CMT0 24 |
||||
#define R8A7791_CLK_TMU0 25 |
||||
#define R8A7791_CLK_VSP1_DU1 27 |
||||
#define R8A7791_CLK_VSP1_DU0 28 |
||||
#define R8A7791_CLK_VSP1_S 31 |
||||
|
||||
/* MSTP2 */ |
||||
#define R8A7791_CLK_SCIFA2 2 |
||||
#define R8A7791_CLK_SCIFA1 3 |
||||
#define R8A7791_CLK_SCIFA0 4 |
||||
#define R8A7791_CLK_MSIOF2 5 |
||||
#define R8A7791_CLK_SCIFB0 6 |
||||
#define R8A7791_CLK_SCIFB1 7 |
||||
#define R8A7791_CLK_MSIOF1 8 |
||||
#define R8A7791_CLK_SCIFB2 16 |
||||
#define R8A7791_CLK_SYS_DMAC1 18 |
||||
#define R8A7791_CLK_SYS_DMAC0 19 |
||||
|
||||
/* MSTP3 */ |
||||
#define R8A7791_CLK_TPU0 4 |
||||
#define R8A7791_CLK_SDHI2 11 |
||||
#define R8A7791_CLK_SDHI1 12 |
||||
#define R8A7791_CLK_SDHI0 14 |
||||
#define R8A7791_CLK_MMCIF0 15 |
||||
#define R8A7791_CLK_IIC0 18 |
||||
#define R8A7791_CLK_PCIEC 19 |
||||
#define R8A7791_CLK_IIC1 23 |
||||
#define R8A7791_CLK_SSUSB 28 |
||||
#define R8A7791_CLK_CMT1 29 |
||||
#define R8A7791_CLK_USBDMAC0 30 |
||||
#define R8A7791_CLK_USBDMAC1 31 |
||||
|
||||
/* MSTP4 */ |
||||
#define R8A7791_CLK_IRQC 7 |
||||
#define R8A7791_CLK_INTC_SYS 8 |
||||
|
||||
/* MSTP5 */ |
||||
#define R8A7791_CLK_AUDIO_DMAC1 1 |
||||
#define R8A7791_CLK_AUDIO_DMAC0 2 |
||||
#define R8A7791_CLK_ADSP_MOD 6 |
||||
#define R8A7791_CLK_THERMAL 22 |
||||
#define R8A7791_CLK_PWM 23 |
||||
|
||||
/* MSTP7 */ |
||||
#define R8A7791_CLK_EHCI 3 |
||||
#define R8A7791_CLK_HSUSB 4 |
||||
#define R8A7791_CLK_HSCIF2 13 |
||||
#define R8A7791_CLK_SCIF5 14 |
||||
#define R8A7791_CLK_SCIF4 15 |
||||
#define R8A7791_CLK_HSCIF1 16 |
||||
#define R8A7791_CLK_HSCIF0 17 |
||||
#define R8A7791_CLK_SCIF3 18 |
||||
#define R8A7791_CLK_SCIF2 19 |
||||
#define R8A7791_CLK_SCIF1 20 |
||||
#define R8A7791_CLK_SCIF0 21 |
||||
#define R8A7791_CLK_DU1 23 |
||||
#define R8A7791_CLK_DU0 24 |
||||
#define R8A7791_CLK_LVDS0 26 |
||||
|
||||
/* MSTP8 */ |
||||
#define R8A7791_CLK_IPMMU_SGX 0 |
||||
#define R8A7791_CLK_MLB 2 |
||||
#define R8A7791_CLK_VIN2 9 |
||||
#define R8A7791_CLK_VIN1 10 |
||||
#define R8A7791_CLK_VIN0 11 |
||||
#define R8A7791_CLK_ETHERAVB 12 |
||||
#define R8A7791_CLK_ETHER 13 |
||||
#define R8A7791_CLK_SATA1 14 |
||||
#define R8A7791_CLK_SATA0 15 |
||||
|
||||
/* MSTP9 */ |
||||
#define R8A7791_CLK_GYROADC 1 |
||||
#define R8A7791_CLK_GPIO7 4 |
||||
#define R8A7791_CLK_GPIO6 5 |
||||
#define R8A7791_CLK_GPIO5 7 |
||||
#define R8A7791_CLK_GPIO4 8 |
||||
#define R8A7791_CLK_GPIO3 9 |
||||
#define R8A7791_CLK_GPIO2 10 |
||||
#define R8A7791_CLK_GPIO1 11 |
||||
#define R8A7791_CLK_GPIO0 12 |
||||
#define R8A7791_CLK_RCAN1 15 |
||||
#define R8A7791_CLK_RCAN0 16 |
||||
#define R8A7791_CLK_QSPI_MOD 17 |
||||
#define R8A7791_CLK_I2C5 25 |
||||
#define R8A7791_CLK_IICDVFS 26 |
||||
#define R8A7791_CLK_I2C4 27 |
||||
#define R8A7791_CLK_I2C3 28 |
||||
#define R8A7791_CLK_I2C2 29 |
||||
#define R8A7791_CLK_I2C1 30 |
||||
#define R8A7791_CLK_I2C0 31 |
||||
|
||||
/* MSTP10 */ |
||||
#define R8A7791_CLK_SSI_ALL 5 |
||||
#define R8A7791_CLK_SSI9 6 |
||||
#define R8A7791_CLK_SSI8 7 |
||||
#define R8A7791_CLK_SSI7 8 |
||||
#define R8A7791_CLK_SSI6 9 |
||||
#define R8A7791_CLK_SSI5 10 |
||||
#define R8A7791_CLK_SSI4 11 |
||||
#define R8A7791_CLK_SSI3 12 |
||||
#define R8A7791_CLK_SSI2 13 |
||||
#define R8A7791_CLK_SSI1 14 |
||||
#define R8A7791_CLK_SSI0 15 |
||||
#define R8A7791_CLK_SCU_ALL 17 |
||||
#define R8A7791_CLK_SCU_DVC1 18 |
||||
#define R8A7791_CLK_SCU_DVC0 19 |
||||
#define R8A7791_CLK_SCU_CTU1_MIX1 20 |
||||
#define R8A7791_CLK_SCU_CTU0_MIX0 21 |
||||
#define R8A7791_CLK_SCU_SRC9 22 |
||||
#define R8A7791_CLK_SCU_SRC8 23 |
||||
#define R8A7791_CLK_SCU_SRC7 24 |
||||
#define R8A7791_CLK_SCU_SRC6 25 |
||||
#define R8A7791_CLK_SCU_SRC5 26 |
||||
#define R8A7791_CLK_SCU_SRC4 27 |
||||
#define R8A7791_CLK_SCU_SRC3 28 |
||||
#define R8A7791_CLK_SCU_SRC2 29 |
||||
#define R8A7791_CLK_SCU_SRC1 30 |
||||
#define R8A7791_CLK_SCU_SRC0 31 |
||||
|
||||
/* MSTP11 */ |
||||
#define R8A7791_CLK_SCIFA3 6 |
||||
#define R8A7791_CLK_SCIFA4 7 |
||||
#define R8A7791_CLK_SCIFA5 8 |
||||
|
||||
#endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */ |
||||
@ -0,0 +1,48 @@ |
||||
/*
|
||||
* Copyright (C) 2015 Renesas Electronics Corp. |
||||
* |
||||
* This program is free software; you can redistribute it and/or modify |
||||
* it under the terms of the GNU General Public License as published by |
||||
* the Free Software Foundation; either version 2 of the License, or |
||||
* (at your option) any later version. |
||||
*/ |
||||
|
||||
#ifndef __DT_BINDINGS_CLOCK_R8A7791_CPG_MSSR_H__ |
||||
#define __DT_BINDINGS_CLOCK_R8A7791_CPG_MSSR_H__ |
||||
|
||||
#include <dt-bindings/clock/renesas-cpg-mssr.h> |
||||
|
||||
/* r8a7791 CPG Core Clocks */ |
||||
#define R8A7791_CLK_Z 0 |
||||
#define R8A7791_CLK_ZG 1 |
||||
#define R8A7791_CLK_ZTR 2 |
||||
#define R8A7791_CLK_ZTRD2 3 |
||||
#define R8A7791_CLK_ZT 4 |
||||
#define R8A7791_CLK_ZX 5 |
||||
#define R8A7791_CLK_ZS 6 |
||||
#define R8A7791_CLK_HP 7 |
||||
#define R8A7791_CLK_I 8 |
||||
#define R8A7791_CLK_B 9 |
||||
#define R8A7791_CLK_LB 10 |
||||
#define R8A7791_CLK_P 11 |
||||
#define R8A7791_CLK_CL 12 |
||||
#define R8A7791_CLK_M2 13 |
||||
#define R8A7791_CLK_ADSP 14 |
||||
#define R8A7791_CLK_ZB3 15 |
||||
#define R8A7791_CLK_ZB3D2 16 |
||||
#define R8A7791_CLK_DDR 17 |
||||
#define R8A7791_CLK_SDH 18 |
||||
#define R8A7791_CLK_SD0 19 |
||||
#define R8A7791_CLK_SD2 20 |
||||
#define R8A7791_CLK_SD3 21 |
||||
#define R8A7791_CLK_MMC0 22 |
||||
#define R8A7791_CLK_MP 23 |
||||
#define R8A7791_CLK_SSP 24 |
||||
#define R8A7791_CLK_SSPRS 25 |
||||
#define R8A7791_CLK_QSPI 26 |
||||
#define R8A7791_CLK_CP 27 |
||||
#define R8A7791_CLK_RCAN 28 |
||||
#define R8A7791_CLK_R 29 |
||||
#define R8A7791_CLK_OSC 30 |
||||
|
||||
#endif /* __DT_BINDINGS_CLOCK_R8A7791_CPG_MSSR_H__ */ |
||||
@ -0,0 +1,26 @@ |
||||
/*
|
||||
* Copyright (C) 2016 Glider bvba |
||||
* |
||||
* This program is free software; you can redistribute it and/or modify |
||||
* it under the terms of the GNU General Public License as published by |
||||
* the Free Software Foundation; version 2 of the License. |
||||
*/ |
||||
#ifndef __DT_BINDINGS_POWER_R8A7791_SYSC_H__ |
||||
#define __DT_BINDINGS_POWER_R8A7791_SYSC_H__ |
||||
|
||||
/*
|
||||
* These power domain indices match the numbers of the interrupt bits |
||||
* representing the power areas in the various Interrupt Registers |
||||
* (e.g. SYSCISR, Interrupt Status Register) |
||||
*/ |
||||
|
||||
#define R8A7791_PD_CA15_CPU0 0 |
||||
#define R8A7791_PD_CA15_CPU1 1 |
||||
#define R8A7791_PD_CA15_SCU 12 |
||||
#define R8A7791_PD_SH_4A 16 |
||||
#define R8A7791_PD_SGX 20 |
||||
|
||||
/* Always-on power area */ |
||||
#define R8A7791_PD_ALWAYS_ON 32 |
||||
|
||||
#endif /* __DT_BINDINGS_POWER_R8A7791_SYSC_H__ */ |
||||
Loading…
Reference in new issue