dma: keystone_nav: move keystone_nav driver to driver/dma/

The keystone_nav is used by drivers/net/keystone_net.c driver to
send and receive packets, but currently it's placed at keystone
arch sources. So it should be in the drivers directory also.
It's separate driver that can be used for sending and receiving
pktdma packets by others drivers also.

This patch just move this driver to appropriate directory and
doesn't add any functional changes.

Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
master
Khoronzhuk, Ivan 10 years ago committed by Tom Rini
parent ed948e2959
commit ef4547176d
  1. 1
      arch/arm/cpu/armv7/keystone/Makefile
  2. 0
      arch/arm/include/asm/ti-common/keystone_nav.h
  3. 1
      drivers/dma/Makefile
  4. 54
      drivers/dma/keystone_nav.c
  5. 2
      drivers/net/keystone_net.c
  6. 1
      include/configs/k2hk_evm.h
  7. 29
      include/configs/ks2_evm.h

@ -12,7 +12,6 @@ obj-$(CONFIG_SOC_K2HK) += clock-k2hk.o
obj-$(CONFIG_SOC_K2E) += clock-k2e.o
obj-y += cmd_clock.o
obj-y += cmd_mon.o
obj-$(CONFIG_DRIVER_TI_KEYSTONE_NET) += keystone_nav.o
obj-y += msmc.o
obj-$(CONFIG_SPL_BUILD) += spl.o
obj-y += ddr3.o

@ -8,3 +8,4 @@
obj-$(CONFIG_FSLDMAFEC) += MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o
obj-$(CONFIG_APBH_DMA) += apbh_dma.o
obj-$(CONFIG_FSL_DMA) += fsl_dma.o
obj-$(CONFIG_TI_KSNAV) += keystone_nav.o

@ -8,23 +8,23 @@
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/keystone_nav.h>
#include <asm/ti-common/keystone_nav.h>
struct qm_config qm_memmap = {
.stat_cfg = KS2_QM_QUEUE_STATUS_BASE,
.queue = (void *)KS2_QM_MANAGER_QUEUES_BASE,
.mngr_vbusm = KS2_QM_BASE_ADDRESS,
.i_lram = KS2_QM_LINK_RAM_BASE,
.proxy = (void *)KS2_QM_MANAGER_Q_PROXY_BASE,
.status_ram = KS2_QM_STATUS_RAM_BASE,
.mngr_cfg = (void *)KS2_QM_CONF_BASE,
.intd_cfg = KS2_QM_INTD_CONF_BASE,
.desc_mem = (void *)KS2_QM_DESC_SETUP_BASE,
.region_num = KS2_QM_REGION_NUM,
.pdsp_cmd = KS2_QM_PDSP1_CMD_BASE,
.pdsp_ctl = KS2_QM_PDSP1_CTRL_BASE,
.pdsp_iram = KS2_QM_PDSP1_IRAM_BASE,
.qpool_num = KS2_QM_QPOOL_NUM,
.stat_cfg = CONFIG_KSNAV_QM_QUEUE_STATUS_BASE,
.queue = (void *)CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE,
.mngr_vbusm = CONFIG_KSNAV_QM_BASE_ADDRESS,
.i_lram = CONFIG_KSNAV_QM_LINK_RAM_BASE,
.proxy = (void *)CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE,
.status_ram = CONFIG_KSNAV_QM_STATUS_RAM_BASE,
.mngr_cfg = (void *)CONFIG_KSNAV_QM_CONF_BASE,
.intd_cfg = CONFIG_KSNAV_QM_INTD_CONF_BASE,
.desc_mem = (void *)CONFIG_KSNAV_QM_DESC_SETUP_BASE,
.region_num = CONFIG_KSNAV_QM_REGION_NUM,
.pdsp_cmd = CONFIG_KSNAV_QM_PDSP1_CMD_BASE,
.pdsp_ctl = CONFIG_KSNAV_QM_PDSP1_CTRL_BASE,
.pdsp_iram = CONFIG_KSNAV_QM_PDSP1_IRAM_BASE,
.qpool_num = CONFIG_KSNAV_QM_QPOOL_NUM,
};
/*
@ -157,17 +157,17 @@ void queue_close(u32 qnum)
* DMA API
*/
struct pktdma_cfg netcp_pktdma = {
.global = (void *)KS2_NETCP_PDMA_CTRL_BASE,
.tx_ch = (void *)KS2_NETCP_PDMA_TX_BASE,
.tx_ch_num = KS2_NETCP_PDMA_TX_CH_NUM,
.rx_ch = (void *)KS2_NETCP_PDMA_RX_BASE,
.rx_ch_num = KS2_NETCP_PDMA_RX_CH_NUM,
.tx_sched = (u32 *)KS2_NETCP_PDMA_SCHED_BASE,
.rx_flows = (void *)KS2_NETCP_PDMA_RX_FLOW_BASE,
.rx_flow_num = KS2_NETCP_PDMA_RX_FLOW_NUM,
.rx_free_q = KS2_NETCP_PDMA_RX_FREE_QUEUE,
.rx_rcv_q = KS2_NETCP_PDMA_RX_RCV_QUEUE,
.tx_snd_q = KS2_NETCP_PDMA_TX_SND_QUEUE,
.global = (void *)CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE,
.tx_ch = (void *)CONFIG_KSNAV_NETCP_PDMA_TX_BASE,
.tx_ch_num = CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM,
.rx_ch = (void *)CONFIG_KSNAV_NETCP_PDMA_RX_BASE,
.rx_ch_num = CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM,
.tx_sched = (u32 *)CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE,
.rx_flows = (void *)CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE,
.rx_flow_num = CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM,
.rx_free_q = CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE,
.rx_rcv_q = CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE,
.tx_snd_q = CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE,
};
struct pktdma_cfg *netcp;
@ -281,7 +281,7 @@ static int _netcp_init(struct pktdma_cfg *netcp_cfg,
writel(0, &netcp->global->emulation_control);
/* Set QM base address, only for K2x devices */
writel(KS2_QM_BASE_ADDRESS, &netcp->global->qm_base_addr[0]);
writel(CONFIG_KSNAV_QM_BASE_ADDRESS, &netcp->global->qm_base_addr[0]);
/* Enable all channels. The current state isn't important */
for (j = 0; j < netcp->tx_ch_num; j++) {

@ -14,7 +14,7 @@
#include <malloc.h>
#include <asm/arch/emac_defs.h>
#include <asm/arch/psc_defs.h>
#include <asm/arch/keystone_nav.h>
#include <asm/ti-common/keystone_nav.h>
unsigned int emac_dbg;

@ -36,5 +36,6 @@
/* Network */
#define CONFIG_DRIVER_TI_KEYSTONE_NET
#define CONFIG_TI_KSNAV
#endif /* __CONFIG_K2HK_EVM_H */

@ -104,6 +104,35 @@
#define CONFIG_SYS_SGMII_LINERATE_MHZ 1250
#define CONFIG_SYS_SGMII_RATESCALE 2
/* Keyston Navigator Configuration */
#define CONFIG_KSNAV_QM_BASE_ADDRESS KS2_QM_BASE_ADDRESS
#define CONFIG_KSNAV_QM_CONF_BASE KS2_QM_CONF_BASE
#define CONFIG_KSNAV_QM_DESC_SETUP_BASE KS2_QM_DESC_SETUP_BASE
#define CONFIG_KSNAV_QM_STATUS_RAM_BASE KS2_QM_STATUS_RAM_BASE
#define CONFIG_KSNAV_QM_INTD_CONF_BASE KS2_QM_INTD_CONF_BASE
#define CONFIG_KSNAV_QM_PDSP1_CMD_BASE KS2_QM_PDSP1_CMD_BASE
#define CONFIG_KSNAV_QM_PDSP1_CTRL_BASE KS2_QM_PDSP1_CTRL_BASE
#define CONFIG_KSNAV_QM_PDSP1_IRAM_BASE KS2_QM_PDSP1_IRAM_BASE
#define CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE KS2_QM_MANAGER_QUEUES_BASE
#define CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE KS2_QM_MANAGER_Q_PROXY_BASE
#define CONFIG_KSNAV_QM_QUEUE_STATUS_BASE KS2_QM_QUEUE_STATUS_BASE
#define CONFIG_KSNAV_QM_LINK_RAM_BASE KS2_QM_LINK_RAM_BASE
#define CONFIG_KSNAV_QM_REGION_NUM KS2_QM_REGION_NUM
#define CONFIG_KSNAV_QM_QPOOL_NUM KS2_QM_QPOOL_NUM
/* NETCP pktdma */
#define CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE KS2_NETCP_PDMA_CTRL_BASE
#define CONFIG_KSNAV_NETCP_PDMA_TX_BASE KS2_NETCP_PDMA_TX_BASE
#define CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM KS2_NETCP_PDMA_TX_CH_NUM
#define CONFIG_KSNAV_NETCP_PDMA_RX_BASE KS2_NETCP_PDMA_RX_BASE
#define CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM KS2_NETCP_PDMA_RX_CH_NUM
#define CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE KS2_NETCP_PDMA_SCHED_BASE
#define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE KS2_NETCP_PDMA_RX_FLOW_BASE
#define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM KS2_NETCP_PDMA_RX_FLOW_NUM
#define CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE KS2_NETCP_PDMA_RX_FREE_QUEUE
#define CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE KS2_NETCP_PDMA_RX_RCV_QUEUE
#define CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE KS2_NETCP_PDMA_TX_SND_QUEUE
/* AEMIF */
#define CONFIG_TI_AEMIF
#define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE

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