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@ -315,9 +315,9 @@ static void axiemac_halt(struct eth_device *dev) |
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debug("axiemac: Halted\n"); |
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} |
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static int axi_ethernet_init(struct eth_device *dev) |
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static int axi_ethernet_init(struct axidma_priv *priv) |
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{ |
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struct axi_regs *regs = (struct axi_regs *)dev->iobase; |
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struct axi_regs *regs = priv->iobase; |
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u32 timeout = 200; |
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/*
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@ -374,9 +374,8 @@ static int axiemac_setup_mac(struct eth_device *dev) |
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} |
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/* Reset DMA engine */ |
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static void axi_dma_init(struct eth_device *dev) |
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static void axi_dma_init(struct axidma_priv *priv) |
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{ |
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struct axidma_priv *priv = dev->priv; |
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u32 timeout = 500; |
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/* Reset the engine so the hardware starts from a known state */ |
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@ -410,10 +409,10 @@ static int axiemac_init(struct eth_device *dev, bd_t * bis) |
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* reset, and since AXIDMA reset line is connected to AxiEthernet, this |
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* would ensure a reset of AxiEthernet. |
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*/ |
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axi_dma_init(dev); |
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axi_dma_init(priv); |
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/* Initialize AxiEthernet hardware. */ |
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if (axi_ethernet_init(dev)) |
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if (axi_ethernet_init(priv)) |
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return -1; |
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/* Disable all RX interrupts before RxBD space setup */ |
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@ -511,10 +510,9 @@ static int axiemac_send(struct eth_device *dev, void *ptr, int len) |
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return 0; |
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} |
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static int isrxready(struct eth_device *dev) |
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static int isrxready(struct axidma_priv *priv) |
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{ |
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u32 status; |
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struct axidma_priv *priv = dev->priv; |
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/* Read pending interrupts */ |
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status = in_be32(&priv->dmarx->status); |
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@ -539,7 +537,7 @@ static int axiemac_recv(struct eth_device *dev) |
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u32 temp; |
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/* Wait for an incoming packet */ |
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if (!isrxready(dev)) |
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if (!isrxready(priv)) |
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return 0; |
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debug("axiemac: RX data ready\n"); |
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