The Xilinx FPGA must be reconfigured each time the unit reboots. The FPGA is connected to the GPIO pin 39 from kirkwood. This patch triggers this pin for km_kirkwood_pci targets. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>master
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