spi, atmel: move CONFIG_SYS_SPI_WRITE_TOUT into common header

move CONFIG_SYS_SPI_WRITE_TOUT into drivers/spi/atmel_spi.h
and define a default value. Delete this define in the board
config files, where it is possible (all boards use currently
the same value).

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
master
Heiko Schocher 10 years ago committed by Tom Rini
parent c001486d99
commit f11dea4f3d
  1. 4
      drivers/spi/atmel_spi.h
  2. 1
      include/configs/afeb9260.h
  3. 1
      include/configs/at91sam9260ek.h
  4. 1
      include/configs/at91sam9261ek.h
  5. 1
      include/configs/at91sam9263ek.h
  6. 1
      include/configs/at91sam9rlek.h
  7. 1
      include/configs/ethernut5.h
  8. 1
      include/configs/meesc.h
  9. 1
      include/configs/otc570.h
  10. 1
      include/configs/pm9261.h
  11. 1
      include/configs/pm9263.h
  12. 1
      include/configs/sbc35_a9g20.h
  13. 1
      include/configs/tny_a9260.h
  14. 1
      include/configs/usb_a9263.h

@ -94,3 +94,7 @@ static inline struct atmel_spi_slave *to_atmel_spi(struct spi_slave *slave)
readl(as->regs + ATMEL_SPI_##reg)
#define spi_writel(as, reg, value) \
writel(value, as->regs + ATMEL_SPI_##reg)
#if !defined(CONFIG_SYS_SPI_WRITE_TOUT)
#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
#endif

@ -77,7 +77,6 @@
/* DataFlash */
#define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH
#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */

@ -137,7 +137,6 @@
#ifndef CONFIG_AT91SAM9G20EK_2MMC
#define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH 1
#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */

@ -109,7 +109,6 @@
/* DataFlash */
#define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH
#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */

@ -119,7 +119,6 @@
/* DataFlash */
#define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH 1
#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
#define AT91_SPI_CLK 15000000

@ -100,7 +100,6 @@
/* DataFlash */
#define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH 1
#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
#define AT91_SPI_CLK 15000000

@ -78,7 +78,6 @@
/* SPI */
#define CONFIG_ATMEL_SPI
#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
#define AT91_SPI_CLK 15000000
/* Serial port */

@ -124,7 +124,6 @@
#ifdef CONFIG_SYS_USE_DATAFLASH
# define CONFIG_ATMEL_DATAFLASH_SPI
# define CONFIG_HAS_DATAFLASH
# define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
# define AT91_SPI_CLK 15000000

@ -174,7 +174,6 @@
#ifdef CONFIG_SYS_USE_DATAFLASH
# define CONFIG_ATMEL_DATAFLASH_SPI
# define CONFIG_HAS_DATAFLASH
# define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
# define AT91_SPI_CLK 15000000

@ -202,7 +202,6 @@
/* DataFlash */
#define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH
#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */

@ -216,7 +216,6 @@
/* DataFlash */
#define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH 1
#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
#define AT91_SPI_CLK 15000000

@ -80,7 +80,6 @@
#define CONFIG_SPI
#define CONFIG_CMD_SPI
#define CONFIG_ATMEL_SPI
#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
#define CONFIG_CMD_EEPROM
#define CONFIG_SPI_M95XXX

@ -85,7 +85,6 @@
#define CONFIG_SPI
#define CONFIG_CMD_SPI
#define CONFIG_ATMEL_SPI
#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
#define CONFIG_CMD_EEPROM
#define CONFIG_SPI_M95XXX

@ -85,7 +85,6 @@
/* DataFlash */
#define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH
#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000
#define AT91_SPI_CLK 8000000

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