powerpc, mpc83xx: add DDR SDRAM Timing Configuration 3 definitions

Signed-off-by: Heiko Schocher <hs@denx.de>

Added its mask, too, for intra-file consistency.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
master
Heiko Schocher 13 years ago committed by Kim Phillips
parent 4e8b750c53
commit f1ccd10672
  1. 6
      include/mpc83xx.h

@ -1054,6 +1054,12 @@
#define TIMING_CFG2_FOUR_ACT_SHIFT 0
/*
* TIMING_CFG_3 - DDR SDRAM Timing Configuration 3
*/
#define TIMING_CFG3_EXT_REFREC 0x00070000
#define TIMING_CFG3_EXT_REFREC_SHIFT 16
/*
* DDR_SDRAM_CFG - DDR SDRAM Control Configuration
*/
#define SDRAM_CFG_MEM_EN 0x80000000

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