diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index cefbdfe..7b59dc9 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -3,6 +3,8 @@ config ARCH_LS1012A select ARMV8_SET_SMPEN select ARM_ERRATA_855873 select FSL_LSCH2 + select SYS_FSL_SRDS_1 + select SYS_HAS_SERDES select SYS_FSL_DDR_BE select SYS_FSL_MMDC select SYS_FSL_ERRATUM_A010315 @@ -19,6 +21,8 @@ config ARCH_LS1043A select ARMV8_SET_SMPEN select ARM_ERRATA_855873 select FSL_LSCH2 + select SYS_FSL_SRDS_1 + select SYS_HAS_SERDES select SYS_FSL_DDR select SYS_FSL_DDR_BE select SYS_FSL_DDR_VER_50 @@ -45,6 +49,8 @@ config ARCH_LS1046A bool select ARMV8_SET_SMPEN select FSL_LSCH2 + select SYS_FSL_SRDS_1 + select SYS_HAS_SERDES select SYS_FSL_DDR select SYS_FSL_DDR_BE select SYS_FSL_DDR_VER_50 @@ -72,6 +78,8 @@ config ARCH_LS1088A select ARMV8_SET_SMPEN select ARM_ERRATA_855873 select FSL_LSCH3 + select SYS_FSL_SRDS_1 + select SYS_HAS_SERDES select SYS_FSL_DDR select SYS_FSL_DDR_LE select SYS_FSL_DDR_VER_50 @@ -105,6 +113,8 @@ config ARCH_LS2080A select ARM_ERRATA_829520 select ARM_ERRATA_833471 select FSL_LSCH3 + select SYS_FSL_SRDS_1 + select SYS_HAS_SERDES select SYS_FSL_DDR select SYS_FSL_DDR_LE select SYS_FSL_DDR_VER_50 @@ -142,13 +152,9 @@ config FSL_LSCH2 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SEC_BE - select SYS_FSL_SRDS_1 - select SYS_HAS_SERDES config FSL_LSCH3 bool - select SYS_FSL_SRDS_1 - select SYS_HAS_SERDES config FSL_MC_ENET bool "Management Complex network" diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h index 67e4b48..39eeb39 100644 --- a/arch/powerpc/include/asm/config.h +++ b/arch/powerpc/include/asm/config.h @@ -70,11 +70,9 @@ #endif /* The TSEC driver uses the PHYLIB infrastructure */ -#ifndef CONFIG_PHYLIB -#if defined(CONFIG_TSEC_ENET) +#if defined(CONFIG_TSEC_ENET) && defined(CONFIG_PHYLIB) #include #endif /* TSEC_ENET */ -#endif /* !CONFIG_PHYLIB */ /* The FMAN driver uses the PHYLIB infrastructure */ diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index e0ba24e..1377623 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -3,7 +3,9 @@ CONFIG_TARGET_LS1012ARDB=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SECURE_BOOT=y CONFIG_FSL_LS_PPA=y +CONFIG_QSPI_AHB_INIT=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" +CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -13,7 +15,7 @@ CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" -CONFIG_HUSH_PARSER=y +# CONFIG_DISPLAY_BOARDINFO is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -21,16 +23,12 @@ CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_SF=y CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +# CONFIG_BLK is not set +CONFIG_DM_MMC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_NETDEVICES=y @@ -43,6 +41,7 @@ CONFIG_SYS_NS16550=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index c1175d6..6e1673b 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -19,6 +19,7 @@ CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y +CONFIG_CMD_PCI=y CONFIG_CMD_SF=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y @@ -35,6 +36,12 @@ CONFIG_FSL_CAAM=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y +CONFIG_NETDEVICES=y +CONFIG_E1000=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE=y CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y CONFIG_DM_SPI=y diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig index 9323595..f2b6be8 100644 --- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS1088AQDS=y CONFIG_SYS_TEXT_BASE=0x20100000 CONFIG_SECURE_BOOT=y CONFIG_FSL_LS_PPA=y +CONFIG_QSPI_AHB_INIT=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig index 3006436..43a2fcc 100644 --- a/configs/ls1088aqds_qspi_defconfig +++ b/configs/ls1088aqds_qspi_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS1088AQDS=y CONFIG_SYS_TEXT_BASE=0x20100000 CONFIG_FSL_LS_PPA=y +CONFIG_QSPI_AHB_INIT=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig index b810a5d..592ed1b 100644 --- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig @@ -33,6 +33,7 @@ CONFIG_PCIE_LAYERSCAPE=y CONFIG_SYS_NS16550=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y +CONFIG_QSPI_AHB_INIT=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig index c6752dd..bc1bb17 100644 --- a/configs/ls1088ardb_qspi_defconfig +++ b/configs/ls1088ardb_qspi_defconfig @@ -33,6 +33,7 @@ CONFIG_PCIE_LAYERSCAPE=y CONFIG_SYS_NS16550=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y +CONFIG_QSPI_AHB_INIT=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y diff --git a/drivers/crypto/fsl/jobdesc.c b/drivers/crypto/fsl/jobdesc.c index 375ff9d..aadf851 100644 --- a/drivers/crypto/fsl/jobdesc.c +++ b/drivers/crypto/fsl/jobdesc.c @@ -257,7 +257,7 @@ void inline_cnstr_jobdesc_blob_decap(uint32_t *desc, uint8_t *key_idnfr, * Descriptor to instantiate RNG State Handle 0 in normal mode and * load the JDKEK, TDKEK and TDSK registers */ -void inline_cnstr_jobdesc_rng_instantiation(uint32_t *desc) +void inline_cnstr_jobdesc_rng_instantiation(uint32_t *desc, int handle) { u32 *jump_cmd; @@ -265,21 +265,24 @@ void inline_cnstr_jobdesc_rng_instantiation(uint32_t *desc) /* INIT RNG in non-test mode */ append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG | - OP_ALG_AS_INIT); - - /* wait for done */ - jump_cmd = append_jump(desc, JUMP_CLASS_CLASS1); - set_jump_tgt_here(desc, jump_cmd); - - /* - * load 1 to clear written reg: - * resets the done interrrupt and returns the RNG to idle. - */ - append_load_imm_u32(desc, 1, LDST_SRCDST_WORD_CLRW); - - /* generate secure keys (non-test) */ - append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG | - OP_ALG_RNG4_SK); + (handle << OP_ALG_AAI_SHIFT) | OP_ALG_AS_INIT); + + /* For SH0, Secure Keys must be generated as well */ + if (handle == 0) { + /* wait for done */ + jump_cmd = append_jump(desc, JUMP_CLASS_CLASS1); + set_jump_tgt_here(desc, jump_cmd); + + /* + * load 1 to clear written reg: + * resets the done interrupt and returns the RNG to idle. + */ + append_load_imm_u32(desc, 1, LDST_SRCDST_WORD_CLRW); + + /* generate secure keys (non-test) */ + append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG | + OP_ALG_RNG4_SK); + } } /* Change key size to bytes form bits in calling function*/ diff --git a/drivers/crypto/fsl/jobdesc.h b/drivers/crypto/fsl/jobdesc.h index 112404c..75c9424 100644 --- a/drivers/crypto/fsl/jobdesc.h +++ b/drivers/crypto/fsl/jobdesc.h @@ -40,7 +40,7 @@ void inline_cnstr_jobdesc_blob_decap(uint32_t *desc, uint8_t *key_idnfr, uint8_t *enc_blob, uint8_t *plain_txt, uint32_t out_sz); -void inline_cnstr_jobdesc_rng_instantiation(uint32_t *desc); +void inline_cnstr_jobdesc_rng_instantiation(uint32_t *desc, int handle); void inline_cnstr_jobdesc_pkha_rsaexp(uint32_t *desc, struct pk_in_params *pkin, uint8_t *out, diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index a057798..34bd070 100644 --- a/drivers/crypto/fsl/jr.c +++ b/drivers/crypto/fsl/jr.c @@ -444,35 +444,49 @@ int sec_reset(void) #ifndef CONFIG_SPL_BUILD static int instantiate_rng(uint8_t sec_idx) { - struct result op; u32 *desc; u32 rdsta_val; - int ret = 0; + int ret = 0, sh_idx, size; ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem *)SEC_ADDR(sec_idx); struct rng4tst __iomem *rng = (struct rng4tst __iomem *)&sec->rng; - memset(&op, 0, sizeof(struct result)); - desc = memalign(ARCH_DMA_MINALIGN, sizeof(uint32_t) * 6); if (!desc) { printf("cannot allocate RNG init descriptor memory\n"); return -1; } - inline_cnstr_jobdesc_rng_instantiation(desc); - int size = roundup(sizeof(uint32_t) * 6, ARCH_DMA_MINALIGN); - flush_dcache_range((unsigned long)desc, - (unsigned long)desc + size); + for (sh_idx = 0; sh_idx < RNG4_MAX_HANDLES; sh_idx++) { + /* + * If the corresponding bit is set, this state handle + * was initialized by somebody else, so it's left alone. + */ + rdsta_val = sec_in32(&rng->rdsta) & RNG_STATE_HANDLE_MASK; + if (rdsta_val & (1 << sh_idx)) + continue; + + inline_cnstr_jobdesc_rng_instantiation(desc, sh_idx); + size = roundup(sizeof(uint32_t) * 6, ARCH_DMA_MINALIGN); + flush_dcache_range((unsigned long)desc, + (unsigned long)desc + size); - ret = run_descriptor_jr_idx(desc, sec_idx); + ret = run_descriptor_jr_idx(desc, sec_idx); - if (ret) - printf("RNG: Instantiation failed with error %x\n", ret); + if (ret) + printf("RNG: Instantiation failed with error 0x%x\n", + ret); - rdsta_val = sec_in32(&rng->rdsta); - if (op.status || !(rdsta_val & RNG_STATE0_HANDLE_INSTANTIATED)) - return -1; + rdsta_val = sec_in32(&rng->rdsta) & RNG_STATE_HANDLE_MASK; + if (!(rdsta_val & (1 << sh_idx))) { + free(desc); + return -1; + } + + memset(desc, 0, sizeof(uint32_t) * 6); + } + + free(desc); return ret; } @@ -524,14 +538,11 @@ static int rng_init(uint8_t sec_idx) ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem *)SEC_ADDR(sec_idx); struct rng4tst __iomem *rng = (struct rng4tst __iomem *)&sec->rng; - - u32 rdsta = sec_in32(&rng->rdsta); - - /* Check if RNG state 0 handler is already instantiated */ - if (rdsta & RNG_STATE0_HANDLE_INSTANTIATED) - return 0; + u32 inst_handles; do { + inst_handles = sec_in32(&rng->rdsta) & RNG_STATE_HANDLE_MASK; + /* * If either of the SH's were instantiated by somebody else * then it is assumed that the entropy @@ -540,8 +551,10 @@ static int rng_init(uint8_t sec_idx) * Also, if a handle was instantiated, do not change * the TRNG parameters. */ - kick_trng(ent_delay, sec_idx); - ent_delay += 400; + if (!inst_handles) { + kick_trng(ent_delay, sec_idx); + ent_delay += 400; + } /* * if instantiate_rng(...) fails, the loop will rerun * and the kick_trng(...) function will modfiy the diff --git a/drivers/crypto/fsl/jr.h b/drivers/crypto/fsl/jr.h index 8aab4c9..ef515e7 100644 --- a/drivers/crypto/fsl/jr.h +++ b/drivers/crypto/fsl/jr.h @@ -41,6 +41,8 @@ #define JQ_DEQ_TO_ERR -2 #define JQ_ENQ_ERR -3 +#define RNG4_MAX_HANDLES 2 + struct op_ring { phys_addr_t desc; uint32_t status; diff --git a/drivers/ddr/fsl/arm_ddr_gen3.c b/drivers/ddr/fsl/arm_ddr_gen3.c index aaf4dfb..4fa0d5d 100644 --- a/drivers/ddr/fsl/arm_ddr_gen3.c +++ b/drivers/ddr/fsl/arm_ddr_gen3.c @@ -1,7 +1,7 @@ /* * Copyright 2013 Freescale Semiconductor, Inc. * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause * * Derived from mpc85xx_ddr_gen3.c, removed all workarounds */ diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index 8b87271..7308309 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -2,7 +2,7 @@ * Copyright 2008-2016 Freescale Semiconductor, Inc. * Copyright 2017-2018 NXP Semiconductor * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause */ /* diff --git a/drivers/ddr/fsl/ddr1_dimm_params.c b/drivers/ddr/fsl/ddr1_dimm_params.c index c02725e..8a8c17c 100644 --- a/drivers/ddr/fsl/ddr1_dimm_params.c +++ b/drivers/ddr/fsl/ddr1_dimm_params.c @@ -1,7 +1,7 @@ /* * Copyright 2008 Freescale Semiconductor, Inc. * - * SPDX-License-Identifier: GPL-2.0 + * SPDX-License-Identifier: GPL-2.0 BSD-3-Clause */ #include diff --git a/drivers/ddr/fsl/ddr2_dimm_params.c b/drivers/ddr/fsl/ddr2_dimm_params.c index 062c849..3ff35aa 100644 --- a/drivers/ddr/fsl/ddr2_dimm_params.c +++ b/drivers/ddr/fsl/ddr2_dimm_params.c @@ -1,7 +1,7 @@ /* * Copyright 2008 Freescale Semiconductor, Inc. * - * SPDX-License-Identifier: GPL-2.0 + * SPDX-License-Identifier: GPL-2.0 BSD-3-Clause */ #include diff --git a/drivers/ddr/fsl/ddr3_dimm_params.c b/drivers/ddr/fsl/ddr3_dimm_params.c index 8a0587a..d8f170e 100644 --- a/drivers/ddr/fsl/ddr3_dimm_params.c +++ b/drivers/ddr/fsl/ddr3_dimm_params.c @@ -6,7 +6,7 @@ * from ddr3 spd, please refer to the spec * JEDEC standard No.21-C 4_01_02_11R18.pdf * - * SPDX-License-Identifier: GPL-2.0 + * SPDX-License-Identifier: GPL-2.0 BSD-3-Clause */ #include diff --git a/drivers/ddr/fsl/ddr4_dimm_params.c b/drivers/ddr/fsl/ddr4_dimm_params.c index 4867fbc..343b0ff 100644 --- a/drivers/ddr/fsl/ddr4_dimm_params.c +++ b/drivers/ddr/fsl/ddr4_dimm_params.c @@ -2,7 +2,7 @@ * Copyright 2014-2016 Freescale Semiconductor, Inc. * Copyright 2017-2018 NXP Semiconductor * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause * * calculate the organization and timing parameter * from ddr3 spd, please refer to the spec diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c index c225c8e..1829aa4 100644 --- a/drivers/ddr/fsl/fsl_ddr_gen4.c +++ b/drivers/ddr/fsl/fsl_ddr_gen4.c @@ -1,7 +1,7 @@ /* * Copyright 2014-2015 Freescale Semiconductor, Inc. * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause */ #include diff --git a/drivers/ddr/fsl/fsl_mmdc.c b/drivers/ddr/fsl/fsl_mmdc.c index 52eec0f..1312c08 100644 --- a/drivers/ddr/fsl/fsl_mmdc.c +++ b/drivers/ddr/fsl/fsl_mmdc.c @@ -1,7 +1,7 @@ /* * Copyright 2016 Freescale Semiconductor, Inc. * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause */ /* diff --git a/drivers/ddr/fsl/interactive.c b/drivers/ddr/fsl/interactive.c index 1fa35c3..f5c21e4 100644 --- a/drivers/ddr/fsl/interactive.c +++ b/drivers/ddr/fsl/interactive.c @@ -2,7 +2,7 @@ * Copyright 2010-2016 Freescale Semiconductor, Inc. * Copyright 2017-2018 NXP Semiconductor * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause */ /* diff --git a/drivers/ddr/fsl/lc_common_dimm_params.c b/drivers/ddr/fsl/lc_common_dimm_params.c index 6599901..3d28abd 100644 --- a/drivers/ddr/fsl/lc_common_dimm_params.c +++ b/drivers/ddr/fsl/lc_common_dimm_params.c @@ -2,7 +2,7 @@ * Copyright 2008-2016 Freescale Semiconductor, Inc. * Copyright 2017-2018 NXP Semiconductor * - * SPDX-License-Identifier: GPL-2.0 + * SPDX-License-Identifier: GPL-2.0 BSD-3-Clause */ #include diff --git a/drivers/ddr/fsl/main.c b/drivers/ddr/fsl/main.c index d0a7b3f..85897b1 100644 --- a/drivers/ddr/fsl/main.c +++ b/drivers/ddr/fsl/main.c @@ -1,7 +1,7 @@ /* * Copyright 2008-2014 Freescale Semiconductor, Inc. * - * SPDX-License-Identifier: GPL-2.0 + * SPDX-License-Identifier: GPL-2.0 BSD-3-Clause */ /* diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c index c005f52..f74bf32 100644 --- a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c +++ b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c @@ -1,7 +1,7 @@ /* * Copyright 2008 Freescale Semiconductor, Inc. * - * SPDX-License-Identifier: GPL-2.0 + * SPDX-License-Identifier: GPL-2.0 BSD-3-Clause */ #include diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen2.c b/drivers/ddr/fsl/mpc85xx_ddr_gen2.c index 898b0cd..6da4400 100644 --- a/drivers/ddr/fsl/mpc85xx_ddr_gen2.c +++ b/drivers/ddr/fsl/mpc85xx_ddr_gen2.c @@ -1,7 +1,7 @@ /* * Copyright 2008-2011 Freescale Semiconductor, Inc. * - * SPDX-License-Identifier: GPL-2.0 + * SPDX-License-Identifier: GPL-2.0 BSD-3-Clause */ #include diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c index afbed59..e58f76a 100644 --- a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c +++ b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c @@ -1,7 +1,7 @@ /* * Copyright 2008-2012 Freescale Semiconductor, Inc. * - * SPDX-License-Identifier: GPL-2.0 + * SPDX-License-Identifier: GPL-2.0 BSD-3-Clause */ #include diff --git a/drivers/ddr/fsl/mpc86xx_ddr.c b/drivers/ddr/fsl/mpc86xx_ddr.c index a65eb31..bda5b83 100644 --- a/drivers/ddr/fsl/mpc86xx_ddr.c +++ b/drivers/ddr/fsl/mpc86xx_ddr.c @@ -1,7 +1,7 @@ /* * Copyright 2008 Freescale Semiconductor, Inc. * - * SPDX-License-Identifier: GPL-2.0 + * SPDX-License-Identifier: GPL-2.0 BSD-3-Clause */ #include diff --git a/drivers/ddr/fsl/options.c b/drivers/ddr/fsl/options.c index 85ec48c..1abea1d 100644 --- a/drivers/ddr/fsl/options.c +++ b/drivers/ddr/fsl/options.c @@ -2,7 +2,7 @@ * Copyright 2008, 2010-2016 Freescale Semiconductor, Inc. * Copyright 2017-2018 NXP Semiconductor * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause */ #include diff --git a/drivers/ddr/fsl/util.c b/drivers/ddr/fsl/util.c index d6e6e78..11731cb 100644 --- a/drivers/ddr/fsl/util.c +++ b/drivers/ddr/fsl/util.c @@ -1,7 +1,7 @@ /* * Copyright 2008-2014 Freescale Semiconductor, Inc. * - * SPDX-License-Identifier: GPL-2.0 + * SPDX-License-Identifier: GPL-2.0 BSD-3-Clause */ #include diff --git a/include/common_timing_params.h b/include/common_timing_params.h index 0700107..3881456 100644 --- a/include/common_timing_params.h +++ b/include/common_timing_params.h @@ -1,7 +1,7 @@ /* * Copyright 2008-2014 Freescale Semiconductor, Inc. * - * SPDX-License-Identifier: GPL-2.0 + * SPDX-License-Identifier: GPL-2.0 BSD-3-Clause */ #ifndef COMMON_TIMING_PARAMS_H diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index 438b5a6..97ed909 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -63,16 +63,20 @@ "initrd_high=0xffffffffffffffff\0" \ "fdt_addr=0x00f00000\0" \ "kernel_addr=0x01000000\0" \ + "kernelheader_addr=0x800000\0" \ "scriptaddr=0x80000000\0" \ + "scripthdraddr=0x80080000\0" \ "fdtheader_addr_r=0x80100000\0" \ "kernelheader_addr_r=0x80200000\0" \ "kernel_addr_r=0x81000000\0" \ "fdt_addr_r=0x90000000\0" \ "load_addr=0xa0000000\0" \ "kernel_size=0x2800000\0" \ + "kernelheader_size=0x40000\0" \ "console=ttyS0,115200\0" \ BOOTENV \ "boot_scripts=ls1012ardb_boot.scr\0" \ + "boot_script_hdr=hdr_ls1012ardb_bs.out\0" \ "scan_dev_for_boot_part=" \ "part list ${devtype} ${devnum} devplist; " \ "env exists devplist || setenv devplist 1; " \ @@ -90,15 +94,27 @@ "run scan_dev_for_scripts; " \ "done;" \ "\0" \ + "boot_a_script=" \ + "load ${devtype} ${devnum}:${distro_bootpart} " \ + "${scriptaddr} ${prefix}${script}; " \ + "env exists secureboot && load ${devtype} " \ + "${devnum}:${distro_bootpart} " \ + "${scripthdraddr} ${prefix}${boot_script_hdr} " \ + "&& esbc_validate ${scripthdraddr};" \ + "source ${scriptaddr}\0" \ "installer=load mmc 0:2 $load_addr " \ "/flex_installer_arm64.itb; " \ "bootm $load_addr#$board\0" \ "qspi_bootcmd=echo Trying load from qspi..;" \ "sf probe && sf read $load_addr " \ - "$kernel_addr $kernel_size && bootm $load_addr#$board\0" + "$kernel_addr $kernel_size; env exists secureboot " \ + "&& sf read $kernelheader_addr_r $kernelheader_addr " \ + "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ + "bootm $load_addr#$board\0" #undef CONFIG_BOOTCOMMAND -#define CONFIG_BOOTCOMMAND "run distro_bootcmd;run qspi_bootcmd" +#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \ + "env exists secureboot && esbc_halt;" #include diff --git a/include/fsl_ddr.h b/include/fsl_ddr.h index 261b94e..996723c 100644 --- a/include/fsl_ddr.h +++ b/include/fsl_ddr.h @@ -1,7 +1,7 @@ /* * Copyright 2008-2014 Freescale Semiconductor, Inc. * - * SPDX-License-Identifier: GPL-2.0 + * SPDX-License-Identifier: GPL-2.0 BSD-3-Clause */ #ifndef FSL_DDR_MAIN_H diff --git a/include/fsl_ddr_dimm_params.h b/include/fsl_ddr_dimm_params.h index 1632a8f..af673fd 100644 --- a/include/fsl_ddr_dimm_params.h +++ b/include/fsl_ddr_dimm_params.h @@ -2,7 +2,7 @@ * Copyright 2008-2016 Freescale Semiconductor, Inc. * Copyright 2017-2018 NXP Semiconductor * - * SPDX-License-Identifier: GPL-2.0 + * SPDX-License-Identifier: GPL-2.0 BSD-3-Clause */ #ifndef DDR2_DIMM_PARAMS_H diff --git a/include/fsl_ddrc_version.h b/include/fsl_ddrc_version.h index 60ba98b..4c5aed4 100644 --- a/include/fsl_ddrc_version.h +++ b/include/fsl_ddrc_version.h @@ -1,7 +1,7 @@ /* * Copyright 2014 Freescale Semiconductor, Inc. * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause */ #ifndef __FSL_DDRC_VER_H diff --git a/include/fsl_immap.h b/include/fsl_immap.h index 4f5a19c..e210c4c 100644 --- a/include/fsl_immap.h +++ b/include/fsl_immap.h @@ -3,7 +3,7 @@ * * Copyright 2013-2014 Freescale Semiconductor, Inc. * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause */ #ifndef __FSL_IMMAP_H diff --git a/include/fsl_mmdc.h b/include/fsl_mmdc.h index d5c4f8d..d364e07 100644 --- a/include/fsl_mmdc.h +++ b/include/fsl_mmdc.h @@ -1,7 +1,7 @@ /* * Copyright 2016 Freescale Semiconductor, Inc. * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause */ #ifndef FSL_MMDC_H diff --git a/include/fsl_sec.h b/include/fsl_sec.h index a2f5f5a..4cbdb2d 100644 --- a/include/fsl_sec.h +++ b/include/fsl_sec.h @@ -67,6 +67,9 @@ struct rng4tst { }; u32 rsvd1[40]; #define RNG_STATE0_HANDLE_INSTANTIATED 0x00000001 +#define RNG_STATE1_HANDLE_INSTANTIATED 0x00000002 +#define RNG_STATE_HANDLE_MASK \ + (RNG_STATE0_HANDLE_INSTANTIATED | RNG_STATE1_HANDLE_INSTANTIATED) u32 rdsta; /*RNG DRNG Status Register*/ u32 rsvd2[15]; };