kmp204x: reset the Zarlink clocking chips at power up only

There is the requirement on the chassis's backplane that when the clocks
have been enabled, they then should not disappear.

Resetting the Zarlink clocking chips at unit reset violates this
requirement because the backplane clocks are not supplied during the
reset time.

To avoid this side effect, both the Zarlink clocking chips are reset
only at power up.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>

board/keymile/kmp204x/kmp204x.c

@@ -108,8 +108,8 @@ int board_early_init_f(void)
 	/* and enable WD on it */
 	qrio_wdmask(BFTIC4_RST, true);
 
-	/* set the ZL30138's prstcfg to reset at power-up and unit reset only */
-	qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_UNIT_RST);
+	/* set the ZL30138's prstcfg to reset at power-up only */
+	qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_RST);
 	/* and take it out of reset as soon as possible (needed for Hooper) */
 	qrio_prst(ZL30158_RST, false, false);
 
@@ -158,8 +158,8 @@ int misc_init_f(void)
 	qrio_prstcfg(ETH_FRONT_PHY_RST, PRSTCFG_POWUP_UNIT_CORE_RST);
 	qrio_prst(ETH_FRONT_PHY_RST, false, false);
 
-	/* set the ZL30343 prstcfg to reset at power-up and unit reset only */
-	qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_UNIT_RST);
+	/* set the ZL30343 prstcfg to reset at power-up only */
+	qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_RST);
 	/* and enable the WD on it */
 	qrio_wdmask(ZL30343_RST, true);