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ColdFire: Relocate FEC's GPIO and mii functions protocols

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Place FEC pin assignments in cpu_init.c from platform's
mii.c

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
master
TsiChung Liew 16 years ago committed by John Rigby
parent 6e80f5aa09
commit f3962d3f57
7 changed files with 197 additions and 12 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 24
      cpu/mcf523x/cpu_init.c
  2. 78
      cpu/mcf52x2/cpu_init.c
  3. 25
      cpu/mcf532x/cpu_init.c
  4. 34
      cpu/mcf5445x/cpu_init.c
  5. 27
      cpu/mcf547x_8x/cpu_init.c
  6. 12
      include/asm-m68k/fec.h
  7. 9
      include/asm-m68k/fsl_mcdmafec.h

24
cpu/mcf523x/cpu_init.c
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@ -27,9 +27,14 @@
#include <common.h>
#include <watchdog.h>
#include <asm/immap.h>
#if defined(CONFIG_CMD_NET)
#include <config.h>
#include <net.h>
#include <asm/fec.h>
#endif
/*
* Breath some life into the CPU...
*
@ -143,3 +148,20 @@ void uart_port_conf(void)
break;
}
}
#if defined(CONFIG_CMD_NET)
int fecpin_setclear(struct eth_device *dev, int setclear)
{
volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
if (setclear) {
gpio->par_feci2c |=
(GPIO_PAR_FECI2C_EMDC_FECEMDC | GPIO_PAR_FECI2C_EMDIO_FECEMDIO);
} else {
gpio->par_feci2c &=
~(GPIO_PAR_FECI2C_EMDC_MASK | GPIO_PAR_FECI2C_EMDIO_MASK);
}
return 0;
}
#endif

78
cpu/mcf52x2/cpu_init.c
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@ -36,6 +36,12 @@
#include <watchdog.h>
#include <asm/immap.h>
#if defined(CONFIG_CMD_NET)
#include <config.h>
#include <net.h>
#include <asm/fec.h>
#endif
#ifndef CONFIG_M5272
/* Only 5272 Flexbus chipselect is different from the rest */
void init_fbcs(void)
@ -207,6 +213,19 @@ void uart_port_conf(void)
break;
}
}
#if defined(CONFIG_CMD_NET)
int fecpin_setclear(struct eth_device *dev, int setclear)
{
if (setclear) {
/* Enable Ethernet pins */
mbar_writeByte(MCF_GPIO_PAR_FECI2C, CONFIG_SYS_FECI2C);
} else {
}
return 0;
}
#endif /* CONFIG_CMD_NET */
#endif
#if defined(CONFIG_M5272)
@ -309,6 +328,22 @@ void uart_port_conf(void)
break;
}
}
#if defined(CONFIG_CMD_NET)
int fecpin_setclear(struct eth_device *dev, int setclear)
{
volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
if (setclear) {
gpio->gpio_pbcnt |= GPIO_PBCNT_E_MDC | GPIO_PBCNT_E_RXER |
GPIO_PBCNT_E_RXD1 | GPIO_PBCNT_E_RXD2 |
GPIO_PBCNT_E_RXD3 | GPIO_PBCNT_E_TXD1 |
GPIO_PBCNT_E_TXD2 | GPIO_PBCNT_E_TXD3;
} else {
}
return 0;
}
#endif /* CONFIG_CMD_NET */
#endif /* #if defined(CONFIG_M5272) */
#if defined(CONFIG_M5275)
@ -372,6 +407,35 @@ void uart_port_conf(void)
break;
}
}
#if defined(CONFIG_CMD_NET)
int fecpin_setclear(struct eth_device *dev, int setclear)
{
struct fec_info_s *info = (struct fec_info_s *) dev->priv;
volatile gpio_t *gpio = (gpio_t *)MMAP_GPIO;
if (setclear) {
/* Enable Ethernet pins */
if (info->iobase == CONFIG_SYS_FEC0_IOBASE) {
gpio->par_feci2c |= 0x0F00;
gpio->par_fec0hl |= 0xC0;
} else {
gpio->par_feci2c |= 0x00A0;
gpio->par_fec1hl |= 0xC0;
}
} else {
if (info->iobase == CONFIG_SYS_FEC0_IOBASE) {
gpio->par_feci2c &= ~0x0F00;
gpio->par_fec0hl &= ~0xC0;
} else {
gpio->par_feci2c &= ~0x00A0;
gpio->par_fec1hl &= ~0xC0;
}
}
return 0;
}
#endif /* CONFIG_CMD_NET */
#endif /* #if defined(CONFIG_M5275) */
#if defined(CONFIG_M5282)
@ -469,6 +533,20 @@ void uart_port_conf(void)
break;
}
}
#if defined(CONFIG_CMD_NET)
int fecpin_setclear(struct eth_device *dev, int setclear)
{
if (setclear) {
MCFGPIO_PASPAR |= 0x0F00;
MCFGPIO_PEHLPAR = CONFIG_SYS_PEHLPAR;
} else {
MCFGPIO_PASPAR &= 0xF0FF;
MCFGPIO_PEHLPAR &= ~CONFIG_SYS_PEHLPAR;
}
return 0;
}
#endif /* CONFIG_CMD_NET */
#endif
#if defined(CONFIG_M5249)

25
cpu/mcf532x/cpu_init.c
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@ -27,9 +27,14 @@
#include <common.h>
#include <watchdog.h>
#include <asm/immap.h>
#if defined(CONFIG_CMD_NET)
#include <config.h>
#include <net.h>
#include <asm/fec.h>
#endif
/*
* Breath some life into the CPU...
*
@ -139,3 +144,21 @@ void uart_port_conf(void)
break;
}
}
#if defined(CONFIG_CMD_NET)
int fecpin_setclear(struct eth_device *dev, int setclear)
{
volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
if (setclear) {
gpio->par_fec |= GPIO_PAR_FEC_7W_FEC | GPIO_PAR_FEC_MII_FEC;
gpio->par_feci2c |=
GPIO_PAR_FECI2C_MDC_EMDC | GPIO_PAR_FECI2C_MDIO_EMDIO;
} else {
gpio->par_fec &= ~(GPIO_PAR_FEC_7W_FEC | GPIO_PAR_FEC_MII_FEC);
gpio->par_feci2c &=
~(GPIO_PAR_FECI2C_MDC_EMDC | GPIO_PAR_FECI2C_MDIO_EMDIO);
}
return 0;
}
#endif

34
cpu/mcf5445x/cpu_init.c
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@ -27,10 +27,15 @@
#include <common.h>
#include <watchdog.h>
#include <asm/immap.h>
#include <asm/rtc.h>
#if defined(CONFIG_CMD_NET)
#include <config.h>
#include <net.h>
#include <asm/fec.h>
#endif
/*
* Breath some life into the CPU...
*
@ -139,3 +144,30 @@ void uart_port_conf(void)
break;
}
}
#if defined(CONFIG_CMD_NET)
int fecpin_setclear(struct eth_device *dev, int setclear)
{
volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
struct fec_info_s *info = (struct fec_info_s *)dev->priv;
if (setclear) {
gpio->par_feci2c |=
(GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0);
if (info->iobase == CONFIG_SYS_FEC0_IOBASE)
gpio->par_fec |= GPIO_PAR_FEC_FEC0_RMII_GPIO;
else
gpio->par_fec |= GPIO_PAR_FEC_FEC1_RMII_ATA;
} else {
gpio->par_feci2c &=
~(GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0);
if (info->iobase == CONFIG_SYS_FEC0_IOBASE)
gpio->par_fec &= GPIO_PAR_FEC_FEC0_MASK;
else
gpio->par_fec &= GPIO_PAR_FEC_FEC1_MASK;
}
return 0;
}
#endif

27
cpu/mcf547x_8x/cpu_init.c
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@ -29,6 +29,12 @@
#include <MCD_dma.h>
#include <asm/immap.h>
#if defined(CONFIG_CMD_NET)
#include <config.h>
#include <net.h>
#include <asm/fsl_mcdmafec.h>
#endif
/*
* Breath some life into the CPU...
*
@ -130,3 +136,24 @@ void uart_port_conf(void)
*pscsicr &= 0xF8;
}
#if defined(CONFIG_CMD_NET)
int fecpin_setclear(struct eth_device *dev, int setclear)
{
volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
struct fec_info_dma *info = (struct fec_info_dma *)dev->priv;
if (setclear) {
if (info->iobase == CONFIG_SYS_FEC0_IOBASE)
gpio->par_feci2cirq |= 0xF000;
else
gpio->par_feci2cirq |= 0x0FC0;
} else {
if (info->iobase == CONFIG_SYS_FEC0_IOBASE)
gpio->par_feci2cirq &= 0x0FFF;
else
gpio->par_feci2cirq &= 0xF03F;
}
return 0;
}
#endif

12
include/asm-m68k/fec.h
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@ -351,4 +351,16 @@ typedef struct fec {
#define FEC_RESET_DELAY 100
#define FEC_RX_TOUT 100
int fecpin_setclear(struct eth_device *dev, int setclear);
#ifdef CONFIG_SYS_DISCOVER_PHY
void __mii_init(void);
uint mii_send(uint mii_cmd);
int mii_discover_phy(struct eth_device *dev);
int mcffec_miiphy_read(char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
int mcffec_miiphy_write(char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
#endif
#endif /* fec_h */

9
include/asm-m68k/fsl_mcdmafec.h
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@ -164,13 +164,4 @@ struct fec_info_dma {
#define FIFO_CTRL_UFMASK (0x00100000)
#define FIFO_CTRL_OFMASK (0x00080000)
int fecpin_setclear(struct eth_device *dev, int setclear);
void mii_init(void);
uint mii_send(uint mii_cmd);
int mii_discover_phy(struct eth_device *dev);
int mcffec_miiphy_read(char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
int mcffec_miiphy_write(char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
#endif /* fsl_mcdmafec_h */

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