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@ -73,7 +73,7 @@ extern block_dev_desc_t * scsi_get_dev(int dev); |
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extern block_dev_desc_t * ide_get_dev(int dev); |
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#undef SDRAM_DEBUG |
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#define ENABLE_ECC /* for ecc boards */ |
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#define FALSE 0 |
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#define TRUE 1 |
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@ -108,7 +108,27 @@ typedef struct { |
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unsigned char sz; /* log binary => Size = (4MByte<<sz) 5 = 128, 4 = 64, 3 = 32, 2 = 16, 1=8 */ |
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unsigned char ecc; /* if true, ecc is enabled */ |
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} sdram_t; |
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#if defined(CONFIG_MIP405T) |
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const sdram_t sdram_table[] = { |
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{ 0x01, /* MIP405T Rev A, 64MByte -1 Board */ |
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3, /* Case Latenty = 3 */ |
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3, /* trp 20ns / 7.5 ns datain[27] */ |
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3, /* trcd 20ns /7.5 ns (datain[29]) */ |
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6, /* tras 44ns /7.5 ns (datain[30]) */ |
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4, /* tcpt 44 - 20ns = 24ns */ |
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3, /* Address Mode = 3 (13x9x4) */ |
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4, /* size value (64MByte) */ |
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0}, /* ECC disabled */ |
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{ 0xff, /* terminator */ |
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0xff, |
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0xff, |
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0xff, |
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0xff, |
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0xff, |
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0xff, |
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0xff } |
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}; |
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#else |
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const sdram_t sdram_table[] = { |
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{ 0x0f, /* Rev A, 128MByte -1 Board */ |
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3, /* Case Latenty = 3 */ |
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@ -155,7 +175,7 @@ const sdram_t sdram_table[] = { |
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0xff, |
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0xff } |
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}; |
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#endif /*CONFIG_MIP405T */ |
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void SDRAM_err (const char *s) |
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{ |
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#ifndef SDRAM_DEBUG |
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@ -222,17 +242,54 @@ int init_sdram (void) |
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tctp_clocks; |
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unsigned char cal_val; |
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unsigned char bc; |
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unsigned long pbcr, sdram_tim, sdram_bank; |
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unsigned long *p; |
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unsigned long sdram_tim, sdram_bank; |
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i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); |
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/*i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);*/ |
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(void) get_clocks (); |
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gd->baudrate = 9600; |
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serial_init (); |
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/* set up the pld */ |
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mtdcr (ebccfga, pb7ap); |
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mtdcr (ebccfgd, PLD_AP); |
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mtdcr (ebccfga, pb7cr); |
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mtdcr (ebccfgd, PLD_CR); |
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/* THIS IS OBSOLETE */ |
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/* set up the board rev reg*/ |
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mtdcr (ebccfga, pb5ap); |
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mtdcr (ebccfgd, BOARD_AP); |
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mtdcr (ebccfga, pb5cr); |
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mtdcr (ebccfgd, BOARD_CR); |
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#ifdef SDRAM_DEBUG |
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/* get all informations from PLD */ |
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serial_puts ("\nPLD Part 0x"); |
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bc = in8 (PLD_PART_REG); |
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write_hex (bc); |
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serial_puts ("\nPLD Vers 0x"); |
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bc = in8 (PLD_VERS_REG); |
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write_hex (bc); |
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serial_puts ("\nBoard Rev 0x"); |
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bc = in8 (PLD_BOARD_CFG_REG); |
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write_hex (bc); |
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serial_puts ("\n"); |
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#endif |
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/* check board */ |
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bc = in8 (PLD_PART_REG); |
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#if defined(CONFIG_MIP405T) |
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if((bc & 0x80)==0) |
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SDRAM_err ("U-Boot configured for a MIP405T not for a MIP405!!!\n"); |
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#else |
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if((bc & 0x80)==0x80) |
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SDRAM_err ("U-Boot configured for a MIP405 not for a MIP405T!!!\n"); |
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#endif |
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#if !defined(CONFIG_MIP405T) |
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/* since the ECC initialisation needs some time,
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* we show that we're alive |
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*/ |
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serial_puts ("\nInitializing SDRAM, Please stand by"); |
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/* set-up the chipselect machine */ |
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mtdcr (ebccfga, pb0cr); /* get cs0 config reg */ |
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pbcr = mfdcr (ebccfgd); |
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if ((pbcr & 0x00002000) == 0) { |
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tmp = mfdcr (ebccfgd); |
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if ((tmp & 0x00002000) == 0) { |
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/* MPS Boot, set up the flash */ |
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mtdcr (ebccfga, pb1ap); |
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mtdcr (ebccfgd, FLASH_AP); |
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@ -254,30 +311,8 @@ int init_sdram (void) |
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mtdcr (ebccfgd, UART1_AP); |
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mtdcr (ebccfga, pb3cr); |
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mtdcr (ebccfgd, UART1_CR); |
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/* set up the pld */ |
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mtdcr (ebccfga, pb7ap); |
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mtdcr (ebccfgd, PLD_AP); |
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mtdcr (ebccfga, pb7cr); |
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mtdcr (ebccfgd, PLD_CR); |
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/* set up the board rev reg */ |
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mtdcr (ebccfga, pb5ap); |
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mtdcr (ebccfgd, BOARD_AP); |
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mtdcr (ebccfga, pb5cr); |
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mtdcr (ebccfgd, BOARD_CR); |
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#ifdef SDRAM_DEBUG |
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out8 (PER_BOARD_ADDR, 0); |
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bc = in8 (PER_BOARD_ADDR); |
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serial_puts ("\nBoard Rev: "); |
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write_hex (bc); |
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serial_puts (" (PLD="); |
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bc = in8 (PLD_BOARD_CFG_REG); |
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write_hex (bc); |
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serial_puts (")\n"); |
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#endif |
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bc = get_board_revcfg (); |
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bc = in8 (PLD_BOARD_CFG_REG); |
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#ifdef SDRAM_DEBUG |
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serial_puts ("\nstart SDRAM Setup\n"); |
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serial_puts ("\nBoard Rev: "); |
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@ -367,9 +402,10 @@ int init_sdram (void) |
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mtdcr (memcfga, mem_rtr); |
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mtdcr (memcfgd, tmp); |
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/* enable ECC if used */ |
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#if 1 |
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#if defined(ENABLE_ECC) && !defined(CONFIG_BOOT_PCI) |
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if (sdram_table[i].ecc) { |
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/* disable checking for all banks */ |
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unsigned long *p; |
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#ifdef SDRAM_DEBUG |
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serial_puts ("disable ECC.. "); |
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#endif |
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@ -398,8 +434,6 @@ int init_sdram (void) |
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*p++ = 0L; |
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if (!((unsigned long) p % 0x00800000)) /* every 8MByte */ |
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serial_puts ("."); |
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} |
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/* enable bank 0 */ |
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serial_puts ("."); |
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@ -501,47 +535,69 @@ void ide_set_reset (int idereset) |
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/* ------------------------------------------------------------------------- */ |
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/*
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* Check Board Identity: |
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*/ |
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int checkboard (void) |
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void get_pcbrev_var(unsigned char *pcbrev, unsigned char *var) |
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{ |
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unsigned char s[50]; |
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unsigned char bc, var, rc; |
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#if !defined(CONFIG_MIP405T) |
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unsigned char bc,rc,tmp; |
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int i; |
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backup_t *b = (backup_t *) s; |
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puts ("Board: "); |
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bc = get_board_revcfg (); |
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var = ~bc; |
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var &= 0xf; |
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bc = in8 (PLD_BOARD_CFG_REG); |
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tmp = ~bc; |
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tmp &= 0xf; |
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rc = 0; |
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for (i = 0; i < 4; i++) { |
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rc <<= 1; |
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rc += (var & 0x1); |
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var >>= 1; |
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rc += (tmp & 0x1); |
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tmp >>= 1; |
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} |
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rc++; |
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if((((bc>>4) & 0xf)==0x1) /* Rev B PCB with */ |
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&& (rc==0x1)) /* Population Option 1 is a -3 */ |
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rc=3; |
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*pcbrev=(bc >> 4) & 0xf; |
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*var=rc; |
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#else |
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unsigned char bc; |
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bc = in8 (PLD_BOARD_CFG_REG); |
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*pcbrev=(bc >> 4) & 0xf; |
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*var=bc & 0xf ; |
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#endif |
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} |
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/*
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* Check Board Identity: |
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*/ |
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/* serial String: "MIP405_1000" OR "MIP405T_1000" */ |
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#if !defined(CONFIG_MIP405T) |
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#define BOARD_NAME "MIP405" |
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#else |
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#define BOARD_NAME "MIP405T" |
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#endif |
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int checkboard (void) |
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{ |
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unsigned char s[50]; |
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unsigned char bc, var; |
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int i; |
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backup_t *b = (backup_t *) s; |
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puts ("Board: "); |
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get_pcbrev_var(&bc,&var); |
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i = getenv_r ("serial#", s, 32); |
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if ((i == 0) || strncmp (s, "MIP405", 6)) { |
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if ((i == 0) || strncmp (s, BOARD_NAME,sizeof(BOARD_NAME))) { |
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get_backup_values (b); |
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if (strncmp (b->signature, "MPL\0", 4) != 0) { |
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puts ("### No HW ID - assuming MIP405"); |
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printf ("-%d Rev %c", rc, 'A' + ((bc >> 4) & 0xf)); |
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puts ("### No HW ID - assuming " BOARD_NAME); |
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printf ("-%d Rev %c", var, 'A' + bc); |
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} else { |
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b->serial_name[6] = 0; |
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printf ("%s-%d Rev %c SN: %s", b->serial_name, rc, |
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'A' + ((bc >> 4) & 0xf), &b->serial_name[7]); |
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b->serial_name[sizeof(BOARD_NAME)-1] = 0; |
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printf ("%s-%d Rev %c SN: %s", b->serial_name, var, |
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'A' + bc, &b->serial_name[sizeof(BOARD_NAME)]); |
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} |
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} else { |
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s[6] = 0; |
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printf ("%s-%d Rev %c SN: %s", s, rc, 'A' + ((bc >> 4) & 0xf), |
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&s[7]); |
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s[sizeof(BOARD_NAME)-1] = 0; |
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printf ("%s-%d Rev %c SN: %s", s, var,'A' + bc, |
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&s[sizeof(BOARD_NAME)]); |
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} |
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bc = in8 (PLD_EXT_CONF_REG); |
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printf (" Boot Config: 0x%x\n", bc); |
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@ -613,30 +669,23 @@ static int test_dram (unsigned long ramsize) |
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int misc_init_r (void) |
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{ |
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/* if MIP405 has booted from PCI, reset CCR0[24] as described in errata PCI_18 */ |
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if (mfdcr(strap) & PSR_ROM_LOC) |
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mtspr(ccr0, (mfspr(ccr0) & ~0x80)); |
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return (0); |
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} |
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void print_mip405_rev (void) |
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{ |
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unsigned char part, vers, cfg, rev; |
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cfg = get_board_revcfg (); |
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vers = cfg; |
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vers &= 0xf; |
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rev = (((vers & 0x1) ? 0x8 : 0) | |
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((vers & 0x2) ? 0x4 : 0) | |
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((vers & 0x4) ? 0x2 : 0) | |
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((vers & 0x8) ? 0x1 : 0)); |
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vers=16-rev; |
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rev=vers; |
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if((rev==1) && ((cfg >> 4)==1)) /* Rev B PCB and -1 is a -3 */ |
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rev=3; |
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unsigned char part, vers, pcbrev, var; |
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get_pcbrev_var(&pcbrev,&var); |
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part = in8 (PLD_PART_REG); |
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vers = in8 (PLD_VERS_REG); |
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printf ("Rev: MIP405-%d Rev %c PLD%d Vers %d\n", |
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rev, ((cfg >> 4) & 0xf) + 'A', part, vers); |
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printf ("Rev: " BOARD_NAME "-%d Rev %c PLD %d Vers %d\n", |
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var, pcbrev + 'A', part & 0x7F, vers); |
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} |
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extern void mem_test_reloc(void); |
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@ -683,24 +732,32 @@ void print_mip405_info (void) |
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com_mode = in8 (PLD_COM_MODE_REG); |
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ext = in8 (PLD_EXT_CONF_REG); |
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printf ("PLD Part %d version %d\n", part, vers); |
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printf ("PLD Part %d version %d\n", part & 0x7F, vers); |
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printf ("Board Revision %c\n", ((cfg >> 4) & 0xf) + 'A'); |
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printf ("Population Options %d %d %d %d\n", (cfg) & 0x1, |
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(cfg >> 1) & 0x1, (cfg >> 2) & 0x1, (cfg >> 3) & 0x1); |
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printf ("User LED %s\n", (com_mode & 0x4) ? "on" : "off"); |
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printf ("UART Clocks %d\n", (com_mode >> 4) & 0x3); |
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printf ("Test ist %x\n", com_mode); |
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#if !defined(CONFIG_MIP405T) |
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printf ("User Config Switch %d %d %d %d %d %d %d %d\n", |
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(ext) & 0x1, (ext >> 1) & 0x1, (ext >> 2) & 0x1, |
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(ext >> 3) & 0x1, (ext >> 4) & 0x1, (ext >> 5) & 0x1, |
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(ext >> 6) & 0x1, (ext >> 7) & 0x1); |
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printf ("SER1 uses handshakes %s\n", |
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(ext & 0x80) ? "DTR/DSR" : "RTS/CTS"); |
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#else |
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printf ("User Config Switch %d %d %d %d %d %d %d %d %d\n", |
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(ext) & 0x1, (ext >> 1) & 0x1, (ext >> 2) & 0x1, |
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(ext >> 3) & 0x1, (ext >> 4) & 0x1, (ext >> 5) & 0x1, |
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(ext >> 6) & 0x1,(ext >> 7) & 0x1,(ext >> 8) & 0x1); |
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#endif |
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printf ("IDE Reset %s\n", (ext & 0x01) ? "asserted" : "not asserted"); |
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printf ("IRQs:\n"); |
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printf (" PIIX INTR: %s\n", (irq_reg & 0x80) ? "inactive" : "active"); |
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#if !defined(CONFIG_MIP405T) |
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printf (" UART0 IRQ: %s\n", (irq_reg & 0x40) ? "inactive" : "active"); |
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printf (" UART1 IRQ: %s\n", (irq_reg & 0x20) ? "inactive" : "active"); |
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#endif |
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printf (" PIIX SMI: %s\n", (irq_reg & 0x10) ? "inactive" : "active"); |
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printf (" PIIX INIT: %s\n", (irq_reg & 0x8) ? "inactive" : "active"); |
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printf (" PIIX NMI: %s\n", (irq_reg & 0x4) ? "inactive" : "active"); |
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wdenk
22 years ago